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sys/i386/isa/aic6360.c
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1 /* 2 * Copyright (c) 1994 Charles Hannum. 3 * Copyright (c) 1994 Jarle Greipsland 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 3. All advertising materials mentioning features or use of this software 15 * must display the following acknowledgement: 16 * This product includes software developed by Jarle Greipsland 17 * 4. The name of the author may not be used to endorse or promote products 18 * derived from this software without specific prior written permission. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 21 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 22 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 23 * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, 24 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 25 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 26 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 27 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 28 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN 29 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 30 * POSSIBILITY OF SUCH DAMAGE. 31 */ 32 33 /* 34 * $FreeBSD: src/sys/i386/isa/aic6360.c,v 1.24.2.4 1999/09/05 08:12:23 peter Exp $ 35 * 36 * Acknowledgements: Many of the algorithms used in this driver are 37 * inspired by the work of Julian Elischer (julian@tfs.com) and 38 * Charles Hannum (mycroft@duality.gnu.ai.mit.edu). Thanks a million! 39 * 40 * Converted from NetBSD to FreeBSD by Jim Babb 41 */ 42 43 /* TODO list: 44 * 1) Get the DMA stuff working. 45 * 2) Get the iov/uio stuff working. Is this a good thing ??? 46 * 3) Get the synch stuff working. 47 * 4) Rewrite it to use malloc for the acb structs instead of static alloc.? 48 */ 49 50 /* 51 * PC-9801-100/AHA-1030P support by URATA S. 52 */ 53 54 /* 55 * A few customizable items: 56 */ 57 58 /* The SCSI ID of the host adapter/computer */ 59 #ifndef AIC_SCSI_HOSTID 60 #define AIC_SCSI_HOSTID 7 61 #endif 62 63 /* Use doubleword transfers to/from SCSI chip. Note: This requires 64 * motherboard support. Basicly, some motherboard chipsets are able to 65 * split a 32 bit I/O operation into two 16 bit I/O operations, 66 * transparently to the processor. This speeds up some things, notably long 67 * data transfers. 68 */ 69 #define AIC_USE_DWORDS 0 70 71 /* Allow disconnects? Was mainly used in an early phase of the driver when 72 * the message system was very flaky. Should go away soon. 73 */ 74 #define AIC_ALLOW_DISCONNECT 1 75 76 /* Synchronous data transfers? (does not work yet!) XXX */ 77 #define AIC_USE_SYNCHRONOUS 0 /* Enable/disable (1/0) */ 78 #define AIC_SYNC_PERIOD 200 79 #define AIC_SYNC_REQ_ACK_OFS 8 80 81 /* Max attempts made to transmit a message */ 82 #define AIC_MSG_MAX_ATTEMPT 3 /* Not used now XXX */ 83 84 /* Use DMA (else we do programmed I/O using string instructions) (not yet!)*/ 85 #define AIC_USE_EISA_DMA 0 86 #define AIC_USE_ISA_DMA 0 87 88 /* How to behave on the (E)ISA bus when/if DMAing (on<<4) + off in us */ 89 #define EISA_BRST_TIM ((15<<4) + 1) /* 15us on, 1us off */ 90 91 /* Some spin loop parameters (essentially how long to wait some places) 92 * The problem(?) is that sometimes we expect either to be able to transmit a 93 * byte or to get a new one from the SCSI bus pretty soon. In order to avoid 94 * returning from the interrupt just to get yanked back for the next byte we 95 * may spin in the interrupt routine waiting for this byte to come. How long? 96 * This is really (SCSI) device and processor dependent. Tuneable, I guess. 97 */ 98 #define AIC_MSGI_SPIN 1 /* Will spinwait upto ?ms for a new msg byte */ 99 #define AIC_MSGO_SPIN 1 100 101 /* Include debug functions? At the end of this file there are a bunch of 102 * functions that will print out various information regarding queued SCSI 103 * commands, driver state and chip contents. You can call them from the 104 * kernel debugger. If you set AIC_DEBUG to 0 they are not included (the 105 * kernel uses less memory) but you lose the debugging facilities. 106 */ 107 #define AIC_DEBUG 0 108 109 /* End of customizable parameters */ 110 111 #if AIC_USE_EISA_DMA || AIC_USE_ISA_DMA 112 #error "I said not yet! Start paying attention... grumble" 113 #endif 114 115 #include "opt_ddb.h" 116 #include "aic.h" 117 118 #include <sys/types.h> 119 #include <sys/param.h> 120 #include <sys/kernel.h> 121 #include <sys/systm.h> 122 #include <sys/errno.h> 123 #include <sys/ioctl.h> 124 #include <sys/malloc.h> 125 #include <sys/buf.h> 126 #include <sys/proc.h> 127 #include <sys/queue.h> 128 #include <scsi/scsi_all.h> 129 #include <scsi/scsiconf.h> 130 131 #include <machine/clock.h> 132 #include <i386/isa/isa_device.h> 133 134 #include <sys/kernel.h> 135 136 /* Definitions, most of them has turned out to be unneccesary, but here they 137 * are anyway. 138 */ 139 140 /* 141 * Generic SCSI messages. For now we reject most of them. 142 */ 143 /* Messages (1 byte) */ /* I/T M(andatory) or (O)ptional */ 144 #define MSG_CMDCOMPLETE 0x00 /* M/M */ 145 #define MSG_EXTENDED 0x01 /* O/O */ 146 #define MSG_SAVEDATAPOINTER 0x02 /* O/O */ 147 #define MSG_RESTOREPOINTERS 0x03 /* O/O */ 148 #define MSG_DISCONNECT 0x04 /* O/O */ 149 #define MSG_INITIATOR_DET_ERR 0x05 /* M/M */ 150 #define MSG_ABORT 0x06 /* O/M */ 151 #define MSG_MESSAGE_REJECT 0x07 /* M/M */ 152 #define MSG_NOOP 0x08 /* M/M */ 153 #define MSG_PARITY_ERR 0x09 /* M/M */ 154 #define MSG_LINK_CMD_COMPLETE 0x0a /* O/O */ 155 #define MSG_LINK_CMD_COMPLETEF 0x0b /* O/O */ 156 #define MSG_BUS_DEV_RESET 0x0c /* O/M */ 157 #define MSG_ABORT_TAG 0x0d /* O/O */ 158 #define MSG_CLEAR_QUEUE 0x0e /* O/O */ 159 #define MSG_INIT_RECOVERY 0x0f /* O/O */ 160 #define MSG_REL_RECOVERY 0x10 /* O/O */ 161 #define MSG_TERM_IO_PROC 0x11 /* O/O */ 162 163 /* Messages (2 byte) */ 164 #define MSG_SIMPLE_Q_TAG 0x20 /* O/O */ 165 #define MSG_HEAD_OF_Q_TAG 0x21 /* O/O */ 166 #define MSG_ORDERED_Q_TAG 0x22 /* O/O */ 167 #define MSG_IGN_WIDE_RESIDUE 0x23 /* O/O */ 168 169 /* Identify message */ 170 #define MSG_IDENTIFY(lun) ((AIC_ALLOW_DISCONNECT ? 0xc0 : 0x80)|((lun) & 0x7)) 171 #define MSG_ISIDENT(m) ((m) & 0x80) 172 173 /* Extended messages (opcode) */ 174 #define MSG_EXT_SDTR 0x01 175 176 /* SCSI Status codes */ 177 #define ST_GOOD 0x00 178 #define ST_CHKCOND 0x02 179 #define ST_CONDMET 0x04 180 #define ST_BUSY 0x08 181 #define ST_INTERMED 0x10 182 #define ST_INTERMED_CONDMET 0x14 183 #define ST_RESERVATION_CONFLICT 0x18 184 #define ST_CMD_TERM 0x22 185 #define ST_QUEUE_FULL 0x28 186 187 #define ST_MASK 0x3e /* bit 0,6,7 is reserved */ 188 189 /* AIC6360 definitions */ 190 #ifdef PC98 191 #include <i386/isa/aic_98.h> 192 #else 193 #define SCSISEQ (iobase + 0x00) /* SCSI sequence control */ 194 #define SXFRCTL0 (iobase + 0x01) /* SCSI transfer control 0 */ 195 #define SXFRCTL1 (iobase + 0x02) /* SCSI transfer control 1 */ 196 #define SCSISIGI (iobase + 0x03) /* SCSI signal in */ 197 #define SCSISIGO (iobase + 0x03) /* SCSI signal out */ 198 #define SCSIRATE (iobase + 0x04) /* SCSI rate control */ 199 #define SCSIID (iobase + 0x05) /* SCSI ID */ 200 #define SELID (iobase + 0x05) /* Selection/Reselection ID */ 201 #define SCSIDAT (iobase + 0x06) /* SCSI Latched Data */ 202 #define SCSIBUS (iobase + 0x07) /* SCSI Data Bus*/ 203 #define STCNT0 (iobase + 0x08) /* SCSI transfer count */ 204 #define STCNT1 (iobase + 0x09) 205 #define STCNT2 (iobase + 0x0a) 206 #define CLRSINT0 (iobase + 0x0b) /* Clear SCSI interrupts 0 */ 207 #define SSTAT0 (iobase + 0x0b) /* SCSI interrupt status 0 */ 208 #define CLRSINT1 (iobase + 0x0c) /* Clear SCSI interrupts 1 */ 209 #define SSTAT1 (iobase + 0x0c) /* SCSI status 1 */ 210 #define SSTAT2 (iobase + 0x0d) /* SCSI status 2 */ 211 #define SCSITEST (iobase + 0x0e) /* SCSI test control */ 212 #define SSTAT3 (iobase + 0x0e) /* SCSI status 3 */ 213 #define CLRSERR (iobase + 0x0f) /* Clear SCSI errors */ 214 #define SSTAT4 (iobase + 0x0f) /* SCSI status 4 */ 215 #define SIMODE0 (iobase + 0x10) /* SCSI interrupt mode 0 */ 216 #define SIMODE1 (iobase + 0x11) /* SCSI interrupt mode 1 */ 217 #define DMACNTRL0 (iobase + 0x12) /* DMA control 0 */ 218 #define DMACNTRL1 (iobase + 0x13) /* DMA control 1 */ 219 #define DMASTAT (iobase + 0x14) /* DMA status */ 220 #define FIFOSTAT (iobase + 0x15) /* FIFO status */ 221 #define DMADATA (iobase + 0x16) /* DMA data */ 222 #define DMADATAL (iobase + 0x16) /* DMA data low byte */ 223 #define DMADATAH (iobase + 0x17) /* DMA data high byte */ 224 #define BRSTCNTRL (iobase + 0x18) /* Burst Control */ 225 #define DMADATALONG (iobase + 0x18) 226 #define PORTA (iobase + 0x1a) /* Port A */ 227 #define PORTB (iobase + 0x1b) /* Port B */ 228 #define REV (iobase + 0x1c) /* Revision (001 for 6360) */ 229 #define STACK (iobase + 0x1d) /* Stack */ 230 #define TEST (iobase + 0x1e) /* Test register */ 231 #define ID (iobase + 0x1f) /* ID register */ 232 #endif 233 234 #define IDSTRING "(C)1991ADAPTECAIC6360 " 235 236 /* What all the bits do */ 237 238 /* SCSISEQ */ 239 #define TEMODEO 0x80 240 #define ENSELO 0x40 241 #define ENSELI 0x20 242 #define ENRESELI 0x10 243 #define ENAUTOATNO 0x08 244 #define ENAUTOATNI 0x04 245 #define ENAUTOATNP 0x02 246 #define SCSIRSTO 0x01 247 248 /* SXFRCTL0 */ 249 #define SCSIEN 0x80 250 #define DMAEN 0x40 251 #define CHEN 0x20 252 #define CLRSTCNT 0x10 253 #define SPIOEN 0x08 254 #define CLRCH 0x02 255 256 /* SXFRCTL1 */ 257 #define BITBUCKET 0x80 258 #define SWRAPEN 0x40 259 #define ENSPCHK 0x20 260 #define STIMESEL1 0x10 261 #define STIMESEL0 0x08 262 #define STIMO_256ms 0x00 263 #define STIMO_128ms 0x08 264 #define STIMO_64ms 0x10 265 #define STIMO_32ms 0x18 266 #define ENSTIMER 0x04 267 #define BYTEALIGN 0x02 268 269 /* SCSISIGI */ 270 #define CDI 0x80 271 #define IOI 0x40 272 #define MSGI 0x20 273 #define ATNI 0x10 274 #define SELI 0x08 275 #define BSYI 0x04 276 #define REQI 0x02 277 #define ACKI 0x01 278 279 /* Important! The 3 most significant bits of this register, in initiator mode, 280 * represents the "expected" SCSI bus phase and can be used to trigger phase 281 * mismatch and phase change interrupts. But more important: If there is a 282 * phase mismatch the chip will not transfer any data! This is actually a nice 283 * feature as it gives us a bit more control over what is happening when we are 284 * bursting data (in) through the FIFOs and the phase suddenly changes from 285 * DATA IN to STATUS or MESSAGE IN. The transfer will stop and wait for the 286 * proper phase to be set in this register instead of dumping the bits into the 287 * FIFOs. 288 */ 289 /* SCSISIGO */ 290 #define CDO 0x80 291 #define CDEXP (CDO) 292 #define IOO 0x40 293 #define IOEXP (IOO) 294 #define MSGO 0x20 295 #define MSGEXP (MSGO) 296 #define ATNO 0x10 297 #define SELO 0x08 298 #define BSYO 0x04 299 #define REQO 0x02 300 #define ACKO 0x01 301 302 /* Information transfer phases */ 303 #define PH_DOUT (0) 304 #define PH_DIN (IOI) 305 #define PH_CMD (CDI) 306 #define PH_STAT (CDI|IOI) 307 #define PH_MSGO (MSGI|CDI) 308 #define PH_MSGI (MSGI|CDI|IOI) 309 310 #define PH_MASK 0xe0 311 312 /* Some pseudo phases for getphase()*/ 313 #define PH_BUSFREE 0x100 /* (Re)Selection no longer valid */ 314 #define PH_INVALID 0x101 /* (Re)Selection valid, but no REQ yet */ 315 #define PH_PSBIT 0x100 /* "pseudo" bit */ 316 317 /* SCSIRATE */ 318 #define SXFR2 0x40 319 #define SXFR1 0x20 320 #define SXFR0 0x10 321 #define SOFS3 0x08 322 #define SOFS2 0x04 323 #define SOFS1 0x02 324 #define SOFS0 0x01 325 326 /* SCSI ID */ 327 #define OID2 0x40 328 #define OID1 0x20 329 #define OID0 0x10 330 #define OID_S 4 /* shift value */ 331 #define TID2 0x04 332 #define TID1 0x02 333 #define TID0 0x01 334 #define SCSI_ID_MASK 0x7 335 336 /* SCSI selection/reselection ID (both target *and* initiator) */ 337 #define SELID7 0x80 338 #define SELID6 0x40 339 #define SELID5 0x20 340 #define SELID4 0x10 341 #define SELID3 0x08 342 #define SELID2 0x04 343 #define SELID1 0x02 344 #define SELID0 0x01 345 346 /* CLRSINT0 Clears what? (interrupt and/or status bit) */ 347 #define SETSDONE 0x80 348 #define CLRSELDO 0x40 /* I */ 349 #define CLRSELDI 0x20 /* I+ */ 350 #define CLRSELINGO 0x10 /* I */ 351 #define CLRSWRAP 0x08 /* I+S */ 352 #define CLRSDONE 0x04 /* I+S */ 353 #define CLRSPIORDY 0x02 /* I */ 354 #define CLRDMADONE 0x01 /* I */ 355 356 /* SSTAT0 Howto clear */ 357 #define TARGET 0x80 358 #define SELDO 0x40 /* Selfclearing */ 359 #define SELDI 0x20 /* Selfclearing when CLRSELDI is set */ 360 #define SELINGO 0x10 /* Selfclearing */ 361 #define SWRAP 0x08 /* CLRSWAP */ 362 #define SDONE 0x04 /* Not used in initiator mode */ 363 #define SPIORDY 0x02 /* Selfclearing (op on SCSIDAT) */ 364 #define DMADONE 0x01 /* Selfclearing (all FIFOs empty & T/C */ 365 366 /* CLRSINT1 Clears what? */ 367 #define CLRSELTIMO 0x80 /* I+S */ 368 #define CLRATNO 0x40 369 #define CLRSCSIRSTI 0x20 /* I+S */ 370 #define CLRBUSFREE 0x08 /* I+S */ 371 #define CLRSCSIPERR 0x04 /* I+S */ 372 #define CLRPHASECHG 0x02 /* I+S */ 373 #define CLRREQINIT 0x01 /* I+S */ 374 375 /* SSTAT1 How to clear? When set?*/ 376 #define SELTO 0x80 /* C select out timeout */ 377 #define ATNTARG 0x40 /* Not used in initiator mode */ 378 #define SCSIRSTI 0x20 /* C RST asserted */ 379 #define PHASEMIS 0x10 /* Selfclearing */ 380 #define BUSFREE 0x08 /* C bus free condition */ 381 #define SCSIPERR 0x04 /* C parity error on inbound data */ 382 #define PHASECHG 0x02 /* C phase in SCSISIGI doesn't match */ 383 #define REQINIT 0x01 /* C or ACK asserting edge of REQ */ 384 385 /* SSTAT2 */ 386 #define SOFFSET 0x20 387 #define SEMPTY 0x10 388 #define SFULL 0x08 389 #define SFCNT2 0x04 390 #define SFCNT1 0x02 391 #define SFCNT0 0x01 392 393 /* SCSITEST */ 394 #define SCTESTU 0x08 395 #define SCTESTD 0x04 396 #define STCTEST 0x01 397 398 /* SSTAT3 */ 399 #define SCSICNT3 0x80 400 #define SCSICNT2 0x40 401 #define SCSICNT1 0x20 402 #define SCSICNT0 0x10 403 #define OFFCNT3 0x08 404 #define OFFCNT2 0x04 405 #define OFFCNT1 0x02 406 #define OFFCNT0 0x01 407 408 /* CLRSERR */ 409 #define CLRSYNCERR 0x04 410 #define CLRFWERR 0x02 411 #define CLRFRERR 0x01 412 413 /* SSTAT4 */ 414 #define SYNCERR 0x04 415 #define FWERR 0x02 416 #define FRERR 0x01 417 418 /* SIMODE0 */ 419 #define ENSELDO 0x40 420 #define ENSELDI 0x20 421 #define ENSELINGO 0x10 422 #define ENSWRAP 0x08 423 #define ENSDONE 0x04 424 #define ENSPIORDY 0x02 425 #define ENDMADONE 0x01 426 427 /* SIMODE1 */ 428 #define ENSELTIMO 0x80 429 #define ENATNTARG 0x40 430 #define ENSCSIRST 0x20 431 #define ENPHASEMIS 0x10 432 #define ENBUSFREE 0x08 433 #define ENSCSIPERR 0x04 434 #define ENPHASECHG 0x02 435 #define ENREQINIT 0x01 436 437 /* DMACNTRL0 */ 438 #define ENDMA 0x80 439 #define B8MODE 0x40 440 #define DMA 0x20 441 #define DWORDPIO 0x10 442 #define WRITE 0x08 443 #define INTEN 0x04 444 #define RSTFIFO 0x02 445 #define SWINT 0x01 446 447 /* DMACNTRL1 */ 448 #define PWRDWN 0x80 449 #define ENSTK32 0x40 450 #define STK4 0x10 451 #define STK3 0x08 452 #define STK2 0x04 453 #define STK1 0x02 454 #define STK0 0x01 455 456 /* DMASTAT */ 457 #define ATDONE 0x80 458 #define WORDRDY 0x40 459 #define INTSTAT 0x20 460 #define DFIFOFULL 0x10 461 #define DFIFOEMP 0x08 462 #define DFIFOHF 0x04 463 #define DWORDRDY 0x02 464 465 /* BRSTCNTRL */ 466 #define BON3 0x80 467 #define BON2 0x40 468 #define BON1 0x20 469 #define BON0 0x10 470 #define BOFF3 0x08 471 #define BOFF2 0x04 472 #define BOFF1 0x02 473 #define BOFF0 0x01 474 475 /* TEST */ 476 #define BOFFTMR 0x40 477 #define BONTMR 0x20 478 #define STCNTH 0x10 479 #define STCNTM 0x08 480 #define STCNTL 0x04 481 #define SCSIBLK 0x02 482 #define DMABLK 0x01 483 484 485 #define orreg(reg, val) outb((reg), inb(reg)| (val)) 486 #define andreg(reg, val) outb((reg), inb(reg)& (val)) 487 #define nandreg(reg, val) outb((reg), inb(reg)&~(val)) 488 489 490 491 #ifdef DDB 492 #define fatal_if_no_DDB() 493 #else 494 #define fatal_if_no_DDB() panic("panic for historical reasons") 495 #endif 496 497 typedef u_long physaddr; 498 499 struct aic_dma_seg { 500 physaddr addr; 501 long len; 502 }; 503 504 #define DELAYCOUNT 16 505 506 #define FUDGE(X) ((X)>>1) /* get 1 ms spincount */ 507 #define MINIFUDGE(X) ((X)>>4) /* get (approx) 125us spincount */ 508 #define AIC_NSEG 16 509 #define NUM_CONCURRENT 7 /* Only one per target for now */ 510 511 /* 512 * ACB. Holds additional information for each SCSI command Comments: We 513 * need a separate scsi command block because we may need to overwrite it 514 * with a request sense command. Basicly, we refrain from fiddling with 515 * the scsi_xfer struct (except do the expected updating of return values). 516 * We'll generally update: xs->{flags,resid,error,sense,status} and 517 * occasionally xs->retries. 518 */ 519 520 struct acb { 521 TAILQ_ENTRY(acb) chain; 522 struct scsi_xfer *xs; /* SCSI xfer ctrl block from above */ 523 int flags; /* Status */ 524 #define ACB_FREE 0x00 525 #define ACB_ACTIVE 0x01 526 #define ACB_DONE 0x04 527 #define ACB_CHKSENSE 0x08 528 /* struct aic_dma_seg dma[AIC_NSEG]; */ /* Physical addresses+len */ 529 struct scsi_generic cmd; /* SCSI command block */ 530 int clen; 531 char *daddr; /* Saved data pointer */ 532 int dleft; /* Residue */ 533 int stat; /* SCSI status byte */ 534 }; 535 536 /* 537 * Some info about each (possible) target on the SCSI bus. This should 538 * probably have been a "per target+lunit" structure, but we'll leave it at 539 * this for now. Is there a way to reliably hook it up to sc->fordriver?? 540 */ 541 struct aic_tinfo { 542 int cmds; /* #commands processed */ 543 int dconns; /* #disconnects */ 544 int touts; /* #timeouts */ 545 int perrs; /* #parity errors */ 546 int senses; /* #request sense commands sent */ 547 ushort lubusy; /* What local units/subr. are busy? */ 548 u_char flags; 549 #define NEED_TO_RESET 0x01 /* Should send a BUS_DEV_RESET */ 550 #define DO_NEGOTIATE 0x02 /* (Re)Negotiate synchronous options */ 551 #define TARGET_BUSY 0x04 /* Target is busy, i.e. cmd in progress */ 552 u_char persgst; /* Period suggestion */ 553 u_char offsgst; /* Offset suggestion */ 554 u_char syncdata; /* True negotiated synch parameters */ 555 }; 556 557 /* Register a linenumber (for debugging) */ 558 #if AIC_DEBUG 559 #define LOGLINE(p) \ 560 do { \ 561 p->history[p->hp] = __LINE__; \ 562 p->hp = ++p->hp % AIC_HSIZE; \ 563 } while (0) 564 #else 565 #define LOGLINE(p) 566 #endif 567 568 static struct aic_data { /* One of these per adapter */ 569 u_short iobase; /* Base I/O port */ 570 struct scsi_link sc_link; /* prototype for subdevs */ 571 int aic_int; /* IRQ on the EISA bus */ 572 int aic_dma; /* DRQ on the EISA bus */ 573 /* Lists of command blocks */ 574 TAILQ_HEAD(acb_list, acb) free_list, ready_list, nexus_list; 575 struct acb *nexus; /* current command */ 576 /* Command blocks and target info */ 577 struct acb acb[NUM_CONCURRENT]; 578 struct aic_tinfo tinfo[8]; 579 /* Data about the current nexus (updated for every cmd switch) */ 580 u_char *dp; /* Current data pointer */ 581 int dleft; /* Data left to transfer */ 582 /* Adapter state */ 583 short phase; /* Copy of what bus phase we are in */ 584 short prevphase; /* Copy of what bus phase we were in */ 585 short state; /* State applicable to the adapter */ 586 #define AIC_IDLE 0x01 587 #define AIC_TMP_UNAVAIL 0x02 /* Don't accept SCSI commands */ 588 #define AIC_SELECTING 0x03 /* SCSI command is arbiting */ 589 #define AIC_RESELECTED 0x04 /* Has been reselected */ 590 #define AIC_HASNEXUS 0x05 /* Actively using the SCSI bus */ 591 #define AIC_CLEANING 0x06 592 short flags; 593 #define AIC_DROP_MSGI 0x01 /* Discard all msgs (parity err detected) */ 594 #define AIC_DOINGDMA 0x02 /* The FIFO data path is active! */ 595 #define AIC_BUSFREE_OK 0x04 /* Bus free phase is OK. */ 596 #define AIC_SYNCHNEGO 0x08 /* Synch negotiation in progress. */ 597 #define AIC_BLOCKED 0x10 /* Don't schedule new scsi bus operations */ 598 /* Debugging stuff */ 599 #define AIC_HSIZE 8 600 short history[AIC_HSIZE]; /* Store line numbers here. */ 601 short hp; 602 u_char progress; /* Set if interrupt has achieved progress */ 603 /* Message stuff */ 604 u_char msgpriq; /* One or more messages to send (encoded) */ 605 u_char msgout; /* What message is on its way out? */ 606 #define SEND_DEV_RESET 0x01 607 #define SEND_PARITY_ERROR 0x02 608 #define SEND_ABORT 0x04 609 #define SEND_REJECT 0x08 610 #define SEND_INIT_DET_ERR 0x10 611 #define SEND_IDENTIFY 0x20 612 #define SEND_SDTR 0x40 613 #define AIC_MAX_MSG_LEN 8 614 u_char omess[AIC_MAX_MSG_LEN]; /* Scratch area for messages */ 615 u_char *omp; /* Message pointer (for multibyte messages) */ 616 u_char omlen; 617 u_char imess[AIC_MAX_MSG_LEN + 1]; 618 u_char *imp; /* Message pointer (for multibyte messages) */ 619 u_char imlen; 620 #ifdef PC98 621 int *aicport; /* I/O port information */ 622 #endif 623 } *aicdata[NAIC]; 624 625 #define AIC_SHOWACBS 0x01 626 #define AIC_SHOWINTS 0x02 627 #define AIC_SHOWCMDS 0x04 628 #define AIC_SHOWMISC 0x08 629 #define AIC_SHOWTRAC 0x10 630 #define AIC_SHOWSTART 0x20 631 static int aic_debug = 0; /* AIC_SHOWSTART|AIC_SHOWMISC|AIC_SHOWTRAC; */ 632 633 #if AIC_DEBUG 634 #define AIC_ACBS(str) do {if (aic_debug & AIC_SHOWACBS) printf str;} while (0) 635 #define AIC_MISC(str) do {if (aic_debug & AIC_SHOWMISC) printf str;} while (0) 636 #define AIC_INTS(str) do {if (aic_debug & AIC_SHOWINTS) printf str;} while (0) 637 #define AIC_TRACE(str) do {if (aic_debug & AIC_SHOWTRAC) printf str;} while (0) 638 #define AIC_CMDS(str) do {if (aic_debug & AIC_SHOWCMDS) printf str;} while (0) 639 #define AIC_START(str) do {if (aic_debug & AIC_SHOWSTART) printf str;}while (0) 640 #else 641 #define AIC_ACBS(str) 642 #define AIC_MISC(str) 643 #define AIC_INTS(str) 644 #define AIC_TRACE(str) 645 #define AIC_CMDS(str) 646 #define AIC_START(str) 647 #endif 648 649 static int aicprobe __P((struct isa_device *)); 650 static int aicattach __P((struct isa_device *)); 651 static void aic_minphys __P((struct buf *)); 652 static u_int32_t aic_adapter_info __P((int)); 653 static void aic_init __P((struct aic_data *)); 654 static int aic_find __P((struct aic_data *)); 655 static void aic_done __P((struct acb *)); 656 static void aic_dataout __P((struct aic_data *aic)); 657 static void aic_datain __P((struct aic_data *aic)); 658 static int32_t aic_scsi_cmd __P((struct scsi_xfer *)); 659 static int aic_poll __P((struct aic_data *aic, struct acb *)); 660 void aic_add_timeout __P((struct acb *, int)); 661 void aic_remove_timeout __P((struct acb *)); 662 static void aic6360_reset __P((struct aic_data *aic)); 663 static u_short aicphase __P((struct aic_data *aic)); 664 static void aic_msgin __P((struct aic_data *aic)); 665 static void aic_msgout __P((struct aic_data *aic)); 666 static timeout_t aic_timeout; 667 static void aic_sched __P((struct aic_data *)); 668 static void aic_scsi_reset __P((struct aic_data *)); 669 #if AIC_DEBUG 670 void aic_print_active_acb __P((void)); 671 void aic_dump6360 __P((void)); 672 void aic_dump_driver __P((void)); 673 #endif 674 675 /* Linkup to the rest of the kernel */ 676 struct isa_driver aicdriver = { 677 aicprobe, aicattach, "aic" 678 }; 679 680 static int aicunit = 0; 681 682 static struct scsi_adapter aic_switch = { 683 aic_scsi_cmd, 684 aic_minphys, 685 0, 686 0, 687 aic_adapter_info, 688 "aic" 689 ,0 , 0 690 }; 691 692 static struct scsi_device aic_dev = { 693 NULL, /* Use default error handler */ 694 NULL, /* have a queue, served by this */ 695 NULL, /* have no async handler */ 696 NULL, /* Use default 'done' routine */ 697 "aic", 698 0 699 }; 700 701 702 /* PCCARD suport */ 703 #include "card.h" 704 #if NCARD > 0 705 #include <sys/select.h> 706 #include <pccard/cardinfo.h> 707 #include <pccard/driver.h> 708 #include <pccard/slot.h> 709 710 static int aicinit(struct pccard_devinfo *); /* init device */ 711 void aicunload(struct pccard_devinfo *); /* Disable driver */ 712 static int aic_card_intr(struct pccard_devinfo *); /* Interrupt handler */ 713 714 static struct pccard_device aic_info = { 715 "aic", 716 aicinit, 717 aicunload, 718 aic_card_intr, 719 0, /* Attributes - presently unused */ 720 &bio_imask /* Interrupt mask for device */ 721 }; 722 723 DATA_SET(pccarddrv_set, aic_info); 724 725 /* 726 * Initialize the device - called from Slot manager. 727 */ 728 int 729 aicinit(struct pccard_devinfo *devi) 730 { 731 static int already_aicinit[NAIC]; 732 733 /* validate unit number */ 734 if (devi->isahd.id_unit >= NAIC) 735 return(ENODEV); 736 /* Make sure it isn't already initialised */ 737 if (already_aicinit[devi->isahd.id_unit] == 1) { 738 if (aicattach(&devi->isahd) == 0) 739 return(ENXIO); 740 return(0); 741 } 742 /* 743 * Probe the device. If a value is returned, the 744 * device was found at the location. 745 */ 746 if (aicprobe(&devi->isahd) == 0) 747 return(ENXIO); 748 749 if (aicattach(&devi->isahd) == 0) 750 return(ENXIO); 751 already_aicinit[devi->isahd.id_unit] = 1; 752 return(0); 753 } 754 755 /* 756 * aicunload - unload the driver and clear the table. 757 * XXX TODO: 758 * This is called usually when the card is ejected, but 759 * can be caused by the modunload of a controller driver. 760 * The idea is reset the driver's view of the device 761 * and ensure that any driver entry points such as 762 * read and write do not hang. 763 */ 764 void 765 aicunload(struct pccard_devinfo *devi) 766 { 767 printf("aic%d: unload\n", devi->isahd.id_unit); 768 #if 0 769 aicstop(devi->isahd.id_unit); 770 #endif 771 } 772 773 /* 774 * card_intr - Shared interrupt called from front end of PC-Card handler. 775 */ 776 static int 777 aic_card_intr(struct pccard_devinfo *devi) 778 { 779 aicintr(devi->isahd.id_unit); 780 return(1); 781 } 782 #endif /* NCARD > 0 */ 783 784 /* 785 * INITIALIZATION ROUTINES (probe, attach ++) 786 */ 787 788 /* 789 * aicprobe: probe for AIC6360 SCSI-controller 790 * returns non-zero value if a controller is found. 791 */ 792 static int 793 aicprobe(dev) 794 struct isa_device *dev; 795 { 796 struct aic_data *aic; 797 #if NCARD > 0 798 int unit = dev->id_unit; 799 int aic_reg_drv[NAIC]; 800 #else 801 int unit = aicunit; 802 #endif 803 804 if (unit >= NAIC) { 805 printf("aic%d: unit number too high\n", unit); 806 return 0; 807 } 808 dev->id_unit = unit; 809 810 #if NCARD > 0 811 if (!aic_reg_drv[unit]) 812 aic_reg_drv[unit] = 1; 813 #endif 814 815 /* 816 * Allocate a storage area for us 817 */ 818 if (aicdata[unit]) { 819 printf("aic%d: memory already allocated\n", unit); 820 return 0; 821 } 822 aic = malloc(sizeof(struct aic_data), M_TEMP, M_NOWAIT); 823 if (!aic) { 824 printf("aic%d: cannot malloc!\n", unit); 825 return 0; 826 } 827 bzero(aic, sizeof(struct aic_data)); 828 aicdata[unit] = aic; 829 aic->iobase = dev->id_iobase; 830 #ifdef PC98 831 if (AIC_TYPE98(dev->id_flags) == AIC98_100) { 832 /* PC-9801-100 */ 833 aic->aicport = aicport_100; 834 } else { 835 /* generic card */ 836 aic->aicport = aicport_generic; 837 } 838 #endif 839 840 if (aic_find(aic) != 0) { 841 aicdata[unit] = NULL; 842 free(aic, M_TEMP); 843 return 0; 844 } 845 aicunit++; 846 847 #ifdef PC98 848 if (AIC_TYPE98(dev->id_flags) == AIC98_100) 849 return 0x40; 850 #endif 851 return 0x20; 852 } 853 854 /* Do the real search-for-device. 855 * Prerequisite: aic->iobase should be set to the proper value 856 */ 857 static int 858 aic_find(aic) 859 struct aic_data *aic; 860 { 861 u_short iobase = aic->iobase; 862 char chip_id[sizeof(IDSTRING)]; /* For chips that support it */ 863 int i; 864 865 /* Remove aic6360 from possible powerdown mode */ 866 outb(DMACNTRL0, 0); 867 868 /* Thanks to mark@aggregate.com for the new method for detecting 869 * whether the chip is present or not. Bonus: may also work for 870 * the AIC-6260! 871 */ 872 AIC_TRACE(("aic: probing for aic-chip at port 0x%x\n",(int)iobase)); 873 /* 874 * Linux also init's the stack to 1-16 and then clears it, 875 * 6260's don't appear to have an ID reg - mpg 876 */ 877 /* Push the sequence 0,1,..,15 on the stack */ 878 #define STSIZE 16 879 outb(DMACNTRL1, 0); /* Reset stack pointer */ 880 for (i = 0; i < STSIZE; i++) 881 outb(STACK, i); 882 883 /* See if we can pull out the same sequence */ 884 outb(DMACNTRL1, 0); 885 for (i = 0; i < STSIZE && inb(STACK) == i; i++) 886 ; 887 if (i != STSIZE) { 888 AIC_START(("STACK futzed at %d.\n", i)); 889 return ENXIO; 890 } 891 892 /* See if we can pull the id string out of the ID register, 893 * now only used for informational purposes. 894 */ 895 bzero(chip_id, sizeof(chip_id)); 896 insb(ID, chip_id, sizeof(IDSTRING)-1); 897 AIC_START(("AIC found at 0x%x ", (int)aic->iobase)); 898 AIC_START(("ID: %s ",chip_id)); 899 AIC_START(("chip revision %d\n",(int)inb(REV))); 900 return 0; 901 } 902 903 /* 904 * Attach the AIC6360, fill out some high and low level data structures 905 */ 906 static int 907 aicattach(dev) 908 struct isa_device *dev; 909 { 910 int unit = dev->id_unit; 911 struct aic_data *aic = aicdata[unit]; 912 struct scsibus_data *scbus; 913 914 AIC_TRACE(("aicattach\n")); 915 aic->state = 0; 916 aic_scsi_reset(aic); 917 aic_init(aic); /* Init chip and driver */ 918 919 /* 920 * Fill in the prototype scsi_link 921 */ 922 aic->sc_link.adapter_unit = unit; 923 aic->sc_link.adapter_targ = AIC_SCSI_HOSTID; 924 aic->sc_link.adapter_softc = aic; 925 aic->sc_link.adapter = &aic_switch; 926 aic->sc_link.device = &aic_dev; 927 928 /* 929 * Prepare the scsibus_data area for the upperlevel 930 * scsi code. 931 */ 932 scbus = scsi_alloc_bus(); 933 if(!scbus) 934 return 0; 935 scbus->adapter_link = &aic->sc_link; 936 937 /* 938 * ask the adapter what subunits are present 939 */ 940 scsi_attachdevs(scbus); 941 942 return 1; 943 } 944 945 946 /* Initialize AIC6360 chip itself 947 * The following conditions should hold: 948 * aicprobe should have succeeded, i.e. the iobase address in aic_data must 949 * be valid. 950 */ 951 static void 952 aic6360_reset(aic) 953 struct aic_data *aic; 954 { 955 u_short iobase = aic->iobase; 956 957 outb(SCSITEST, 0); /* Doc. recommends to clear these two */ 958 outb(TEST, 0); /* registers before operations commence */ 959 960 /* Reset SCSI-FIFO and abort any transfers */ 961 outb(SXFRCTL0, CHEN|CLRCH|CLRSTCNT); 962 963 /* Reset DMA-FIFO */ 964 outb(DMACNTRL0, RSTFIFO); 965 outb(DMACNTRL1, 0); 966 967 outb(SCSISEQ, 0); /* Disable all selection features */ 968 outb(SXFRCTL1, 0); 969 970 outb(SIMODE0, 0x00); /* Disable some interrupts */ 971 outb(CLRSINT0, 0x7f); /* Clear a slew of interrupts */ 972 973 outb(SIMODE1, 0x00); /* Disable some more interrupts */ 974 outb(CLRSINT1, 0xef); /* Clear another slew of interrupts */ 975 976 outb(SCSIRATE, 0); /* Disable synchronous transfers */ 977 978 outb(CLRSERR, 0x07); /* Haven't seen ant errors (yet) */ 979 980 outb(SCSIID, AIC_SCSI_HOSTID << OID_S); /* Set our SCSI-ID */ 981 outb(BRSTCNTRL, EISA_BRST_TIM); 982 } 983 984 /* Pull the SCSI RST line for 500 us */ 985 static void 986 aic_scsi_reset(aic) 987 struct aic_data *aic; 988 { 989 u_short iobase = aic->iobase; 990 991 outb(SCSISEQ, SCSIRSTO); 992 DELAY(500); 993 outb(SCSISEQ, 0); 994 DELAY(50); 995 } 996 997 /* 998 * Initialize aic SCSI driver, also (conditonally) reset the SCSI bus. 999 * The reinitialization is still buggy (e.g. on SCSI resets). 1000 */ 1001 static void 1002 aic_init(aic) 1003 struct aic_data *aic; 1004 { 1005 u_short iobase = aic->iobase; 1006 struct acb *acb; 1007 int r; 1008 1009 /* Reset the SCSI-bus itself */ 1010 aic_scsi_reset(aic); 1011 1012 aic6360_reset(aic); /* Clean up our own hardware */ 1013 1014 /*XXX*/ /* If not the first time (probably a reset condition), 1015 * we should clean queues with active commands 1016 */ 1017 if (aic->state == 0) { /* First time through */ 1018 TAILQ_INIT(&aic->ready_list); 1019 TAILQ_INIT(&aic->nexus_list); 1020 TAILQ_INIT(&aic->free_list); 1021 aic->nexus = 0; 1022 acb = aic->acb; 1023 bzero(acb, sizeof(aic->acb)); 1024 for (r = 0; r < sizeof(aic->acb) / sizeof(*acb); r++) { 1025 TAILQ_INSERT_TAIL(&aic->free_list, acb, chain); 1026 acb++; 1027 } 1028 bzero(&aic->tinfo, sizeof(aic->tinfo)); 1029 } else { 1030 aic->state = AIC_CLEANING; 1031 if (aic->nexus != NULL) { 1032 aic->nexus->xs->error = XS_DRIVER_STUFFUP; 1033 untimeout(aic_timeout, (caddr_t)aic->nexus); 1034 aic_done(aic->nexus); 1035 } 1036 aic->nexus = NULL; 1037 while (acb = aic->nexus_list.tqh_first) { 1038 acb->xs->error = XS_DRIVER_STUFFUP; 1039 untimeout(aic_timeout, (caddr_t)acb); 1040 aic_done(acb); 1041 } 1042 } 1043 1044 aic->phase = aic->prevphase = PH_INVALID; 1045 aic->hp = 0; 1046 for (r = 0; r < 7; r++) { 1047 struct aic_tinfo *tp = &aic->tinfo[r]; 1048 tp->flags = AIC_USE_SYNCHRONOUS ? DO_NEGOTIATE : 0; 1049 tp->flags |= NEED_TO_RESET; 1050 tp->persgst = AIC_SYNC_PERIOD; 1051 tp->offsgst = AIC_SYNC_REQ_ACK_OFS; 1052 tp->syncdata = 0; 1053 } 1054 aic->state = AIC_IDLE; 1055 outb(DMACNTRL0, INTEN); 1056 return; 1057 } 1058 1059 /* 1060 * DRIVER FUNCTIONS CALLABLE FROM HIGHER LEVEL DRIVERS 1061 */ 1062 1063 /* 1064 * Expected sequence: 1065 * 1) Command inserted into ready list 1066 * 2) Command selected for execution 1067 * 3) Command won arbitration and has selected target device 1068 * 4) Send message out (identify message, eventually also sync.negotiations) 1069 * 5) Send command 1070 * 5a) Receive disconnect message, disconnect. 1071 * 5b) Reselected by target 1072 * 5c) Receive identify message from target. 1073 * 6) Send or receive data 1074 * 7) Receive status 1075 * 8) Receive message (command complete etc.) 1076 * 9) If status == SCSI_CHECK construct a synthetic request sense SCSI cmd. 1077 * Repeat 2-8 (no disconnects please...) 1078 */ 1079 1080 /* 1081 * Start a SCSI-command 1082 * This function is called by the higher level SCSI-driver to queue/run 1083 * SCSI-commands. 1084 */ 1085 static int32_t 1086 aic_scsi_cmd(xs) 1087 struct scsi_xfer *xs; 1088 { 1089 struct scsi_link *sc = xs->sc_link; 1090 struct aic_data *aic; 1091 struct acb *acb; 1092 int s = 0; 1093 int flags; 1094 1095 aic = (struct aic_data *)sc->adapter_softc; 1096 SC_DEBUG(sc, SDEV_DB2, ("aic_scsi_cmd\n")); 1097 AIC_TRACE(("aic_scsi_cmd\n")); 1098 AIC_MISC(("[0x%x, %d]->%d ", (int)xs->cmd->opcode, xs->cmdlen, 1099 sc->target)); 1100 1101 flags = xs->flags; 1102 1103 /* Get a aic command block */ 1104 if (!(flags & SCSI_NOMASK)) { 1105 /* Critical region */ 1106 s = splbio(); 1107 acb = aic->free_list.tqh_first; 1108 if (acb) { 1109 TAILQ_REMOVE(&aic->free_list, acb, chain); 1110 } 1111 splx(s); 1112 } else { 1113 acb = aic->free_list.tqh_first; 1114 if (acb) { 1115 TAILQ_REMOVE(&aic->free_list, acb, chain); 1116 } 1117 } 1118 1119 if (acb == NULL) { 1120 xs->error = XS_DRIVER_STUFFUP; 1121 AIC_MISC(("TRY_AGAIN_LATER")); 1122 return TRY_AGAIN_LATER; 1123 } 1124 1125 /* Initialize acb */ 1126 acb->flags = ACB_ACTIVE; 1127 acb->xs = xs; 1128 bcopy(xs->cmd, &acb->cmd, xs->cmdlen); 1129 acb->clen = xs->cmdlen; 1130 acb->daddr = xs->data; 1131 acb->dleft = xs->datalen; 1132 acb->stat = 0; 1133 1134 if (!(flags & SCSI_NOMASK)) 1135 s = splbio(); 1136 1137 TAILQ_INSERT_TAIL(&aic->ready_list, acb, chain); 1138 timeout(aic_timeout, (caddr_t)acb, (xs->timeout*hz)/1000); 1139 1140 if (aic->state == AIC_IDLE) 1141 aic_sched(aic); 1142 1143 if (!(flags & SCSI_NOMASK)) { /* Almost done. Wait outside */ 1144 splx(s); 1145 AIC_MISC(("SUCCESSFULLY_QUEUED")); 1146 return SUCCESSFULLY_QUEUED; 1147 } 1148 1149 /* Not allowed to use interrupts, use polling instead */ 1150 return aic_poll(aic, acb); 1151 } 1152 1153 /* 1154 * Adjust transfer size in buffer structure 1155 */ 1156 static void 1157 aic_minphys(bp) 1158 struct buf *bp; 1159 { 1160 1161 AIC_TRACE(("aic_minphys\n")); 1162 if (bp->b_bcount > (AIC_NSEG << PAGE_SHIFT)) 1163 bp->b_bcount = (AIC_NSEG << PAGE_SHIFT); 1164 } 1165 1166 1167 static u_int32_t 1168 aic_adapter_info(unit) 1169 int unit; 1170 { 1171 1172 AIC_TRACE(("aic_adapter_info\n")); 1173 return (2); /* One outstanding command per target */ 1174 } 1175 1176 /* 1177 * Used when interrupt driven I/O isn't allowed, e.g. during boot. 1178 */ 1179 static int 1180 aic_poll(aic, acb) 1181 struct aic_data *aic; 1182 struct acb *acb; 1183 { 1184 register u_short iobase = aic->iobase; 1185 struct scsi_xfer *xs = acb->xs; 1186 int count = xs->timeout * 10; 1187 1188 AIC_TRACE(("aic_poll\n")); 1189 while (count) { 1190 if (inb(DMASTAT) & INTSTAT) 1191 aicintr(xs->sc_link->adapter_unit); 1192 if (xs->flags & ITSDONE) 1193 break; 1194 DELAY(100); 1195 count--; 1196 } 1197 if (count == 0) { 1198 AIC_MISC(("aic_poll: timeout")); 1199 aic_timeout((caddr_t)acb); 1200 } 1201 if (xs->error) 1202 return HAD_ERROR; 1203 return COMPLETE; 1204 } 1205 1206 /* LOW LEVEL SCSI UTILITIES */ 1207 1208 /* Determine the SCSI bus phase, return either a real SCSI bus phase or some 1209 * pseudo phase we use to detect certain exceptions. This one is a bit tricky. 1210 * The bits we peek at: 1211 * CDI, MSGI and DI is the 3 SCSI signals determining the bus phase. 1212 * These should be qualified by REQI high and ACKI low. 1213 * Also peek at SSTAT0[SELDO|SELDI] to detect a passing BUSFREE condition. 1214 * No longer detect SCSI RESET or PERR here. They are tested for separately 1215 * in the interrupt handler. 1216 * Note: If an exception occur at some critical time during the phase 1217 * determination we'll most likely return something wildly erronous.... 1218 */ 1219 static inline u_short 1220 aicphase(aic) 1221 struct aic_data *aic; 1222 { 1223 register u_short iobase = aic->iobase; 1224 register u_char sstat0, sstat1, scsisig; 1225 1226 sstat1 = inb(SSTAT1); /* Look for REQINIT (REQ asserted) */ 1227 scsisig = inb(SCSISIGI); /* Get the SCSI bus signals */ 1228 sstat0 = inb(SSTAT0); /* Get the selection valid status bits */ 1229 1230 if (!(inb(SSTAT0) & (SELDO|SELDI))) /* Selection became invalid? */ 1231 return PH_BUSFREE; 1232 1233 /* Selection is still valid */ 1234 if (!(sstat1 & REQINIT)) /* REQ not asserted ? */ 1235 return PH_INVALID; 1236 1237 /* REQ is asserted, (and ACK is not) */ 1238 return scsisig & PH_MASK; 1239 } 1240 1241 1242 /* Schedule a scsi operation. This has now been pulled out of the interrupt 1243 * handler so that we may call it from aic_scsi_cmd and aic_done. This may 1244 * save us an unecessary interrupt just to get things going. Should only be 1245 * called when state == AIC_IDLE and at bio pl. 1246 */ 1247 static void 1248 aic_sched(aic) 1249 register struct aic_data *aic; 1250 { 1251 struct scsi_link *sc; 1252 struct acb *acb; 1253 u_short iobase = aic->iobase; 1254 int t; 1255 u_char simode0, simode1, scsiseq; 1256 1257 AIC_TRACE(("aic_sched\n")); 1258 simode0 = ENSELDI; 1259 simode1 = ENSCSIRST|ENSCSIPERR|ENREQINIT; 1260 scsiseq = ENRESELI; 1261 /* 1262 * Find first acb in rdy queue that is for a target/lunit 1263 * combinations that is not busy. 1264 */ 1265 outb(CLRSINT1, CLRSELTIMO|CLRBUSFREE|CLRSCSIPERR); 1266 for (acb = aic->ready_list.tqh_first; acb; acb = acb->chain.tqe_next) { 1267 sc = acb->xs->sc_link; 1268 t = sc->target; 1269 if (!(aic->tinfo[t].lubusy & (1 << sc->lun))) { 1270 TAILQ_REMOVE(&aic->ready_list, acb, chain); 1271 aic->nexus = acb; 1272 aic->state = AIC_SELECTING; 1273 /* 1274 * Start selection process. Always enable 1275 * reselections. Note: we don't have a nexus yet, so 1276 * cannot set aic->state = AIC_HASNEXUS. 1277 */ 1278 simode0 = ENSELDI|ENSELDO; 1279 simode1 = ENSCSIRST|ENSCSIPERR| 1280 ENREQINIT|ENSELTIMO; 1281 scsiseq = ENRESELI|ENSELO|ENAUTOATNO; 1282 outb(SCSIID, AIC_SCSI_HOSTID << OID_S | t); 1283 outb(SXFRCTL1, STIMO_256ms|ENSTIMER); 1284 outb(CLRSINT0, CLRSELDO); 1285 break; 1286 } 1287 #if AIC_DEBUG 1288 else 1289 AIC_MISC(("%d:%d busy\n", t, sc->lun)); 1290 #endif 1291 } 1292 AIC_MISC(("%sselecting\n",scsiseq&ENSELO?"":"re")); 1293 outb(SIMODE0, simode0); 1294 outb(SIMODE1, simode1); 1295 outb(SCSISEQ, scsiseq); 1296 } 1297 1298 1299 /* 1300 * POST PROCESSING OF SCSI_CMD (usually current) 1301 */ 1302 static void 1303 aic_done(acb) 1304 struct acb *acb; 1305 { 1306 struct scsi_xfer *xs = acb->xs; 1307 struct scsi_link *sc = xs->sc_link; 1308 struct aic_data *aic = (struct aic_data *)sc->adapter_softc; 1309 1310 AIC_TRACE(("aic_done ")); 1311 1312 /* 1313 * Now, if we've come here with no error code, i.e. we've kept the 1314 * initial XS_NOERROR, and the status code signals that we should 1315 * check sense, we'll need to set up a request sense cmd block and 1316 * push the command back into the ready queue *before* any other 1317 * commands for this target/lunit, else we lose the sense info. 1318 * We don't support chk sense conditions for the request sense cmd. 1319 */ 1320 if (xs->error == XS_NOERROR && !(acb->flags & ACB_CHKSENSE)) { 1321 if ((acb->stat & ST_MASK)==SCSI_CHECK) { 1322 struct scsi_sense *ss = (void *)&acb->cmd; 1323 AIC_MISC(("requesting sense ")); 1324 /* First, save the return values */ 1325 xs->resid = acb->dleft; 1326 xs->status = acb->stat; 1327 /* Next, setup a request sense command block */ 1328 bzero(ss, sizeof(*ss)); 1329 ss->op_code = REQUEST_SENSE; 1330 ss->byte2 = sc->lun << 5; 1331 ss->length = sizeof(struct scsi_sense_data); 1332 acb->clen = sizeof(*ss); 1333 acb->daddr = (char *)&xs->sense; 1334 acb->dleft = sizeof(struct scsi_sense_data); 1335 acb->flags = ACB_ACTIVE|ACB_CHKSENSE; 1336 TAILQ_INSERT_HEAD(&aic->ready_list, acb, chain); 1337 aic->tinfo[sc->target].lubusy &= ~(1<<sc->lun); 1338 aic->tinfo[sc->target].senses++; 1339 if (aic->nexus == acb) { 1340 aic->nexus = NULL; 1341 aic->state = AIC_IDLE; 1342 aic_sched(aic); 1343 } 1344 return; 1345 } 1346 } 1347 1348 if (xs->flags & SCSI_ERR_OK) { 1349 xs->resid = 0; 1350 xs->error = XS_NOERROR; 1351 } else if (xs->error == XS_NOERROR && (acb->flags & ACB_CHKSENSE)) { 1352 xs->error = XS_SENSE; 1353 } else { 1354 xs->resid = acb->dleft; 1355 } 1356 xs->flags |= ITSDONE; 1357 1358 #if AIC_DEBUG 1359 if (aic_debug & AIC_SHOWMISC) { 1360 printf("err=0x%02x ",xs->error); 1361 if (xs->error == XS_SENSE) 1362 printf("sense=%2x\n", xs->sense.error_code); 1363 } 1364 if ((xs->resid || xs->error > XS_SENSE) && aic_debug & AIC_SHOWMISC) { 1365 if (xs->resid) 1366 printf("aic_done: resid=%d\n", xs->resid); 1367 if (xs->error) 1368 printf("aic_done: error=%d\n", xs->error); 1369 } 1370 #endif 1371 1372 /* 1373 * Remove the ACB from whatever queue it's on. We have to do a bit of 1374 * a hack to figure out which queue it's on. Note that it is *not* 1375 * necessary to cdr down the ready queue, but we must cdr down the 1376 * nexus queue and see if it's there, so we can mark the unit as no 1377 * longer busy. This code is sickening, but it works. 1378 */ 1379 if (acb == aic->nexus) { 1380 #if NAPM > 0 && NCARD > 0 1381 /* SlimSCSI dies without this when it resumes from suspend */ 1382 aic->nexus = NULL; 1383 #endif 1384 aic->state = AIC_IDLE; 1385 aic->tinfo[sc->target].lubusy &= ~(1<<sc->lun); 1386 aic_sched(aic); 1387 } else if (aic->ready_list.tqh_last == &acb->chain.tqe_next) { 1388 TAILQ_REMOVE(&aic->ready_list, acb, chain); 1389 } else { 1390 register struct acb *acb2; 1391 for (acb2 = aic->nexus_list.tqh_first; acb2; 1392 acb2 = acb2->chain.tqe_next) 1393 if (acb2 == acb) { 1394 TAILQ_REMOVE(&aic->nexus_list, acb, chain); 1395 aic->tinfo[sc->target].lubusy &= ~(1<<sc->lun); 1396 /* XXXX Should we call aic_sched() here? */ 1397 break; 1398 } 1399 if (acb2) 1400 ; 1401 else if (acb->chain.tqe_next) { 1402 TAILQ_REMOVE(&aic->ready_list, acb, chain); 1403 } else { 1404 printf("aic%d: can't find matching acb\n", 1405 xs->sc_link->adapter_unit); 1406 Debugger("aic6360"); 1407 fatal_if_no_DDB(); 1408 } 1409 } 1410 /* Put it on the free list. */ 1411 acb->flags = ACB_FREE; 1412 TAILQ_INSERT_HEAD(&aic->free_list, acb, chain); 1413 1414 aic->tinfo[sc->target].cmds++; 1415 scsi_done(xs); 1416 return; 1417 } 1418 1419 /* 1420 * INTERRUPT/PROTOCOL ENGINE 1421 */ 1422 1423 /* The message system: 1424 * This is a revamped message system that now should easier accomodate new 1425 * messages, if necessary. 1426 * Currently we accept these messages: 1427 * IDENTIFY (when reselecting) 1428 * COMMAND COMPLETE # (expect bus free after messages marked #) 1429 * NOOP 1430 * MESSAGE REJECT 1431 * SYNCHRONOUS DATA TRANSFER REQUEST 1432 * SAVE DATA POINTER 1433 * RESTORE POINTERS 1434 * DISCONNECT # 1435 * 1436 * We may send these messages in prioritized order: 1437 * BUS DEVICE RESET # if SCSI_RESET & xs->flags (or in weird sits.) 1438 * MESSAGE PARITY ERROR par. err. during MSGI 1439 * MESSAGE REJECT If we get a message we don't know how to handle 1440 * ABORT # send on errors 1441 * INITIATOR DETECTED ERROR also on errors (SCSI2) (during info xfer) 1442 * IDENTIFY At the start of each transfer 1443 * SYNCHRONOUS DATA TRANSFER REQUEST if appropriate 1444 * NOOP if nothing else fits the bill ... 1445 */ 1446 1447 #define aic_sched_msgout(m) \ 1448 do { \ 1449 orreg(SCSISIGO, ATNO); \ 1450 aic->msgpriq |= (m); \ 1451 } while (0) 1452 1453 #define IS1BYTEMSG(m) (((m) != 1 && (m) < 0x20) || (m) >= 0x80) 1454 #define IS2BYTEMSG(m) (((m) & 0xf0) == 0x20) 1455 #define ISEXTMSG(m) ((m) == 1) 1456 /* Precondition: 1457 * The SCSI bus is already in the MSGI phase and there is a message byte 1458 * on the bus, along with an asserted REQ signal. 1459 */ 1460 static void 1461 aic_msgin(aic) 1462 register struct aic_data *aic; 1463 { 1464 register u_short iobase = aic->iobase; 1465 int spincount, extlen; 1466 u_char sstat1; 1467 1468 AIC_TRACE(("aic_msgin ")); 1469 outb(SCSISIGO, PH_MSGI); 1470 /* Prepare for a new message. A message should (according to the SCSI 1471 * standard) be transmitted in one single message_in phase. 1472 * If we have been in some other phase, then this is a new message. 1473 */ 1474 if (aic->prevphase != PH_MSGI) { 1475 aic->flags &= ~AIC_DROP_MSGI; 1476 aic->imlen = 0; 1477 } 1478 /* 1479 * Read a whole message but the last byte. If we shall reject the 1480 * message, we shall have to do it, by asserting ATNO, during the 1481 * message transfer phase itself. 1482 */ 1483 for (;;) { 1484 sstat1 = inb(SSTAT1); 1485 /* If parity errors just dump everything on the floor, also 1486 * a parity error automatically sets ATNO 1487 */ 1488 if (sstat1 & SCSIPERR) { 1489 aic_sched_msgout(SEND_PARITY_ERROR); 1490 aic->flags |= AIC_DROP_MSGI; 1491 } 1492 /* 1493 * If we're going to reject the message, don't bother storing 1494 * the incoming bytes. But still, we need to ACK them. 1495 */ 1496 if (!(aic->flags & AIC_DROP_MSGI)) { 1497 /* Get next message byte */ 1498 aic->imess[aic->imlen] = inb(SCSIDAT); 1499 /* 1500 * This testing is suboptimal, but most messages will 1501 * be of the one byte variety, so it should not effect 1502 * performance significantly. 1503 */ 1504 if (IS1BYTEMSG(aic->imess[0])) 1505 break; 1506 if (IS2BYTEMSG(aic->imess[0]) && aic->imlen == 1) 1507 break; 1508 if (ISEXTMSG(aic->imess[0]) && aic->imlen > 0) { 1509 if (aic->imlen == AIC_MAX_MSG_LEN) { 1510 aic->flags |= AIC_DROP_MSGI; 1511 aic_sched_msgout(SEND_REJECT); 1512 } 1513 extlen = aic->imess[1] ? aic->imess[1] : 256; 1514 if (aic->imlen == extlen + 2) 1515 break; /* Got it all */ 1516 } 1517 } 1518 /* If we reach this spot we're either: 1519 * a) in the middle of a multi-byte message or 1520 * b) we're dropping bytes 1521 */ 1522 outb(SXFRCTL0, CHEN|SPIOEN); 1523 inb(SCSIDAT); /* Really read it (ACK it, that is) */ 1524 outb(SXFRCTL0, CHEN); 1525 aic->imlen++; 1526 1527 /* 1528 * We expect the bytes in a multibyte message to arrive 1529 * relatively close in time, a few microseconds apart. 1530 * Therefore we will spinwait for some small amount of time 1531 * waiting for the next byte. 1532 */ 1533 spincount = DELAYCOUNT * AIC_MSGI_SPIN; 1534 LOGLINE(aic); 1535 while (spincount-- && !((sstat1 = inb(SSTAT1)) & REQINIT)) 1536 ; 1537 if (spincount == -1 || sstat1 & (PHASEMIS|BUSFREE)) 1538 return; 1539 } 1540 /* Now we should have a complete message (1 byte, 2 byte and moderately 1541 * long extended messages). We only handle extended messages which 1542 * total length is shorter than AIC_MAX_MSG_LEN. Longer messages will 1543 * be amputated. (Return XS_BOBBITT ?) 1544 */ 1545 if (aic->state == AIC_HASNEXUS) { 1546 struct acb *acb = aic->nexus; 1547 struct aic_tinfo *ti = &aic->tinfo[acb->xs->sc_link->target]; 1548 int offs, per, rate; 1549 1550 outb(SIMODE1, ENSCSIRST|ENPHASEMIS|ENBUSFREE|ENSCSIPERR); 1551 switch (aic->imess[0]) { 1552 case MSG_CMDCOMPLETE: 1553 if (!acb) { 1554 aic_sched_msgout(SEND_ABORT); 1555 printf("aic: CMDCOMPLETE but no command?\n"); 1556 break; 1557 } 1558 if (aic->dleft < 0) { 1559 struct scsi_link *sc = acb->xs->sc_link; 1560 printf("aic: %d extra bytes from %d:%d\n", 1561 -aic->dleft, sc->target, sc->lun); 1562 acb->dleft = 0; 1563 } 1564 acb->xs->resid = acb->dleft = aic->dleft; 1565 aic->flags |= AIC_BUSFREE_OK; 1566 untimeout(aic_timeout, (caddr_t)acb); 1567 aic_done(acb); 1568 break; 1569 case MSG_MESSAGE_REJECT: 1570 if (aic_debug & AIC_SHOWMISC) 1571 printf("aic: our msg rejected by target\n"); 1572 if (aic->flags & AIC_SYNCHNEGO) { 1573 ti->syncdata = 0; 1574 ti->persgst = ti->offsgst = 0; 1575 aic->flags &= ~AIC_SYNCHNEGO; 1576 ti->flags &= ~DO_NEGOTIATE; 1577 } 1578 /* Not all targets understand INITIATOR_DETECTED_ERR */ 1579 if (aic->msgout == SEND_INIT_DET_ERR) 1580 aic_sched_msgout(SEND_ABORT); 1581 break; 1582 case MSG_NOOP: /* Will do! Immediately, sir!*/ 1583 break; /* Hah, that was easy! */ 1584 case MSG_DISCONNECT: 1585 if (!acb) { 1586 aic_sched_msgout(SEND_ABORT); 1587 printf("aic: nothing to DISCONNECT\n"); 1588 break; 1589 } 1590 ti->dconns++; 1591 TAILQ_INSERT_HEAD(&aic->nexus_list, acb, chain); 1592 acb = aic->nexus = NULL; 1593 aic->state = AIC_IDLE; 1594 aic->flags |= AIC_BUSFREE_OK; 1595 break; 1596 case MSG_SAVEDATAPOINTER: 1597 if (!acb) { 1598 aic_sched_msgout(SEND_ABORT); 1599 printf("aic: no DATAPOINTERs to save\n"); 1600 break; 1601 } 1602 acb->dleft = aic->dleft; 1603 acb->daddr = aic->dp; 1604 break; 1605 case MSG_RESTOREPOINTERS: 1606 if (!acb) { 1607 aic_sched_msgout(SEND_ABORT); 1608 printf("aic: no DATAPOINTERs to restore\n"); 1609 break; 1610 } 1611 aic->dp = acb->daddr; 1612 aic->dleft = acb->dleft; 1613 break; 1614 case MSG_EXTENDED: 1615 switch (aic->imess[2]) { 1616 case MSG_EXT_SDTR: 1617 per = aic->imess[3] * 4; 1618 rate = (per + 49 - 100)/50; 1619 offs = aic->imess[4]; 1620 if (offs == 0) 1621 ti->syncdata = 0; 1622 else if (rate > 7) { 1623 /* Too slow for aic6360. Do asynch 1624 * instead. Renegotiate the deal. 1625 */ 1626 ti->persgst = 0; 1627 ti->offsgst = 0; 1628 aic_sched_msgout(SEND_SDTR); 1629 } else { 1630 rate = rate<<4 | offs; 1631 ti->syncdata = rate; 1632 } 1633 break; 1634 default: /* Extended messages we don't handle */ 1635 aic_sched_msgout(SEND_REJECT); 1636 break; 1637 } 1638 break; 1639 default: 1640 aic_sched_msgout(SEND_REJECT); 1641 break; 1642 } 1643 } else if (aic->state == AIC_RESELECTED) { 1644 struct scsi_link *sc; 1645 struct acb *acb; 1646 u_char selid, lunit; 1647 /* 1648 * Which target is reselecting us? (The ID bit really) 1649 */ 1650 selid = inb(SELID) & ~(1<<AIC_SCSI_HOSTID); 1651 if (MSG_ISIDENT(aic->imess[0])) { /* Identify? */ 1652 AIC_MISC(("searching ")); 1653 /* Search wait queue for disconnected cmd 1654 * The list should be short, so I haven't bothered with 1655 * any more sophisticated structures than a simple 1656 * singly linked list. 1657 */ 1658 lunit = aic->imess[0] & 0x07; 1659 for (acb = aic->nexus_list.tqh_first; acb; 1660 acb = acb->chain.tqe_next) { 1661 sc = acb->xs->sc_link; 1662 if (sc->lun == lunit && 1663 selid == (1<<sc->target)) { 1664 TAILQ_REMOVE(&aic->nexus_list, acb, 1665 chain); 1666 break; 1667 } 1668 } 1669 if (!acb) { /* Invalid reselection! */ 1670 aic_sched_msgout(SEND_ABORT); 1671 printf("aic: invalid reselect (idbit=0x%2x)\n", 1672 selid); 1673 } else { /* Reestablish nexus */ 1674 /* Setup driver data structures and 1675 * do an implicit RESTORE POINTERS 1676 */ 1677 aic->nexus = acb; 1678 aic->dp = acb->daddr; 1679 aic->dleft = acb->dleft; 1680 aic->tinfo[sc->target].lubusy |= (1<<sc->lun); 1681 outb(SCSIRATE,aic->tinfo[sc->target].syncdata); 1682 AIC_MISC(("... found acb")); 1683 aic->state = AIC_HASNEXUS; 1684 } 1685 } else { 1686 printf("aic: bogus reselect (no IDENTIFY) %0x2x\n", 1687 selid); 1688 aic_sched_msgout(SEND_DEV_RESET); 1689 } 1690 } else { /* Neither AIC_HASNEXUS nor AIC_RESELECTED! */ 1691 printf("aic: unexpected message in; will send DEV_RESET\n"); 1692 aic_sched_msgout(SEND_DEV_RESET); 1693 } 1694 /* Must not forget to ACK the last message byte ... */ 1695 outb(SXFRCTL0, CHEN|SPIOEN); 1696 inb(SCSIDAT); 1697 outb(SXFRCTL0, CHEN); 1698 outb(SIMODE1, ENSCSIRST|ENBUSFREE|ENSCSIPERR|ENREQINIT); 1699 } 1700 1701 1702 /* The message out (and in) stuff is a bit complicated: 1703 * If the target requests another message (sequence) without 1704 * having changed phase in between it really asks for a 1705 * retransmit, probably due to parity error(s). 1706 * The following messages can be sent: 1707 * IDENTIFY @ These 3 stems from scsi command activity 1708 * BUS_DEV_RESET @ 1709 * IDENTIFY + SDTR @ 1710 * MESSAGE_REJECT if MSGI doesn't make sense 1711 * MESSAGE_PARITY_ERROR if MSGI spots a parity error 1712 * NOOP if asked for a message and there's nothing to send 1713 */ 1714 static void 1715 aic_msgout(aic) 1716 register struct aic_data *aic; 1717 { 1718 register u_short iobase = aic->iobase; 1719 struct aic_tinfo *ti; 1720 struct acb *acb; 1721 1722 /* First determine what to send. If we haven't seen a 1723 * phasechange this is a retransmission request. 1724 */ 1725 outb(SCSISIGO, PH_MSGO); 1726 if (aic->prevphase != PH_MSGO) { /* NOT a retransmit */ 1727 /* Pick up highest priority message */ 1728 aic->msgout = aic->msgpriq & -aic->msgpriq; /* What message? */ 1729 aic->omlen = 1; /* "Default" message len */ 1730 switch (aic->msgout) { 1731 case SEND_SDTR: /* Also implies an IDENTIFY message */ 1732 acb = aic->nexus; 1733 ti = &aic->tinfo[acb->xs->sc_link->target]; 1734 aic->omess[1] = MSG_EXTENDED; 1735 aic->omess[2] = 3; 1736 aic->omess[3] = MSG_EXT_SDTR; 1737 aic->omess[4] = ti->persgst >> 2; 1738 aic->omess[5] = ti->offsgst; 1739 aic->omlen = 6; 1740 /* Fallthrough! */ 1741 case SEND_IDENTIFY: 1742 if (aic->state != AIC_HASNEXUS) { 1743 printf("aic at line %d: no nexus", __LINE__); 1744 Debugger("aic6360"); 1745 fatal_if_no_DDB(); 1746 } 1747 acb = aic->nexus; 1748 aic->omess[0] = MSG_IDENTIFY(acb->xs->sc_link->lun); 1749 break; 1750 case SEND_DEV_RESET: 1751 aic->omess[0] = MSG_BUS_DEV_RESET; 1752 aic->flags |= AIC_BUSFREE_OK; 1753 break; 1754 case SEND_PARITY_ERROR: 1755 aic->omess[0] = MSG_PARITY_ERR; 1756 break; 1757 case SEND_ABORT: 1758 aic->omess[0] = MSG_ABORT; 1759 aic->flags |= AIC_BUSFREE_OK; 1760 break; 1761 case SEND_INIT_DET_ERR: 1762 aic->omess[0] = MSG_INITIATOR_DET_ERR; 1763 break; 1764 case SEND_REJECT: 1765 aic->omess[0] = MSG_MESSAGE_REJECT; 1766 break; 1767 default: 1768 aic->omess[0] = MSG_NOOP; 1769 break; 1770 } 1771 aic->omp = aic->omess; 1772 } else if (aic->omp == &aic->omess[aic->omlen]) { 1773 /* Have sent the message at least once, this is a retransmit. 1774 */ 1775 AIC_MISC(("retransmitting ")); 1776 if (aic->omlen > 1) 1777 outb(SCSISIGO, PH_MSGO|ATNO); 1778 } 1779 /* else, we're in the middle of a multi-byte message */ 1780 outb(SXFRCTL0, CHEN|SPIOEN); 1781 outb(DMACNTRL0, INTEN|RSTFIFO); 1782 outb(SIMODE1, ENSCSIRST|ENBUSFREE|ENSCSIPERR|ENREQINIT); 1783 do { 1784 LOGLINE(aic); 1785 do { 1786 aic->phase = aicphase(aic); 1787 } while (aic->phase == PH_INVALID); 1788 if (aic->phase != PH_MSGO) 1789 /* Target left MSGO, possibly to reject our 1790 * message 1791 */ 1792 break; 1793 /* Clear ATN before last byte */ 1794 if (aic->omp == &aic->omess[aic->omlen-1]) 1795 outb(CLRSINT1, CLRATNO); 1796 outb(SCSIDAT, *aic->omp++); /* Send MSG */ 1797 LOGLINE(aic); 1798 while (inb(SCSISIGI) & ACKO) 1799 ; 1800 } while (aic->omp != &aic->omess[aic->omlen]); 1801 aic->progress = aic->omp != aic->omess; 1802 /* We get here in two ways: 1803 * a) phase != MSGO. Target is probably going to reject our message 1804 * b) aic->omp == &aic->omess[aic->omlen], i.e. the message has been 1805 * transmitted correctly and accepted by the target. 1806 */ 1807 if (aic->phase == PH_MSGO) { /* Message accepted by target! */ 1808 aic->msgpriq &= ~aic->msgout; 1809 aic->msgout = 0; 1810 } 1811 outb(SXFRCTL0, CHEN); /* Disable SPIO */ 1812 outb(SIMODE0, 0); /* Setup interrupts before leaving */ 1813 outb(SIMODE1, ENSCSIRST|ENBUSFREE|ENSCSIPERR|ENREQINIT); 1814 /* Enabled ints: SCSIPERR, SCSIRSTI (unexpected) 1815 * REQINIT (expected) BUSFREE (possibly expected) 1816 */ 1817 } 1818 1819 /* aic_dataout: perform a data transfer using the FIFO datapath in the aic6360 1820 * Precondition: The SCSI bus should be in the DOUT phase, with REQ asserted 1821 * and ACK deasserted (i.e. waiting for a data byte) 1822 * This new revision has been optimized (I tried) to make the common case fast, 1823 * and the rarer cases (as a result) somewhat more comlex 1824 */ 1825 static void 1826 aic_dataout(aic) 1827 register struct aic_data *aic; 1828 { 1829 register u_short iobase = aic->iobase; 1830 register u_char dmastat; 1831 int amount, olddleft = aic->dleft; 1832 #define DOUTAMOUNT 128 /* Full FIFO */ 1833 1834 /* Enable DATA OUT transfers */ 1835 outb(SCSISIGO, PH_DOUT); 1836 outb(CLRSINT1, CLRPHASECHG); 1837 /* Clear FIFOs and counters */ 1838 outb(SXFRCTL0, CHEN|CLRSTCNT|CLRCH); 1839 outb(DMACNTRL0, WRITE|INTEN|RSTFIFO); 1840 /* Enable FIFOs */ 1841 outb(SXFRCTL0, SCSIEN|DMAEN|CHEN); 1842 outb(DMACNTRL0, ENDMA|DWORDPIO|WRITE|INTEN); 1843 1844 /* Setup to detect: 1845 * PHASEMIS & PHASECHG: target has left the DOUT phase 1846 * SCSIRST: something just pulled the RST line. 1847 * BUSFREE: target has unexpectedly left the DOUT phase 1848 */ 1849 outb(SIMODE1, ENPHASEMIS|ENSCSIRST|ENBUSFREE|ENPHASECHG); 1850 1851 /* I have tried to make the main loop as tight as possible. This 1852 * means that some of the code following the loop is a bit more 1853 * complex than otherwise. 1854 */ 1855 while (aic->dleft) { 1856 int xfer; 1857 1858 LOGLINE(aic); 1859 1860 for (;;) { 1861 dmastat = inb(DMASTAT); 1862 if (dmastat & DFIFOEMP) 1863 break; 1864 if (dmastat & INTSTAT) 1865 goto phasechange; 1866 } 1867 1868 xfer = min(DOUTAMOUNT, aic->dleft); 1869 1870 #if AIC_USE_DWORDS 1871 if (xfer >= 12) { 1872 outsl(DMADATALONG, aic->dp, xfer/4); 1873 aic->dleft -= xfer & ~3; 1874 aic->dp += xfer & ~3; 1875 xfer &= 3; 1876 } 1877 #else 1878 if (xfer >= 8) { 1879 outsw(DMADATA, aic->dp, xfer/2); 1880 aic->dleft -= xfer & ~1; 1881 aic->dp += xfer & ~1; 1882 xfer &= 1; 1883 } 1884 #endif 1885 1886 if (xfer) { 1887 outb(DMACNTRL0, ENDMA|B8MODE|INTEN); 1888 outsb(DMADATA, aic->dp, xfer); 1889 aic->dleft -= xfer; 1890 aic->dp += xfer; 1891 outb(DMACNTRL0, ENDMA|DWORDPIO|INTEN); 1892 } 1893 } 1894 1895 /* See the bytes off chip */ 1896 for (;;) { 1897 dmastat = inb(DMASTAT); 1898 if ((dmastat & DFIFOEMP) && (inb(SSTAT2) & SEMPTY)) 1899 break; 1900 if (dmastat & INTSTAT) 1901 goto phasechange; 1902 } 1903 1904 phasechange: 1905 /* We now have the data off chip. */ 1906 outb(SXFRCTL0, CHEN); 1907 1908 if (dmastat & INTSTAT) { /* Some sort of phasechange */ 1909 register u_char sstat2; 1910 /* Stop transfers, do some accounting */ 1911 amount = inb(FIFOSTAT); 1912 sstat2 = inb(SSTAT2); 1913 if ((sstat2 & 7) == 0) 1914 amount += sstat2 & SFULL ? 8 : 0; 1915 else 1916 amount += sstat2 & 7; 1917 aic->dleft += amount; 1918 aic->dp -= amount; 1919 AIC_MISC(("+%d ", amount)); 1920 } 1921 1922 outb(DMACNTRL0, RSTFIFO|INTEN); 1923 LOGLINE(aic); 1924 while (inb(SXFRCTL0) & SCSIEN) 1925 ; 1926 outb(SIMODE1, ENSCSIRST|ENBUSFREE|ENSCSIPERR|ENREQINIT); 1927 /* Enabled ints: BUSFREE, SCSIPERR, SCSIRSTI (unexpected) 1928 * REQINIT (expected) 1929 */ 1930 aic->progress = olddleft != aic->dleft; 1931 return; 1932 } 1933 1934 /* aic_datain: perform data transfers using the FIFO datapath in the aic6360 1935 * Precondition: The SCSI bus should be in the DIN phase, with REQ asserted 1936 * and ACK deasserted (i.e. at least one byte is ready). 1937 * For now, uses a pretty dumb algorithm, hangs around until all data has been 1938 * transferred. This, is OK for fast targets, but not so smart for slow 1939 * targets which don't disconnect or for huge transfers. 1940 */ 1941 static void 1942 aic_datain(aic) 1943 register struct aic_data *aic; 1944 { 1945 register u_short iobase = aic->iobase; 1946 register u_char dmastat; 1947 int olddleft = aic->dleft; 1948 #define DINAMOUNT 128 /* Default amount of data to transfer */ 1949 1950 /* Enable DATA IN transfers */ 1951 outb(SCSISIGO, PH_DIN); 1952 outb(CLRSINT1, CLRPHASECHG); 1953 /* Clear FIFOs and counters */ 1954 outb(SXFRCTL0, CHEN|CLRSTCNT|CLRCH); 1955 outb(DMACNTRL0, INTEN|RSTFIFO); 1956 /* Enable FIFOs */ 1957 outb(SXFRCTL0, SCSIEN|DMAEN|CHEN); 1958 outb(DMACNTRL0, ENDMA|DWORDPIO|INTEN); 1959 1960 outb(SIMODE1, ENSCSIRST|ENPHASEMIS|ENBUSFREE|ENPHASECHG); 1961 1962 /* We leave this loop if one or more of the following is true: 1963 * a) phase != PH_DIN && FIFOs are empty 1964 * b) SCSIRSTI is set (a reset has occurred) or busfree is detected. 1965 */ 1966 while (aic->dleft) { 1967 int done = 0; 1968 int xfer; 1969 1970 LOGLINE(aic); 1971 1972 /* Wait for fifo half full or phase mismatch */ 1973 for (;;) { 1974 dmastat = inb(DMASTAT); 1975 if (dmastat & (DFIFOFULL|INTSTAT)) 1976 break; 1977 } 1978 1979 if (dmastat & DFIFOFULL) 1980 xfer = DINAMOUNT; 1981 else { 1982 while ((inb(SSTAT2) & SEMPTY) == 0) 1983 ; 1984 xfer = inb(FIFOSTAT); 1985 done = 1; 1986 } 1987 1988 xfer = min(xfer, aic->dleft); 1989 1990 #if AIC_USE_DWORDS 1991 if (xfer >= 12) { 1992 insl(DMADATALONG, aic->dp, xfer/4); 1993 aic->dleft -= xfer & ~3; 1994 aic->dp += xfer & ~3; 1995 xfer &= 3; 1996 } 1997 #else 1998 if (xfer >= 8) { 1999 insw(DMADATA, aic->dp, xfer/2); 2000 aic->dleft -= xfer & ~1; 2001 aic->dp += xfer & ~1; 2002 xfer &= 1; 2003 } 2004 #endif 2005 2006 if (xfer) { 2007 outb(DMACNTRL0, ENDMA|B8MODE|INTEN); 2008 insb(DMADATA, aic->dp, xfer); 2009 aic->dleft -= xfer; 2010 aic->dp += xfer; 2011 outb(DMACNTRL0, ENDMA|DWORDPIO|INTEN); 2012 } 2013 2014 if (done) 2015 break; 2016 } 2017 2018 #if 0 2019 if (aic->dleft) 2020 printf("residual of %d\n", aic->dleft); 2021 #endif 2022 2023 aic->progress = olddleft != aic->dleft; 2024 /* Some SCSI-devices are rude enough to transfer more data than what 2025 * was requested, e.g. 2048 bytes from a CD-ROM instead of the 2026 * requested 512. Test for progress, i.e. real transfers. If no real 2027 * transfers have been performed (acb->dleft is probably already zero) 2028 * and the FIFO is not empty, waste some bytes.... 2029 */ 2030 if (!aic->progress) { 2031 int extra = 0; 2032 LOGLINE(aic); 2033 2034 for (;;) { 2035 dmastat = inb(DMASTAT); 2036 if (dmastat & DFIFOEMP) 2037 break; 2038 (void) inb(DMADATA); /* Throw it away */ 2039 extra++; 2040 } 2041 2042 AIC_MISC(("aic: %d extra bytes from %d:%d\n", extra, 2043 acb->xs->sc_link->target, acb->xs->sc_link->lun)); 2044 aic->progress = extra; 2045 } 2046 2047 /* Stop the FIFO data path */ 2048 outb(SXFRCTL0, CHEN); 2049 2050 outb(DMACNTRL0, RSTFIFO|INTEN); 2051 /* Come back when REQ is set again */ 2052 outb(SIMODE1, ENSCSIRST|ENBUSFREE|ENSCSIPERR|ENREQINIT); 2053 LOGLINE(aic); 2054 } 2055 2056 2057 /* 2058 * This is the workhorse routine of the driver. 2059 * Deficiencies (for now): 2060 * 1) always uses programmed I/O 2061 * 2) doesn't support synchronous transfers properly (yet) 2062 */ 2063 2064 void 2065 aicintr(int unit) 2066 { 2067 struct aic_data *aic = aicdata[unit]; 2068 register struct acb *acb; 2069 register struct scsi_link *sc; 2070 register u_short iobase = aic->iobase; 2071 struct aic_tinfo *ti; 2072 u_char sstat0, sstat1, sstat2, sxfrctl0; 2073 2074 2075 LOGLINE(aic); 2076 /* Clear INTEN. This is important if we're running with edge 2077 * triggered interrupts as we don't guarantee that all interrupts will 2078 * be served during one single invocation of this routine, i.e. we may 2079 * need another edge. 2080 */ 2081 outb(DMACNTRL0, 0); 2082 AIC_TRACE(("aicintr\n")); 2083 2084 /* 2085 * 1st check for abnormal conditions, such as reset or parity errors 2086 */ 2087 sstat1 = inb(SSTAT1); 2088 AIC_MISC(("s1:0x%02x ", sstat1)); 2089 if (sstat1 & (SCSIRSTI|SCSIPERR)) { 2090 if (sstat1 & SCSIRSTI) { 2091 printf("aic: reset in -- reinitializing....\n"); 2092 aic_init(aic); /* Restart everything */ 2093 LOGLINE(aic); 2094 outb(DMACNTRL0, INTEN); 2095 return; 2096 } else { 2097 printf("aic: SCSI bus parity error\n"); 2098 outb(CLRSINT1, CLRSCSIPERR); 2099 if (aic->prevphase == PH_MSGI) 2100 aic_sched_msgout(SEND_PARITY_ERROR); 2101 else 2102 aic_sched_msgout(SEND_INIT_DET_ERR); 2103 } 2104 } 2105 2106 /* 2107 * If we're not already busy doing something test for the following 2108 * conditions: 2109 * 1) We have been reselected by something 2110 * 2) We have selected something successfully 2111 * 3) Our selection process has timed out 2112 * 4) This is really a bus free interrupt just to get a new command 2113 * going? 2114 * 5) Spurious interrupt? 2115 */ 2116 sstat0 = inb(SSTAT0); 2117 AIC_MISC(("s0:0x%02x ", sstat0)); 2118 if (aic->state != AIC_HASNEXUS) { /* No nexus yet */ 2119 if (sstat0 & SELDI) { 2120 LOGLINE(aic); 2121 /* We have been reselected. Things to do: 2122 * a) If we're trying to select something ourselves 2123 * back off the current command. 2124 * b) "Wait" for a message in phase (IDENTIFY) 2125 * c) Call aic_msgin() to get the identify message and 2126 * retrieve the disconnected command from the wait 2127 * queue. 2128 */ 2129 AIC_MISC(("reselect ")); 2130 /* If we're trying to select a target ourselves, 2131 * push our command back into the rdy list. 2132 */ 2133 if (aic->state == AIC_SELECTING) { 2134 AIC_MISC(("backoff selector ")); 2135 TAILQ_INSERT_HEAD(&aic->ready_list, aic->nexus, 2136 chain); 2137 aic->nexus = NULL; 2138 } 2139 aic->state = AIC_RESELECTED; 2140 /* Clear interrupts, disable future selection stuff 2141 * including select interrupts and timeouts 2142 */ 2143 outb(CLRSINT0, CLRSELDI); 2144 outb(SCSISEQ, 0); 2145 outb(SIMODE0, 0); 2146 /* Setup chip so we may detect spurious busfree 2147 * conditions later. 2148 */ 2149 outb(CLRSINT1, CLRBUSFREE); 2150 outb(SIMODE1, ENSCSIRST|ENBUSFREE| 2151 ENSCSIPERR|ENREQINIT); 2152 /* Now, we're expecting an IDENTIFY message. */ 2153 aic->phase = aicphase(aic); 2154 if (aic->phase & PH_PSBIT) { 2155 LOGLINE(aic); 2156 outb(DMACNTRL0, INTEN); 2157 return; /* Come back when REQ is set */ 2158 } 2159 if (aic->phase == PH_MSGI) 2160 aic_msgin(aic); /* Handle identify message */ 2161 else { 2162 /* Things are seriously fucked up. 2163 * Pull the brakes, i.e. RST 2164 */ 2165 printf("aic at line %d: target didn't identify\n", __LINE__); 2166 Debugger("aic6360"); 2167 fatal_if_no_DDB(); 2168 aic_init(aic); 2169 return; 2170 } 2171 if (aic->state != AIC_HASNEXUS) {/* IDENTIFY fail?! */ 2172 printf("aic at line %d: identify failed\n", 2173 __LINE__); 2174 aic_init(aic); 2175 return; 2176 } else { 2177 outb(SIMODE1, 2178 ENSCSIRST|ENBUSFREE|ENSCSIPERR|ENREQINIT); 2179 /* Fallthrough to HASNEXUS part of aicintr */ 2180 } 2181 } else if (sstat0 & SELDO) { 2182 LOGLINE(aic); 2183 /* We have selected a target. Things to do: 2184 * a) Determine what message(s) to send. 2185 * b) Verify that we're still selecting the target. 2186 * c) Mark device as busy. 2187 */ 2188 acb = aic->nexus; 2189 if (!acb) { 2190 printf("aic at line %d: missing acb", __LINE__); 2191 Debugger("aic6360"); 2192 fatal_if_no_DDB(); 2193 } 2194 sc = acb->xs->sc_link; 2195 ti = &aic->tinfo[sc->target]; 2196 if (acb->xs->flags & SCSI_RESET) 2197 aic->msgpriq = SEND_DEV_RESET; 2198 else if (ti->flags & DO_NEGOTIATE) 2199 aic->msgpriq = SEND_IDENTIFY|SEND_SDTR; 2200 else 2201 aic->msgpriq = SEND_IDENTIFY; 2202 /* Setup chip to enable later testing for busfree 2203 * conditions 2204 */ 2205 outb(CLRSINT1, CLRBUSFREE); 2206 outb(SCSISEQ, 0); /* Stop selection stuff */ 2207 nandreg(SIMODE0, ENSELDO); /* No more selectout ints */ 2208 sstat0 = inb(SSTAT0); 2209 if (sstat0 & SELDO) { /* Still selected!? */ 2210 outb(SIMODE0, 0); 2211 outb(SIMODE1, ENSCSIRST|ENSCSIPERR| 2212 ENBUSFREE|ENREQINIT); 2213 aic->state = AIC_HASNEXUS; 2214 aic->flags = 0; 2215 aic->prevphase = PH_INVALID; 2216 aic->dp = acb->daddr; 2217 aic->dleft = acb->dleft; 2218 ti->lubusy |= (1<<sc->lun); 2219 AIC_MISC(("select ok ")); 2220 } else { 2221 /* Has seen busfree since selection, i.e. 2222 * a "spurious" selection. Shouldn't happen. 2223 */ 2224 printf("aic: unexpected busfree\n"); 2225 acb->xs->error = XS_DRIVER_STUFFUP; 2226 untimeout(aic_timeout, (caddr_t)acb); 2227 aic_done(acb); 2228 } 2229 LOGLINE(aic); 2230 outb(DMACNTRL0, INTEN); 2231 return; 2232 } else if (sstat1 & SELTO) { 2233 /* Selection timed out. What to do: 2234 * Disable selections out and fail the command with 2235 * code XS_TIMEOUT. 2236 */ 2237 acb = aic->nexus; 2238 if (!acb) { 2239 printf("aic at line %d: missing acb", __LINE__); 2240 Debugger("aic6360"); 2241 fatal_if_no_DDB(); 2242 } 2243 outb(SCSISEQ, ENRESELI|ENAUTOATNP); 2244 outb(SXFRCTL1, 0); 2245 outb(CLRSINT1, CLRSELTIMO); 2246 aic->state = AIC_IDLE; 2247 acb->xs->error = XS_TIMEOUT; 2248 untimeout(aic_timeout, (caddr_t)acb); 2249 aic_done(acb); 2250 LOGLINE(aic); 2251 outb(DMACNTRL0, INTEN); 2252 return; 2253 } else { 2254 /* Assume a bus free interrupt. What to do: 2255 * Start selecting. 2256 */ 2257 if (aic->state == AIC_IDLE) 2258 aic_sched(aic); 2259 #if AIC_DEBUG 2260 else 2261 AIC_MISC(("Extra aic6360 interrupt.")); 2262 #endif 2263 LOGLINE(aic); 2264 outb(DMACNTRL0, INTEN); 2265 return; 2266 } 2267 } 2268 /* Driver is now in state AIC_HASNEXUS, i.e. we have a current command 2269 * working the SCSI bus. 2270 */ 2271 acb = aic->nexus; 2272 if (aic->state != AIC_HASNEXUS || acb == NULL) { 2273 printf("aic: no nexus!!\n"); 2274 Debugger("aic6360"); 2275 fatal_if_no_DDB(); 2276 } 2277 2278 /* What sort of transfer does the bus signal? */ 2279 aic->phase = aicphase(aic); 2280 if (!(aic->phase & PH_PSBIT)) /* not a pseudo phase */ 2281 outb(SCSISIGO, aic->phase); 2282 outb(CLRSINT1, CLRPHASECHG); 2283 /* These interrupts are enabled by default: 2284 * SCSIRSTI, SCSIPERR, BUSFREE, REQINIT 2285 */ 2286 switch (aic->phase) { 2287 case PH_MSGO: 2288 LOGLINE(aic); 2289 if (aic_debug & AIC_SHOWMISC) 2290 printf("PH_MSGO "); 2291 aic_msgout(aic); 2292 aic->prevphase = PH_MSGO; 2293 /* Setup interrupts before leaving */ 2294 outb(SIMODE0, 0); 2295 outb(SIMODE1, ENSCSIRST|ENBUSFREE|ENSCSIPERR|ENREQINIT); 2296 /* Enabled ints: SCSIPERR, SCSIRSTI (unexpected) 2297 * REQINIT (expected) BUSFREE (possibly expected) 2298 */ 2299 break; 2300 case PH_CMD: /* CMD phase & REQ asserted */ 2301 LOGLINE(aic); 2302 if (aic_debug & AIC_SHOWMISC) 2303 printf("PH_CMD 0x%02x (%d) ", 2304 acb->cmd.opcode, acb->clen); 2305 outb(SCSISIGO, PH_CMD); 2306 /* Use FIFO for CMDs. Assumes that no cmd > 128 bytes. OK? */ 2307 /* Clear hostFIFO and enable EISA-hostFIFO transfers */ 2308 outb(DMACNTRL0, WRITE|RSTFIFO|INTEN); /* 3(4) */ 2309 /* Clear scsiFIFO and enable SCSI-interface 2310 & hostFIFO-scsiFIFO transfers */ 2311 outb(SXFRCTL0, CHEN|CLRCH|CLRSTCNT); /* 4 */ 2312 outb(SXFRCTL0, SCSIEN|DMAEN|CHEN); /* 5 */ 2313 outb(DMACNTRL0, ENDMA|WRITE|INTEN); /* 3+6 */ 2314 /* What (polled) interrupts to enable */ 2315 outb(SIMODE1, ENPHASEMIS|ENSCSIRST|ENBUSFREE|ENSCSIPERR); 2316 /* DFIFOEMP is set, FIFO (128 byte) is always big enough */ 2317 outsw(DMADATA, (short *)&acb->cmd, acb->clen>>1); 2318 2319 /* Wait for SCSI FIFO to drain */ 2320 LOGLINE(aic); 2321 do { 2322 sstat2 = inb(SSTAT2); 2323 } while (!(sstat2 & SEMPTY) && !(inb(DMASTAT) & INTSTAT)); 2324 if (!(inb(SSTAT2) & SEMPTY)) { 2325 printf("aic at line %d: SCSI-FIFO didn't drain\n", 2326 __LINE__); 2327 Debugger("aic6360"); 2328 fatal_if_no_DDB(); 2329 acb->xs->error = XS_DRIVER_STUFFUP; 2330 untimeout(aic_timeout, (caddr_t)acb); 2331 aic_done(acb); 2332 aic_init(aic); 2333 return; 2334 } 2335 outb(SXFRCTL0, CHEN); /* Clear SCSIEN & DMAEN */ 2336 outb(SIMODE0, 0); 2337 outb(SIMODE1, ENSCSIRST|ENBUSFREE|ENSCSIPERR); 2338 LOGLINE(aic); 2339 do { 2340 sxfrctl0 = inb(SXFRCTL0); 2341 } while (sxfrctl0 & SCSIEN && !(inb(DMASTAT) & INTSTAT)); 2342 if (sxfrctl0 & SCSIEN) { 2343 printf("aic at line %d: scsi xfer never finished\n", 2344 __LINE__); 2345 Debugger("aic6360"); 2346 fatal_if_no_DDB(); 2347 acb->xs->error = XS_DRIVER_STUFFUP; 2348 untimeout(aic_timeout, (caddr_t)acb); 2349 aic_done(acb); 2350 aic_init(aic); 2351 return; 2352 } 2353 outb(SIMODE1, ENSCSIRST|ENBUSFREE|ENSCSIPERR|ENREQINIT); 2354 /* Enabled ints: BUSFREE, SCSIPERR, SCSIRSTI (unexpected) 2355 * REQINIT (expected) 2356 */ 2357 aic->prevphase = PH_CMD; 2358 break; 2359 case PH_DOUT: 2360 LOGLINE(aic); 2361 AIC_MISC(("PH_DOUT [%d] ",aic->dleft)); 2362 aic_dataout(aic); 2363 aic->prevphase = PH_DOUT; 2364 break; 2365 case PH_MSGI: 2366 LOGLINE(aic); 2367 if (aic_debug & AIC_SHOWMISC) 2368 printf("PH_MSGI "); 2369 aic_msgin(aic); 2370 outb(SIMODE1, ENSCSIRST|ENBUSFREE|ENSCSIPERR|ENREQINIT); 2371 aic->prevphase = PH_MSGI; 2372 break; 2373 case PH_DIN: 2374 LOGLINE(aic); 2375 if (aic_debug & AIC_SHOWMISC) 2376 printf("PH_DIN "); 2377 aic_datain(aic); 2378 aic->prevphase = PH_DIN; 2379 break; 2380 case PH_STAT: 2381 LOGLINE(aic); 2382 if (aic_debug & AIC_SHOWMISC) 2383 printf("PH_STAT "); 2384 outb(SCSISIGO, PH_STAT); 2385 outb(SXFRCTL0, CHEN|SPIOEN); 2386 outb(DMACNTRL0, RSTFIFO|INTEN); 2387 outb(SIMODE1, ENSCSIRST|ENPHASEMIS|ENBUSFREE|ENSCSIPERR); 2388 acb->stat = inb(SCSIDAT); 2389 outb(SXFRCTL0, CHEN); 2390 if (aic_debug & AIC_SHOWMISC) 2391 printf("0x%02x ", acb->stat); 2392 outb(SIMODE1, ENSCSIRST|ENBUSFREE|ENSCSIPERR|ENREQINIT); 2393 aic->prevphase = PH_STAT; 2394 break; 2395 case PH_INVALID: 2396 LOGLINE(aic); 2397 break; 2398 case PH_BUSFREE: 2399 LOGLINE(aic); 2400 if (aic->flags & AIC_BUSFREE_OK) { /*It's fun the 1st time.. */ 2401 aic->flags &= ~AIC_BUSFREE_OK; 2402 } else { 2403 printf("aic at line %d: unexpected busfree phase\n", 2404 __LINE__); 2405 Debugger("aic6360"); 2406 fatal_if_no_DDB(); 2407 } 2408 break; 2409 default: 2410 printf("aic at line %d: bogus bus phase\n", __LINE__); 2411 Debugger("aic6360"); 2412 fatal_if_no_DDB(); 2413 break; 2414 } 2415 LOGLINE(aic); 2416 outb(DMACNTRL0, INTEN); 2417 return; 2418 } 2419 2420 static void 2421 aic_timeout(void *arg1) { 2422 int s = splbio(); 2423 struct acb *acb = (struct acb *)arg1; 2424 int unit; 2425 struct aic_data *aic; 2426 2427 unit = acb->xs->sc_link->adapter_unit; 2428 aic = aicdata[unit]; 2429 sc_print_addr(acb->xs->sc_link); 2430 acb->xs->error = XS_TIMEOUT; 2431 printf("timed out\n"); 2432 2433 aic_done(acb); 2434 splx(s); 2435 } 2436 2437 #if AIC_DEBUG 2438 /* 2439 * The following functions are mostly used for debugging purposes, either 2440 * directly called from the driver or from the kernel debugger. 2441 */ 2442 2443 void 2444 aic_show_scsi_cmd(acb) 2445 struct acb *acb; 2446 { 2447 u_char *b = (u_char *)&acb->cmd; 2448 struct scsi_link *sc = acb->xs->sc_link; 2449 int i; 2450 2451 sc_print_addr(sc); 2452 if (!(acb->xs->flags & SCSI_RESET)) { 2453 for (i = 0; i < acb->clen; i++) { 2454 if (i) 2455 printf(","); 2456 printf("%x", b[i]); 2457 } 2458 printf("\n"); 2459 } else 2460 printf("RESET\n"); 2461 } 2462 2463 void 2464 aic_print_acb(acb) 2465 struct acb *acb; 2466 { 2467 2468 printf("acb@%x xs=%x flags=%x", acb, acb->xs, acb->flags); 2469 printf(" daddr=%x dleft=%d stat=%x\n", 2470 (long)acb->daddr, acb->dleft, acb->stat); 2471 aic_show_scsi_cmd(acb); 2472 } 2473 2474 void 2475 aic_print_active_acb() 2476 { 2477 struct acb *acb; 2478 struct aic_data *aic = aicdata[0]; 2479 2480 printf("ready list:\n"); 2481 for (acb = aic->ready_list.tqh_first; acb; acb = acb->chain.tqe_next) 2482 aic_print_acb(acb); 2483 printf("nexus:\n"); 2484 if (aic->nexus) 2485 aic_print_acb(aic->nexus); 2486 printf("nexus list:\n"); 2487 for (acb = aic->nexus_list.tqh_first; acb; acb = acb->chain.tqe_next) 2488 aic_print_acb(acb); 2489 } 2490 2491 void 2492 aic_dump6360() 2493 { 2494 u_short iobase = 0x340; 2495 2496 printf("aic6360: SCSISEQ=%x SXFRCTL0=%x SXFRCTL1=%x SCSISIGI=%x\n", 2497 inb(SCSISEQ), inb(SXFRCTL0), inb(SXFRCTL1), inb(SCSISIGI)); 2498 printf(" SSTAT0=%x SSTAT1=%x SSTAT2=%x SSTAT3=%x SSTAT4=%x\n", 2499 inb(SSTAT0), inb(SSTAT1), inb(SSTAT2), inb(SSTAT3), inb(SSTAT4)); 2500 printf(" SIMODE0=%x SIMODE1=%x DMACNTRL0=%x DMACNTRL1=%x DMASTAT=%x\n", 2501 inb(SIMODE0), inb(SIMODE1), inb(DMACNTRL0), inb(DMACNTRL1), 2502 inb(DMASTAT)); 2503 printf(" FIFOSTAT=%d SCSIBUS=0x%x\n", 2504 inb(FIFOSTAT), inb(SCSIBUS)); 2505 } 2506 2507 void 2508 aic_dump_driver() 2509 { 2510 struct aic_data *aic = aicdata[0]; 2511 struct aic_tinfo *ti; 2512 int i; 2513 2514 printf("nexus=%x phase=%x prevphase=%x\n", aic->nexus, aic->phase, 2515 aic->prevphase); 2516 printf("state=%x msgin=%x msgpriq=%x msgout=%x imlen=%d omlen=%d\n", 2517 aic->state, aic->imess[0], aic->msgpriq, aic->msgout, aic->imlen, 2518 aic->omlen); 2519 printf("history:"); 2520 i = aic->hp; 2521 do { 2522 printf(" %d", aic->history[i]); 2523 i = (i + 1) % AIC_HSIZE; 2524 } while (i != aic->hp); 2525 printf("*\n"); 2526 for (i = 0; i < 7; i++) { 2527 ti = &aic->tinfo[i]; 2528 printf("tinfo%d: %d cmds %d disconnects %d timeouts", 2529 i, ti->cmds, ti->dconns, ti->touts); 2530 printf(" %d senses flags=%x\n", ti->senses, ti->flags); 2531 } 2532 } 2533 #endif
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