1 /*-
2 * Copyright (c) 1989, 1990 William F. Jolitz.
3 * Copyright (c) 1990 The Regents of the University of California.
4 * All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * 4. Neither the name of the University nor the names of its contributors
15 * may be used to endorse or promote products derived from this software
16 * without specific prior written permission.
17 *
18 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
19 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
22 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
23 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
24 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
25 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
26 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
27 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
28 * SUCH DAMAGE.
29 *
30 * from: vector.s, 386BSD 0.1 unknown origin
31 * $FreeBSD: releng/6.2/sys/i386/isa/atpic_vector.s 129742 2004-05-26 07:43:41Z bde $
32 */
33
34 /*
35 * Interrupt entry points for external interrupts triggered by the 8259A
36 * master and slave interrupt controllers.
37 */
38
39 #include <machine/asmacros.h>
40
41 #include "assym.s"
42
43 /*
44 * Macros for interrupt interrupt entry, call to handler, and exit.
45 */
46 #define INTR(irq_num, vec_name) \
47 .text ; \
48 SUPERALIGN_TEXT ; \
49 IDTVEC(vec_name) ; \
50 pushl $0 ; /* dummy error code */ \
51 pushl $0 ; /* dummy trap type */ \
52 pushal ; /* 8 ints */ \
53 pushl %ds ; /* save data and extra segments ... */ \
54 pushl %es ; \
55 pushl %fs ; \
56 movl $KDSEL, %eax ; /* reload with kernel's data segment */ \
57 movl %eax, %ds ; \
58 movl %eax, %es ; \
59 movl $KPSEL, %eax ; /* reload with per-CPU data segment */ \
60 movl %eax, %fs ; \
61 ; \
62 FAKE_MCOUNT(TF_EIP(%esp)) ; \
63 pushl $irq_num; /* pass the IRQ */ \
64 call atpic_handle_intr ; \
65 addl $4, %esp ; /* discard the parameter */ \
66 ; \
67 MEXITCOUNT ; \
68 jmp doreti
69
70 INTR(0, atpic_intr0)
71 INTR(1, atpic_intr1)
72 INTR(2, atpic_intr2)
73 INTR(3, atpic_intr3)
74 INTR(4, atpic_intr4)
75 INTR(5, atpic_intr5)
76 INTR(6, atpic_intr6)
77 INTR(7, atpic_intr7)
78 INTR(8, atpic_intr8)
79 INTR(9, atpic_intr9)
80 INTR(10, atpic_intr10)
81 INTR(11, atpic_intr11)
82 INTR(12, atpic_intr12)
83 INTR(13, atpic_intr13)
84 INTR(14, atpic_intr14)
85 INTR(15, atpic_intr15)
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