Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)
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FreeBSD/Linux Kernel Cross Reference
sys/i386/isa/clock.c
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1 /*- 2 * Copyright (c) 1990 The Regents of the University of California. 3 * All rights reserved. 4 * 5 * This code is derived from software contributed to Berkeley by 6 * William Jolitz and Don Ahn. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 4. Neither the name of the University nor the names of its contributors 17 * may be used to endorse or promote products derived from this software 18 * without specific prior written permission. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 21 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 22 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 23 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 24 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 25 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 26 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 27 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 28 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 29 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 30 * SUCH DAMAGE. 31 * 32 * from: @(#)clock.c 7.2 (Berkeley) 5/12/91 33 */ 34 35 #include <sys/cdefs.h> 36 __FBSDID("$FreeBSD: releng/8.1/sys/i386/isa/clock.c 207137 2010-04-24 00:49:19Z attilio $"); 37 38 /* 39 * Routines to handle clock hardware. 40 */ 41 42 #include "opt_apic.h" 43 #include "opt_clock.h" 44 #include "opt_kdtrace.h" 45 #include "opt_isa.h" 46 #include "opt_mca.h" 47 #include "opt_xbox.h" 48 49 #include <sys/param.h> 50 #include <sys/systm.h> 51 #include <sys/bus.h> 52 #include <sys/lock.h> 53 #include <sys/kdb.h> 54 #include <sys/mutex.h> 55 #include <sys/proc.h> 56 #include <sys/timetc.h> 57 #include <sys/kernel.h> 58 #include <sys/module.h> 59 #include <sys/sched.h> 60 #include <sys/smp.h> 61 #include <sys/sysctl.h> 62 63 #include <machine/clock.h> 64 #include <machine/cpu.h> 65 #include <machine/frame.h> 66 #include <machine/intr_machdep.h> 67 #include <machine/md_var.h> 68 #include <machine/apicvar.h> 69 #include <machine/ppireg.h> 70 #include <machine/timerreg.h> 71 #include <machine/smp.h> 72 73 #include <isa/rtc.h> 74 #ifdef DEV_ISA 75 #include <isa/isareg.h> 76 #include <isa/isavar.h> 77 #endif 78 79 #ifdef DEV_MCA 80 #include <i386/bios/mca_machdep.h> 81 #endif 82 83 #ifdef KDTRACE_HOOKS 84 #include <sys/dtrace_bsd.h> 85 #endif 86 87 #define TIMER_DIV(x) ((i8254_freq + (x) / 2) / (x)) 88 89 int clkintr_pending; 90 static int pscnt = 1; 91 static int psdiv = 1; 92 #ifndef TIMER_FREQ 93 #define TIMER_FREQ 1193182 94 #endif 95 u_int i8254_freq = TIMER_FREQ; 96 TUNABLE_INT("hw.i8254.freq", &i8254_freq); 97 int i8254_max_count; 98 static int i8254_real_max_count; 99 100 static int lapic_allclocks = 1; 101 TUNABLE_INT("machdep.lapic_allclocks", &lapic_allclocks); 102 103 struct mtx clock_lock; 104 static struct intsrc *i8254_intsrc; 105 static u_int32_t i8254_lastcount; 106 static u_int32_t i8254_offset; 107 static int (*i8254_pending)(struct intsrc *); 108 static int i8254_ticked; 109 static int using_atrtc_timer; 110 static enum lapic_clock using_lapic_timer = LAPIC_CLOCK_NONE; 111 112 /* Values for timerX_state: */ 113 #define RELEASED 0 114 #define RELEASE_PENDING 1 115 #define ACQUIRED 2 116 #define ACQUIRE_PENDING 3 117 118 static u_char timer2_state; 119 120 static unsigned i8254_get_timecount(struct timecounter *tc); 121 static unsigned i8254_simple_get_timecount(struct timecounter *tc); 122 static void set_i8254_freq(u_int freq, int intr_freq); 123 124 static struct timecounter i8254_timecounter = { 125 i8254_get_timecount, /* get_timecount */ 126 0, /* no poll_pps */ 127 ~0u, /* counter_mask */ 128 0, /* frequency */ 129 "i8254", /* name */ 130 0 /* quality */ 131 }; 132 133 int 134 hardclockintr(struct trapframe *frame) 135 { 136 137 if (PCPU_GET(cpuid) == 0) 138 hardclock(TRAPF_USERMODE(frame), TRAPF_PC(frame)); 139 else 140 hardclock_cpu(TRAPF_USERMODE(frame)); 141 return (FILTER_HANDLED); 142 } 143 144 int 145 statclockintr(struct trapframe *frame) 146 { 147 148 profclockintr(frame); 149 statclock(TRAPF_USERMODE(frame)); 150 return (FILTER_HANDLED); 151 } 152 153 int 154 profclockintr(struct trapframe *frame) 155 { 156 157 if (!using_atrtc_timer) 158 hardclockintr(frame); 159 if (profprocs != 0) 160 profclock(TRAPF_USERMODE(frame), TRAPF_PC(frame)); 161 return (FILTER_HANDLED); 162 } 163 164 static int 165 clkintr(struct trapframe *frame) 166 { 167 168 if (timecounter->tc_get_timecount == i8254_get_timecount) { 169 mtx_lock_spin(&clock_lock); 170 if (i8254_ticked) 171 i8254_ticked = 0; 172 else { 173 i8254_offset += i8254_max_count; 174 i8254_lastcount = 0; 175 } 176 clkintr_pending = 0; 177 mtx_unlock_spin(&clock_lock); 178 } 179 KASSERT(using_lapic_timer == LAPIC_CLOCK_NONE, 180 ("clk interrupt enabled with lapic timer")); 181 182 #ifdef KDTRACE_HOOKS 183 /* 184 * If the DTrace hooks are configured and a callback function 185 * has been registered, then call it to process the high speed 186 * timers. 187 */ 188 int cpu = PCPU_GET(cpuid); 189 if (lapic_cyclic_clock_func[cpu] != NULL) 190 (*lapic_cyclic_clock_func[cpu])(frame); 191 #endif 192 193 if (using_atrtc_timer) { 194 #ifdef SMP 195 if (smp_started) 196 ipi_all_but_self(IPI_HARDCLOCK); 197 #endif 198 hardclockintr(frame); 199 } else { 200 if (--pscnt <= 0) { 201 pscnt = psratio; 202 #ifdef SMP 203 if (smp_started) 204 ipi_all_but_self(IPI_STATCLOCK); 205 #endif 206 statclockintr(frame); 207 } else { 208 #ifdef SMP 209 if (smp_started) 210 ipi_all_but_self(IPI_PROFCLOCK); 211 #endif 212 profclockintr(frame); 213 } 214 } 215 216 #ifdef DEV_MCA 217 /* Reset clock interrupt by asserting bit 7 of port 0x61 */ 218 if (MCA_system) 219 outb(0x61, inb(0x61) | 0x80); 220 #endif 221 return (FILTER_HANDLED); 222 } 223 224 int 225 timer_spkr_acquire(void) 226 { 227 int mode; 228 229 mode = TIMER_SEL2 | TIMER_SQWAVE | TIMER_16BIT; 230 231 if (timer2_state != RELEASED) 232 return (-1); 233 timer2_state = ACQUIRED; 234 235 /* 236 * This access to the timer registers is as atomic as possible 237 * because it is a single instruction. We could do better if we 238 * knew the rate. Use of splclock() limits glitches to 10-100us, 239 * and this is probably good enough for timer2, so we aren't as 240 * careful with it as with timer0. 241 */ 242 outb(TIMER_MODE, TIMER_SEL2 | (mode & 0x3f)); 243 ppi_spkr_on(); /* enable counter2 output to speaker */ 244 return (0); 245 } 246 247 int 248 timer_spkr_release(void) 249 { 250 251 if (timer2_state != ACQUIRED) 252 return (-1); 253 timer2_state = RELEASED; 254 outb(TIMER_MODE, TIMER_SEL2 | TIMER_SQWAVE | TIMER_16BIT); 255 ppi_spkr_off(); /* disable counter2 output to speaker */ 256 return (0); 257 } 258 259 void 260 timer_spkr_setfreq(int freq) 261 { 262 263 freq = i8254_freq / freq; 264 mtx_lock_spin(&clock_lock); 265 outb(TIMER_CNTR2, freq & 0xff); 266 outb(TIMER_CNTR2, freq >> 8); 267 mtx_unlock_spin(&clock_lock); 268 } 269 270 /* 271 * This routine receives statistical clock interrupts from the RTC. 272 * As explained above, these occur at 128 interrupts per second. 273 * When profiling, we receive interrupts at a rate of 1024 Hz. 274 * 275 * This does not actually add as much overhead as it sounds, because 276 * when the statistical clock is active, the hardclock driver no longer 277 * needs to keep (inaccurate) statistics on its own. This decouples 278 * statistics gathering from scheduling interrupts. 279 * 280 * The RTC chip requires that we read status register C (RTC_INTR) 281 * to acknowledge an interrupt, before it will generate the next one. 282 * Under high interrupt load, rtcintr() can be indefinitely delayed and 283 * the clock can tick immediately after the read from RTC_INTR. In this 284 * case, the mc146818A interrupt signal will not drop for long enough 285 * to register with the 8259 PIC. If an interrupt is missed, the stat 286 * clock will halt, considerably degrading system performance. This is 287 * why we use 'while' rather than a more straightforward 'if' below. 288 * Stat clock ticks can still be lost, causing minor loss of accuracy 289 * in the statistics, but the stat clock will no longer stop. 290 */ 291 static int 292 rtcintr(struct trapframe *frame) 293 { 294 int flag = 0; 295 296 while (rtcin(RTC_INTR) & RTCIR_PERIOD) { 297 flag = 1; 298 if (--pscnt <= 0) { 299 pscnt = psdiv; 300 #ifdef SMP 301 if (smp_started) 302 ipi_all_but_self(IPI_STATCLOCK); 303 #endif 304 statclockintr(frame); 305 } else { 306 #ifdef SMP 307 if (smp_started) 308 ipi_all_but_self(IPI_PROFCLOCK); 309 #endif 310 profclockintr(frame); 311 } 312 } 313 return(flag ? FILTER_HANDLED : FILTER_STRAY); 314 } 315 316 static int 317 getit(void) 318 { 319 int high, low; 320 321 mtx_lock_spin(&clock_lock); 322 323 /* Select timer0 and latch counter value. */ 324 outb(TIMER_MODE, TIMER_SEL0 | TIMER_LATCH); 325 326 low = inb(TIMER_CNTR0); 327 high = inb(TIMER_CNTR0); 328 329 mtx_unlock_spin(&clock_lock); 330 return ((high << 8) | low); 331 } 332 333 /* 334 * Wait "n" microseconds. 335 * Relies on timer 1 counting down from (i8254_freq / hz) 336 * Note: timer had better have been programmed before this is first used! 337 */ 338 void 339 DELAY(int n) 340 { 341 int delta, prev_tick, tick, ticks_left; 342 343 #ifdef DELAYDEBUG 344 int getit_calls = 1; 345 int n1; 346 static int state = 0; 347 #endif 348 349 if (tsc_freq != 0 && !tsc_is_broken) { 350 uint64_t start, end, now; 351 352 sched_pin(); 353 start = rdtsc(); 354 end = start + (tsc_freq * n) / 1000000; 355 do { 356 cpu_spinwait(); 357 now = rdtsc(); 358 } while (now < end || (now > start && end < start)); 359 sched_unpin(); 360 return; 361 } 362 #ifdef DELAYDEBUG 363 if (state == 0) { 364 state = 1; 365 for (n1 = 1; n1 <= 10000000; n1 *= 10) 366 DELAY(n1); 367 state = 2; 368 } 369 if (state == 1) 370 printf("DELAY(%d)...", n); 371 #endif 372 /* 373 * Read the counter first, so that the rest of the setup overhead is 374 * counted. Guess the initial overhead is 20 usec (on most systems it 375 * takes about 1.5 usec for each of the i/o's in getit(). The loop 376 * takes about 6 usec on a 486/33 and 13 usec on a 386/20. The 377 * multiplications and divisions to scale the count take a while). 378 * 379 * However, if ddb is active then use a fake counter since reading 380 * the i8254 counter involves acquiring a lock. ddb must not do 381 * locking for many reasons, but it calls here for at least atkbd 382 * input. 383 */ 384 #ifdef KDB 385 if (kdb_active) 386 prev_tick = 1; 387 else 388 #endif 389 prev_tick = getit(); 390 n -= 0; /* XXX actually guess no initial overhead */ 391 /* 392 * Calculate (n * (i8254_freq / 1e6)) without using floating point 393 * and without any avoidable overflows. 394 */ 395 if (n <= 0) 396 ticks_left = 0; 397 else if (n < 256) 398 /* 399 * Use fixed point to avoid a slow division by 1000000. 400 * 39099 = 1193182 * 2^15 / 10^6 rounded to nearest. 401 * 2^15 is the first power of 2 that gives exact results 402 * for n between 0 and 256. 403 */ 404 ticks_left = ((u_int)n * 39099 + (1 << 15) - 1) >> 15; 405 else 406 /* 407 * Don't bother using fixed point, although gcc-2.7.2 408 * generates particularly poor code for the long long 409 * division, since even the slow way will complete long 410 * before the delay is up (unless we're interrupted). 411 */ 412 ticks_left = ((u_int)n * (long long)i8254_freq + 999999) 413 / 1000000; 414 415 while (ticks_left > 0) { 416 #ifdef KDB 417 if (kdb_active) { 418 inb(0x84); 419 tick = prev_tick - 1; 420 if (tick <= 0) 421 tick = i8254_max_count; 422 } else 423 #endif 424 tick = getit(); 425 #ifdef DELAYDEBUG 426 ++getit_calls; 427 #endif 428 delta = prev_tick - tick; 429 prev_tick = tick; 430 if (delta < 0) { 431 delta += i8254_max_count; 432 /* 433 * Guard against i8254_max_count being wrong. 434 * This shouldn't happen in normal operation, 435 * but it may happen if set_i8254_freq() is 436 * traced. 437 */ 438 if (delta < 0) 439 delta = 0; 440 } 441 ticks_left -= delta; 442 } 443 #ifdef DELAYDEBUG 444 if (state == 1) 445 printf(" %d calls to getit() at %d usec each\n", 446 getit_calls, (n + 5) / getit_calls); 447 #endif 448 } 449 450 static void 451 set_i8254_freq(u_int freq, int intr_freq) 452 { 453 int new_i8254_real_max_count; 454 455 i8254_timecounter.tc_frequency = freq; 456 mtx_lock_spin(&clock_lock); 457 i8254_freq = freq; 458 if (using_lapic_timer != LAPIC_CLOCK_NONE) 459 new_i8254_real_max_count = 0x10000; 460 else 461 new_i8254_real_max_count = TIMER_DIV(intr_freq); 462 if (new_i8254_real_max_count != i8254_real_max_count) { 463 i8254_real_max_count = new_i8254_real_max_count; 464 if (i8254_real_max_count == 0x10000) 465 i8254_max_count = 0xffff; 466 else 467 i8254_max_count = i8254_real_max_count; 468 outb(TIMER_MODE, TIMER_SEL0 | TIMER_RATEGEN | TIMER_16BIT); 469 outb(TIMER_CNTR0, i8254_real_max_count & 0xff); 470 outb(TIMER_CNTR0, i8254_real_max_count >> 8); 471 } 472 mtx_unlock_spin(&clock_lock); 473 } 474 475 static void 476 i8254_restore(void) 477 { 478 479 mtx_lock_spin(&clock_lock); 480 outb(TIMER_MODE, TIMER_SEL0 | TIMER_RATEGEN | TIMER_16BIT); 481 outb(TIMER_CNTR0, i8254_real_max_count & 0xff); 482 outb(TIMER_CNTR0, i8254_real_max_count >> 8); 483 mtx_unlock_spin(&clock_lock); 484 } 485 486 /* 487 * Restore all the timers non-atomically (XXX: should be atomically). 488 * 489 * This function is called from pmtimer_resume() to restore all the timers. 490 * This should not be necessary, but there are broken laptops that do not 491 * restore all the timers on resume. 492 */ 493 void 494 timer_restore(void) 495 { 496 497 i8254_restore(); /* restore i8254_freq and hz */ 498 atrtc_restore(); /* reenable RTC interrupts */ 499 } 500 501 /* This is separate from startrtclock() so that it can be called early. */ 502 void 503 i8254_init(void) 504 { 505 506 mtx_init(&clock_lock, "clk", NULL, MTX_SPIN | MTX_NOPROFILE); 507 set_i8254_freq(i8254_freq, hz); 508 } 509 510 void 511 startrtclock() 512 { 513 514 atrtc_start(); 515 516 set_i8254_freq(i8254_freq, hz); 517 tc_init(&i8254_timecounter); 518 519 init_TSC(); 520 } 521 522 /* 523 * Start both clocks running. 524 */ 525 void 526 cpu_initclocks() 527 { 528 #ifdef DEV_APIC 529 enum lapic_clock tlsca; 530 #endif 531 int tasc; 532 533 /* Initialize RTC. */ 534 atrtc_start(); 535 tasc = atrtc_setup_clock(); 536 537 /* 538 * If the atrtc successfully initialized and the users didn't force 539 * otherwise use the LAPIC in order to cater hardclock only, otherwise 540 * take in charge all the clock sources. 541 */ 542 #ifdef DEV_APIC 543 tlsca = (lapic_allclocks == 0 && tasc != 0) ? LAPIC_CLOCK_HARDCLOCK : 544 LAPIC_CLOCK_ALL; 545 using_lapic_timer = lapic_setup_clock(tlsca); 546 #endif 547 /* 548 * If we aren't using the local APIC timer to drive the kernel 549 * clocks, setup the interrupt handler for the 8254 timer 0 so 550 * that it can drive hardclock(). Otherwise, change the 8254 551 * timecounter to user a simpler algorithm. 552 */ 553 if (using_lapic_timer == LAPIC_CLOCK_NONE) { 554 intr_add_handler("clk", 0, (driver_filter_t *)clkintr, NULL, 555 NULL, INTR_TYPE_CLK, NULL); 556 i8254_intsrc = intr_lookup_source(0); 557 if (i8254_intsrc != NULL) 558 i8254_pending = 559 i8254_intsrc->is_pic->pic_source_pending; 560 } else { 561 i8254_timecounter.tc_get_timecount = 562 i8254_simple_get_timecount; 563 i8254_timecounter.tc_counter_mask = 0xffff; 564 set_i8254_freq(i8254_freq, hz); 565 } 566 567 /* 568 * If the separate statistics clock hasn't been explicility disabled 569 * and we aren't already using the local APIC timer to drive the 570 * kernel clocks, then setup the RTC to periodically interrupt to 571 * drive statclock() and profclock(). 572 */ 573 if (using_lapic_timer != LAPIC_CLOCK_ALL) { 574 using_atrtc_timer = tasc; 575 if (using_atrtc_timer) { 576 /* Enable periodic interrupts from the RTC. */ 577 intr_add_handler("rtc", 8, 578 (driver_filter_t *)rtcintr, NULL, NULL, 579 INTR_TYPE_CLK, NULL); 580 atrtc_enable_intr(); 581 } else { 582 profhz = hz; 583 if (hz < 128) 584 stathz = hz; 585 else 586 stathz = hz / (hz / 128); 587 } 588 } 589 590 init_TSC_tc(); 591 } 592 593 void 594 cpu_startprofclock(void) 595 { 596 597 if (using_lapic_timer == LAPIC_CLOCK_ALL || !using_atrtc_timer) 598 return; 599 atrtc_rate(RTCSA_PROF); 600 psdiv = pscnt = psratio; 601 } 602 603 void 604 cpu_stopprofclock(void) 605 { 606 607 if (using_lapic_timer == LAPIC_CLOCK_ALL || !using_atrtc_timer) 608 return; 609 atrtc_rate(RTCSA_NOPROF); 610 psdiv = pscnt = 1; 611 } 612 613 static int 614 sysctl_machdep_i8254_freq(SYSCTL_HANDLER_ARGS) 615 { 616 int error; 617 u_int freq; 618 619 /* 620 * Use `i8254' instead of `timer' in external names because `timer' 621 * is is too generic. Should use it everywhere. 622 */ 623 freq = i8254_freq; 624 error = sysctl_handle_int(oidp, &freq, 0, req); 625 if (error == 0 && req->newptr != NULL) 626 set_i8254_freq(freq, hz); 627 return (error); 628 } 629 630 SYSCTL_PROC(_machdep, OID_AUTO, i8254_freq, CTLTYPE_INT | CTLFLAG_RW, 631 0, sizeof(u_int), sysctl_machdep_i8254_freq, "IU", ""); 632 633 static unsigned 634 i8254_simple_get_timecount(struct timecounter *tc) 635 { 636 637 return (i8254_max_count - getit()); 638 } 639 640 static unsigned 641 i8254_get_timecount(struct timecounter *tc) 642 { 643 u_int count; 644 u_int high, low; 645 u_int eflags; 646 647 eflags = read_eflags(); 648 mtx_lock_spin(&clock_lock); 649 650 /* Select timer0 and latch counter value. */ 651 outb(TIMER_MODE, TIMER_SEL0 | TIMER_LATCH); 652 653 low = inb(TIMER_CNTR0); 654 high = inb(TIMER_CNTR0); 655 count = i8254_max_count - ((high << 8) | low); 656 if (count < i8254_lastcount || 657 (!i8254_ticked && (clkintr_pending || 658 ((count < 20 || (!(eflags & PSL_I) && 659 count < i8254_max_count / 2u)) && 660 i8254_pending != NULL && i8254_pending(i8254_intsrc))))) { 661 i8254_ticked = 1; 662 i8254_offset += i8254_max_count; 663 } 664 i8254_lastcount = count; 665 count += i8254_offset; 666 mtx_unlock_spin(&clock_lock); 667 return (count); 668 } 669 670 #ifdef DEV_ISA 671 /* 672 * Attach to the ISA PnP descriptors for the timer 673 */ 674 static struct isa_pnp_id attimer_ids[] = { 675 { 0x0001d041 /* PNP0100 */, "AT timer" }, 676 { 0 } 677 }; 678 679 static int 680 attimer_probe(device_t dev) 681 { 682 int result; 683 684 result = ISA_PNP_PROBE(device_get_parent(dev), dev, attimer_ids); 685 if (result <= 0) 686 device_quiet(dev); 687 return(result); 688 } 689 690 static int 691 attimer_attach(device_t dev) 692 { 693 return(0); 694 } 695 696 static device_method_t attimer_methods[] = { 697 /* Device interface */ 698 DEVMETHOD(device_probe, attimer_probe), 699 DEVMETHOD(device_attach, attimer_attach), 700 DEVMETHOD(device_detach, bus_generic_detach), 701 DEVMETHOD(device_shutdown, bus_generic_shutdown), 702 DEVMETHOD(device_suspend, bus_generic_suspend), 703 DEVMETHOD(device_resume, bus_generic_resume), 704 { 0, 0 } 705 }; 706 707 static driver_t attimer_driver = { 708 "attimer", 709 attimer_methods, 710 1, /* no softc */ 711 }; 712 713 static devclass_t attimer_devclass; 714 715 DRIVER_MODULE(attimer, isa, attimer_driver, attimer_devclass, 0, 0); 716 DRIVER_MODULE(attimer, acpi, attimer_driver, attimer_devclass, 0, 0); 717 718 #endif /* DEV_ISA */
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