The Design and Implementation of the FreeBSD Operating System, Second Edition
Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)


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FreeBSD/Linux Kernel Cross Reference
sys/i386/isa/icu.h

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    1 /*-
    2  * Copyright (c) 1990 The Regents of the University of California.
    3  * All rights reserved.
    4  *
    5  * This code is derived from software contributed to Berkeley by
    6  * William Jolitz.
    7  *
    8  * Redistribution and use in source and binary forms, with or without
    9  * modification, are permitted provided that the following conditions
   10  * are met:
   11  * 1. Redistributions of source code must retain the above copyright
   12  *    notice, this list of conditions and the following disclaimer.
   13  * 2. Redistributions in binary form must reproduce the above copyright
   14  *    notice, this list of conditions and the following disclaimer in the
   15  *    documentation and/or other materials provided with the distribution.
   16  * 3. All advertising materials mentioning features or use of this software
   17  *    must display the following acknowledgement:
   18  *      This product includes software developed by the University of
   19  *      California, Berkeley and its contributors.
   20  * 4. Neither the name of the University nor the names of its contributors
   21  *    may be used to endorse or promote products derived from this software
   22  *    without specific prior written permission.
   23  *
   24  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
   25  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
   26  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
   27  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
   28  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
   29  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
   30  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
   31  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
   32  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
   33  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
   34  * SUCH DAMAGE.
   35  *
   36  *      from: @(#)icu.h 5.6 (Berkeley) 5/9/91
   37  * $FreeBSD: stable/3/sys/i386/isa/icu.h 50582 1999-08-29 16:07:53Z peter $
   38  */
   39 
   40 /*
   41  * AT/386 Interrupt Control constants
   42  * W. Jolitz 8/89
   43  */
   44 
   45 #ifndef _I386_ISA_ICU_H_
   46 #define _I386_ISA_ICU_H_
   47 
   48 #ifndef LOCORE
   49 
   50 #ifdef APIC_IO
   51 
   52 /*
   53 #define MP_SAFE
   54  * Note:
   55  *      Most of the SMP equivilants of the icu macros are coded
   56  *      elsewhere in an MP-safe fashion.
   57  *      In particular note that the 'imen' variable is opaque.
   58  *      DO NOT access imen directly, use INTREN()/INTRDIS().
   59  */
   60 
   61 void    INTREN                  __P((u_int));
   62 void    INTRDIS                 __P((u_int));
   63 #define INTRMASK(msk,s)         (msk |= (s))
   64 #define INTRUNMASK(msk,s)       (msk &= ~(s))
   65 
   66 #else /* APIC_IO */
   67 
   68 /*
   69  * Interrupt "level" mechanism variables, masks, and macros
   70  */
   71 extern  unsigned imen;          /* interrupt mask enable */
   72 
   73 #define INTREN(s)               (imen &= ~(s), SET_ICUS())
   74 #define INTRDIS(s)              (imen |= (s), SET_ICUS())
   75 #define INTRMASK(msk,s)         (msk |= (s))
   76 #define INTRUNMASK(msk,s)       (msk &= ~(s))
   77 
   78 #if 0
   79 #ifdef PC98
   80 #define SET_ICUS()      (outb(IO_ICU1 + 2, imen), outb(IU_ICU2 + 2, imen >> 8))
   81 #define INTRGET()       ((inb(IO_ICU2) << 8 | inb(IO_ICU1)) & 0xffff)
   82 #else   /* IBM-PC */
   83 #define SET_ICUS()      (outb(IO_ICU1 + 1, imen), outb(IU_ICU2 + 1, imen >> 8))
   84 #define INTRGET()       ((inb(IO_ICU2) << 8 | inb(IO_ICU1)) & 0xffff)
   85 #endif  /* PC98 */
   86 #else
   87 /*
   88  * XXX - IO_ICU* are defined in isa.h, not icu.h, and nothing much bothers to
   89  * include isa.h, while too many things include icu.h.
   90  */
   91 #ifdef PC98
   92 #define SET_ICUS()      (outb(0x02, imen), outb(0x0a, imen >> 8))
   93 /* XXX is this correct? */
   94 #define INTRGET()       ((inb(0x0a) << 8 | inb(0x02)) & 0xffff)
   95 #else
   96 #define SET_ICUS()      (outb(0x21, imen), outb(0xa1, imen >> 8))
   97 #define INTRGET()       ((inb(0xa1) << 8 | inb(0x21)) & 0xffff)
   98 #endif
   99 #endif
  100 
  101 #endif /* APIC_IO */
  102 
  103 #endif /* LOCORE */
  104 
  105 
  106 #ifdef APIC_IO
  107 /*
  108  * Note: The APIC uses different values for IRQxxx.
  109  *       Unfortunately many drivers use the 8259 values as indexes
  110  *       into tables, etc.  The APIC equivilants are kept as APIC_IRQxxx.
  111  *       The 8259 versions have to be used in SMP for legacy operation
  112  *       of the drivers.
  113  */
  114 #endif /* APIC_IO */
  115 
  116 /*
  117  * Interrupt enable bits - in normal order of priority (which we change)
  118  */
  119 #define IRQ0            0x0001          /* highest priority - timer */
  120 #define IRQ1            0x0002
  121 #define IRQ_SLAVE       0x0004
  122 #define IRQ8            0x0100
  123 #define IRQ9            0x0200
  124 #define IRQ2            IRQ9
  125 #define IRQ10           0x0400
  126 #define IRQ11           0x0800
  127 #define IRQ12           0x1000
  128 #define IRQ13           0x2000
  129 #define IRQ14           0x4000
  130 #define IRQ15           0x8000
  131 #define IRQ3            0x0008          /* this is highest after rotation */
  132 #define IRQ4            0x0010
  133 #define IRQ5            0x0020
  134 #define IRQ6            0x0040
  135 #define IRQ7            0x0080          /* lowest - parallel printer */
  136 
  137 #ifdef PC98
  138 #undef  IRQ2
  139 #define IRQ2            0x0004
  140 #undef  IRQ_SLAVE
  141 #define IRQ_SLAVE       0x0080
  142 #endif
  143 
  144 
  145 /*
  146  * Interrupt Control offset into Interrupt descriptor table (IDT)
  147  */
  148 #define ICU_OFFSET      32              /* 0-31 are processor exceptions */
  149 
  150 #ifdef APIC_IO
  151 
  152 /* 32-47: ISA IRQ0-IRQ15, 48-55: IO APIC IRQ16-IRQ23 */
  153 #define ICU_LEN         24
  154 
  155 #else
  156 
  157 #define ICU_LEN         16              /* 32-47 are ISA interrupts */
  158 
  159 #endif /* APIC_IO */
  160 
  161 #endif /* !_I386_ISA_ICU_H_ */

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