The Design and Implementation of the FreeBSD Operating System, Second Edition
Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)


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FreeBSD/Linux Kernel Cross Reference
sys/i386/isa/if_elreg.h

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    1 /* Copyright (c) 1994, Matthew E. Kimmel.  Permission is hereby granted
    2  * to use, copy, modify and distribute this software provided that both
    3  * the copyright notice and this permission notice appear in all copies
    4  * of the software, derivative works or modified versions, and any
    5  * portions thereof.
    6  *
    7  * $FreeBSD$
    8  */
    9 /* 3COM Etherlink 3C501 Register Definitions */
   10 
   11 /* I/O Ports */
   12 #define EL_RXS  0x6     /* Receive status register */
   13 #define EL_RXC  0x6     /* Receive command register */
   14 #define EL_TXS  0x7     /* Transmit status register */
   15 #define EL_TXC  0x7     /* Transmit command register */
   16 #define EL_GPBL 0x8     /* GP buffer ptr low byte */
   17 #define EL_GPBH 0x9     /* GP buffer ptr high byte */
   18 #define EL_RBL  0xa     /* Receive buffer ptr low byte */
   19 #define EL_RBC  0xa     /* Receive buffer clear */
   20 #define EL_RBH  0xb     /* Receive buffer ptr high byte */
   21 #define EL_EAW  0xc     /* Ethernet address window */
   22 #define EL_AS   0xe     /* Auxiliary status register */
   23 #define EL_AC   0xe     /* Auxiliary command register */
   24 #define EL_BUF  0xf     /* Data buffer */
   25 
   26 /* Receive status register bits */
   27 #define EL_RXS_OFLOW    0x01    /* Overflow error */
   28 #define EL_RXS_FCS      0x02    /* FCS error */
   29 #define EL_RXS_DRIB     0x04    /* Dribble error */
   30 #define EL_RXS_SHORT    0x08    /* Short frame */
   31 #define EL_RXS_NOFLOW   0x10    /* No overflow */
   32 #define EL_RXS_GOOD     0x20    /* Received good frame */
   33 #define EL_RXS_STALE    0x80    /* Stale receive status */
   34 
   35 /* Receive command register bits */
   36 #define EL_RXC_DISABLE  0x00    /* Receiver disabled */
   37 #define EL_RXC_DOFLOW   0x01    /* Detect overflow */
   38 #define EL_RXC_DFCS     0x02    /* Detect FCS errs */
   39 #define EL_RXC_DDRIB    0x04    /* Detect dribble errors */
   40 #define EL_RXC_DSHORT   0x08    /* Detect short frames */
   41 #define EL_RXC_DNOFLOW  0x10    /* Detect frames w/o overflow ??? */
   42 #define EL_RXC_AGF      0x20    /* Accept Good Frames */
   43 #define EL_RXC_PROMISC  0x40    /* Promiscuous mode */
   44 #define EL_RXC_ABROAD   0x80    /* Accept address, broadcast */
   45 #define EL_RXC_AMULTI   0xc0    /* Accept address, multicast */
   46 
   47 /* Transmit status register bits */
   48 #define EL_TXS_UFLOW    0x01    /* Underflow */
   49 #define EL_TXS_COLL     0x02    /* Collision */
   50 #define EL_TXS_COLL16   0x04    /* Collision 16 */
   51 #define EL_TXS_READY    0x08    /* Ready for new frame */
   52 
   53 /* Transmit command register bits */
   54 #define EL_TXC_DUFLOW   0x01    /* Detect underflow */
   55 #define EL_TXC_DCOLL    0x02    /* Detect collisions */
   56 #define EL_TXC_DCOLL16  0x04    /* Detect collision 16 */
   57 #define EL_TXC_DSUCCESS 0x08    /* Detect success */
   58 
   59 /* Auxiliary status register bits */
   60 #define EL_AS_RXBUSY    0x01    /* Receive busy */
   61 #define EL_AS_DMADONE   0x10    /* DMA finished */
   62 #define EL_AS_TXBUSY    0x80    /* Transmit busy */
   63 
   64 /* Auxiliary command register bits */
   65 #define EL_AC_HOST      0x00    /* System bus can access buffer */
   66 #define EL_AC_IRQE      0x01    /* IRQ enable */
   67 #define EL_AC_TXBAD     0x02    /* Transmit frames with bad FCS */
   68 #define EL_AC_TXFRX     0x04    /* Transmit followed by receive */
   69 #define EL_AC_RX        0x08    /* Receive */
   70 #define EL_AC_LB        0x0c    /* Loopback */
   71 #define EL_AC_DRQ       0x20    /* DMA request */
   72 #define EL_AC_RIDE      0x40    /* DRQ and IRQ enabled */
   73 #define EL_AC_RESET     0x80    /* Reset */
   74 
   75 /* Packet buffer size */
   76 #define EL_BUFSIZ       2048

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