FreeBSD/Linux Kernel Cross Reference
sys/i386/isa/if_fe.c
1 /*
2 * All Rights Reserved, Copyright (C) Fujitsu Limited 1995
3 *
4 * This software may be used, modified, copied, distributed, and sold, in
5 * both source and binary form provided that the above copyright, these
6 * terms and the following disclaimer are retained. The name of the author
7 * and/or the contributor may not be used to endorse or promote products
8 * derived from this software without specific prior written permission.
9 *
10 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND THE CONTRIBUTOR ``AS IS'' AND
11 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
12 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
13 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR THE CONTRIBUTOR BE LIABLE
14 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
15 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
16 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION.
17 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
18 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
19 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
20 * SUCH DAMAGE.
21 */
22
23 /*
24 * $FreeBSD$
25 *
26 * Device driver for Fujitsu MB86960A/MB86965A based Ethernet cards.
27 * To be used with FreeBSD 3.x
28 * Contributed by M. Sekiguchi. <seki@sysrap.cs.fujitsu.co.jp>
29 *
30 * This version is intended to be a generic template for various
31 * MB86960A/MB86965A based Ethernet cards. It currently supports
32 * Fujitsu FMV-180 series for ISA and Allied-Telesis AT1700/RE2000
33 * series for ISA, as well as Fujitsu MBH10302 PC card.
34 * There are some currently-
35 * unused hooks embedded, which are primarily intended to support
36 * other types of Ethernet cards, but the author is not sure whether
37 * they are useful.
38 *
39 * This version also includes some alignments to support RE1000,
40 * C-NET(98)P2 and so on. These cards are not for AT-compatibles,
41 * but for NEC PC-98 bus -- a proprietary bus architecture available
42 * only in Japan. Confusingly, it is different from the Microsoft's
43 * PC98 architecture. :-{
44 * Further work for PC-98 version will be available as a part of
45 * FreeBSD(98) project.
46 *
47 * This software is a derivative work of if_ed.c version 1.56 by David
48 * Greenman available as a part of FreeBSD 2.0 RELEASE source distribution.
49 *
50 * The following lines are retained from the original if_ed.c:
51 *
52 * Copyright (C) 1993, David Greenman. This software may be used, modified,
53 * copied, distributed, and sold, in both source and binary form provided
54 * that the above copyright and these terms are retained. Under no
55 * circumstances is the author responsible for the proper functioning
56 * of this software, nor does the author assume any responsibility
57 * for damages incurred with its use.
58 */
59
60 /*
61 * TODO:
62 * o To support ISA PnP auto configuration for FMV-183/184.
63 * o To reconsider mbuf usage.
64 * o To reconsider transmission buffer usage, including
65 * transmission buffer size (currently 4KB x 2) and pros-and-
66 * cons of multiple frame transmission.
67 * o To test IPX codes.
68 * o To test FreeBSD3.0-current.
69 * o To test BRIDGE codes.
70 */
71
72 #include "fe.h"
73 #include "bpfilter.h"
74 #include "opt_fe.h"
75 #include "opt_inet.h"
76 #include "opt_ipx.h"
77
78 #include <sys/param.h>
79 #include <sys/systm.h>
80 #include <sys/sockio.h>
81 #include <sys/mbuf.h>
82 #include <sys/socket.h>
83
84 #include <net/if.h>
85 #include <net/if_dl.h>
86 #include <net/if_mib.h>
87 #include <net/if_media.h>
88 #include <net/if_types.h>
89
90 #ifdef INET
91 #include <netinet/in.h>
92 #include <netinet/if_ether.h>
93 #endif
94
95 /* IPX code is not tested. FIXME. */
96 #ifdef IPX
97 #include <netipx/ipx.h>
98 #include <netipx/ipx_if.h>
99 #endif
100
101 /* To be used with IPv6 package of INRIA. */
102 #ifdef INET6
103 /* IPv6 added by shin 96.2.6 */
104 #include <netinet/if_ether6.h>
105 #endif
106
107 /* XNS code is not tested. FIXME. */
108 #ifdef NS
109 #include <netns/ns.h>
110 #include <netns/ns_if.h>
111 #endif
112
113 #if NBPFILTER > 0
114 #include <net/bpf.h>
115 #endif
116
117 #ifdef BRIDGE
118 #include <net/bridge.h>
119 #endif
120
121 #include <machine/clock.h>
122
123 #include <i386/isa/isa_device.h>
124 #include <i386/isa/icu.h>
125
126 /* PCCARD suport */
127 #include "card.h"
128 #if NCARD > 0
129 #include <sys/kernel.h>
130 #include <sys/select.h>
131 #include <sys/module.h>
132 #include <pccard/cardinfo.h>
133 #include <pccard/slot.h>
134 #endif
135
136 #include <i386/isa/ic/mb86960.h>
137 #include <i386/isa/if_fereg.h>
138
139 /*
140 * Default settings for fe driver specific options.
141 * They can be set in config file by "options" statements.
142 */
143
144 /*
145 * Transmit just one packet per a "send" command to 86960.
146 * This option is intended for performance test. An EXPERIMENTAL option.
147 */
148 #ifndef FE_SINGLE_TRANSMISSION
149 #define FE_SINGLE_TRANSMISSION 0
150 #endif
151
152 /*
153 * Maximum loops when interrupt.
154 * This option prevents an infinite loop due to hardware failure.
155 * (Some laptops make an infinite loop after PC-Card is ejected.)
156 */
157 #ifndef FE_MAX_LOOP
158 #define FE_MAX_LOOP 0x800
159 #endif
160
161 /*
162 * If you define this option, 8-bit cards are also supported.
163 */
164 /*#define FE_8BIT_SUPPORT*/
165
166 /*
167 * Device configuration flags.
168 */
169
170 /* DLCR6 settings. */
171 #define FE_FLAGS_DLCR6_VALUE 0x007F
172
173 /* Force DLCR6 override. */
174 #define FE_FLAGS_OVERRIDE_DLCR6 0x0080
175
176 /* Shouldn't these be defined somewhere else such as isa_device.h? */
177 #define NO_IOADDR (-1)
178 #define NO_IRQ 0
179
180 /*
181 * Data type for a multicast address filter on 8696x.
182 */
183 struct fe_filter { u_char data [ FE_FILTER_LEN ]; };
184
185 /*
186 * Special filter values.
187 */
188 static struct fe_filter const fe_filter_nothing = { FE_FILTER_NOTHING };
189 static struct fe_filter const fe_filter_all = { FE_FILTER_ALL };
190
191 /* How many registers does an fe-supported adapter have at maximum? */
192 #define MAXREGISTERS 32
193
194 /*
195 * fe_softc: per line info and status
196 */
197 static struct fe_softc {
198
199 /* Used by "common" codes. */
200 struct arpcom arpcom; /* Ethernet common */
201
202 /* Used by config codes. */
203
204 /* Set by probe() and not modified in later phases. */
205 char const * typestr; /* printable name of the interface. */
206 u_short iobase; /* base I/O address of the adapter. */
207 u_short ioaddr [ MAXREGISTERS ]; /* I/O addresses of registers. */
208 u_short txb_size; /* size of TX buffer, in bytes */
209 u_char proto_dlcr4; /* DLCR4 prototype. */
210 u_char proto_dlcr5; /* DLCR5 prototype. */
211 u_char proto_dlcr6; /* DLCR6 prototype. */
212 u_char proto_dlcr7; /* DLCR7 prototype. */
213 u_char proto_bmpr13; /* BMPR13 prototype. */
214 u_char stability; /* How stable is this? */
215 u_short priv_info; /* info specific to a vendor/model. */
216
217 /* Vendor/model specific hooks. */
218 void (*init)(struct fe_softc *); /* Just before fe_init(). */
219 void (*stop)(struct fe_softc *); /* Just after fe_stop(). */
220
221 /* Transmission buffer management. */
222 u_short txb_free; /* free bytes in TX buffer */
223 u_char txb_count; /* number of packets in TX buffer */
224 u_char txb_sched; /* number of scheduled packets */
225
226 /* Excessive collision counter (see fe_tint() for details.) */
227 u_char tx_excolls; /* # of excessive collisions. */
228
229 /* Multicast address filter management. */
230 u_char filter_change; /* MARs must be changed ASAP. */
231 struct fe_filter filter;/* new filter value. */
232
233 /* Network management. */
234 struct ifmib_iso_8802_3 mibdata;
235
236 /* Media information. */
237 struct ifmedia media; /* used by if_media. */
238 u_short mbitmap; /* bitmap for supported media; see bit2media */
239 int defmedia; /* default media */
240 void (* msel)(struct fe_softc *); /* media selector. */
241
242 } fe_softc[NFE];
243
244 #define sc_if arpcom.ac_if
245 #define sc_unit arpcom.ac_if.if_unit
246 #define sc_enaddr arpcom.ac_enaddr
247
248 /* Standard driver entry points. These can be static. */
249 static int fe_probe ( struct isa_device * );
250 static int fe_attach ( struct isa_device * );
251 static void fe_init ( void * );
252 static ointhand2_t feintr;
253 static int fe_ioctl ( struct ifnet *, u_long, caddr_t );
254 static void fe_start ( struct ifnet * );
255 static void fe_watchdog ( struct ifnet * );
256 static int fe_medchange ( struct ifnet * );
257 static void fe_medstat ( struct ifnet *, struct ifmediareq * );
258
259 /* Local functions. Order of declaration is confused. FIXME. */
260 static int fe_probe_ssi ( struct isa_device *, struct fe_softc * );
261 static int fe_probe_jli ( struct isa_device *, struct fe_softc * );
262 static int fe_probe_fmv ( struct isa_device *, struct fe_softc * );
263 static int fe_probe_lnx ( struct isa_device *, struct fe_softc * );
264 static int fe_probe_gwy ( struct isa_device *, struct fe_softc * );
265 static int fe_probe_ubn ( struct isa_device *, struct fe_softc * );
266 #ifdef PC98
267 static int fe_probe_re1000 ( struct isa_device *, struct fe_softc * );
268 static int fe_probe_cnet9ne( struct isa_device *, struct fe_softc * );
269 static int fe_probe_rex ( struct isa_device *, struct fe_softc * );
270 #endif
271 #if NCARD > 0
272 static int fe_probe_mbh ( struct isa_device *, struct fe_softc * );
273 static int fe_probe_tdk ( struct isa_device *, struct fe_softc * );
274 #endif
275 static int fe_get_packet ( struct fe_softc *, u_short );
276 static void fe_stop ( struct fe_softc * );
277 static void fe_tint ( struct fe_softc *, u_char );
278 static void fe_rint ( struct fe_softc *, u_char );
279 static void fe_xmit ( struct fe_softc * );
280 static void fe_write_mbufs ( struct fe_softc *, struct mbuf * );
281 static void fe_setmode ( struct fe_softc * );
282 static void fe_loadmar ( struct fe_softc * );
283
284 #ifdef DIAGNOSTIC
285 static void fe_emptybuffer ( struct fe_softc * );
286 #endif
287
288 /* Driver struct used in the config code. This must be public (external.) */
289 struct isa_driver fedriver =
290 {
291 fe_probe,
292 fe_attach,
293 "fe",
294 1 /* It's safe to mark as "sensitive" */
295 };
296
297 /*
298 * Fe driver specific constants which relate to 86960/86965.
299 */
300
301 /* Interrupt masks */
302 #define FE_TMASK ( FE_D2_COLL16 | FE_D2_TXDONE )
303 #define FE_RMASK ( FE_D3_OVRFLO | FE_D3_CRCERR \
304 | FE_D3_ALGERR | FE_D3_SRTPKT | FE_D3_PKTRDY )
305
306 /* Maximum number of iterations for a receive interrupt. */
307 #define FE_MAX_RECV_COUNT ( ( 65536 - 2048 * 2 ) / 64 )
308 /*
309 * Maximum size of SRAM is 65536,
310 * minimum size of transmission buffer in fe is 2x2KB,
311 * and minimum amount of received packet including headers
312 * added by the chip is 64 bytes.
313 * Hence FE_MAX_RECV_COUNT is the upper limit for number
314 * of packets in the receive buffer.
315 */
316
317 /*
318 * Miscellaneous definitions not directly related to hardware.
319 */
320
321 /* Flags for stability. */
322 #define UNSTABLE_IRQ 0x01 /* IRQ setting may be incorrect. */
323 #define UNSTABLE_MAC 0x02 /* Probed MAC address may be incorrect. */
324 #define UNSTABLE_TYPE 0x04 /* Probed vendor/model may be incorrect. */
325
326 /* The following line must be delete when "net/if_media.h" support it. */
327 #ifndef IFM_10_FL
328 #define IFM_10_FL /* 13 */ IFM_10_5
329 #endif
330
331 #if 0
332 /* Mapping between media bitmap (in fe_softc.mbitmap) and ifm_media. */
333 static int const bit2media [] = {
334 #define MB_HA 0x0001
335 IFM_HDX | IFM_ETHER | IFM_AUTO,
336 #define MB_HM 0x0002
337 IFM_HDX | IFM_ETHER | IFM_MANUAL,
338 #define MB_HT 0x0004
339 IFM_HDX | IFM_ETHER | IFM_10_T,
340 #define MB_H2 0x0008
341 IFM_HDX | IFM_ETHER | IFM_10_2,
342 #define MB_H5 0x0010
343 IFM_HDX | IFM_ETHER | IFM_10_5,
344 #define MB_HF 0x0020
345 IFM_HDX | IFM_ETHER | IFM_10_FL,
346 #define MB_FT 0x0040
347 IFM_FDX | IFM_ETHER | IFM_10_T,
348 /* More can be come here... */
349 0
350 };
351 #else
352 /* Mapping between media bitmap (in fe_softc.mbitmap) and ifm_media. */
353 static int const bit2media [] = {
354 #define MB_HA 0x0001
355 IFM_ETHER | IFM_AUTO,
356 #define MB_HM 0x0002
357 IFM_ETHER | IFM_MANUAL,
358 #define MB_HT 0x0004
359 IFM_ETHER | IFM_10_T,
360 #define MB_H2 0x0008
361 IFM_ETHER | IFM_10_2,
362 #define MB_H5 0x0010
363 IFM_ETHER | IFM_10_5,
364 #define MB_HF 0x0020
365 IFM_ETHER | IFM_10_FL,
366 #define MB_FT 0x0040
367 IFM_ETHER | IFM_10_T,
368 /* More can be come here... */
369 0
370 };
371 #endif
372
373 /*
374 * Routines to access contiguous I/O ports.
375 */
376
377 static void
378 inblk ( struct fe_softc * sc, int offs, u_char * mem, int len )
379 {
380 while ( --len >= 0 ) {
381 *mem++ = inb( sc->ioaddr[ offs++ ] );
382 }
383 }
384
385 static void
386 outblk ( struct fe_softc * sc, int offs, u_char const * mem, int len )
387 {
388 while ( --len >= 0 ) {
389 outb( sc->ioaddr[ offs++ ], *mem++ );
390 }
391 }
392
393 /* PCCARD Support */
394 #if NCARD > 0
395 /*
396 * PC-Card (PCMCIA) specific code.
397 */
398 static int feinit (struct pccard_devinfo *);
399 static void feunload (struct pccard_devinfo *);
400 static int fe_card_intr (struct pccard_devinfo *);
401
402 PCCARD_MODULE(fe, feinit, feunload, fe_card_intr, 0, net_imask);
403
404 /*
405 * Initialize the device - called from Slot manager.
406 */
407 static int
408 feinit(struct pccard_devinfo *devi)
409 {
410 struct fe_softc *sc;
411
412 /* validate unit number. */
413 if (devi->isahd.id_unit >= NFE) return ENODEV;
414
415 /* Prepare for the device probe process. */
416 sc = &fe_softc[devi->isahd.id_unit];
417 sc->sc_unit = devi->isahd.id_unit;
418 sc->iobase = devi->isahd.id_iobase;
419
420 /*
421 * When the feinit() is called, the devi->misc holds a
422 * six-byte value set by the pccard daemon. If the
423 * corresponding entry in /etc/pccard.conf has an "ether"
424 * keyword, the value is the Ethernet MAC address extracted
425 * from CIS area of the card. If the entry has no "ether"
426 * keyword, the daemon fills the field with binary zero,
427 * instead. We passes the value (either MAC address or zero)
428 * to model-specific sub-probe routines through sc->sc_enaddr
429 * (it actually is sc->sc_arpcom.ar_enaddr, BTW) so that the
430 * sub-probe routies can use that info.
431 */
432 bcopy(devi->misc, sc->sc_enaddr, ETHER_ADDR_LEN);
433
434 /* Probe for supported cards. */
435 if (fe_probe_mbh(&devi->isahd, sc) == 0
436 && fe_probe_tdk(&devi->isahd, sc) == 0) return ENXIO;
437
438 /* We've got a supported card. Attach it, then. */
439 if (fe_attach(&devi->isahd) == 0) return ENXIO;
440
441 return 0;
442 }
443
444 /*
445 * feunload - unload the driver and clear the table.
446 * XXX TODO:
447 * This is usually called when the card is ejected, but
448 * can be caused by a modunload of a controller driver.
449 * The idea is to reset the driver's view of the device
450 * and ensure that any driver entry points such as
451 * read and write do not hang.
452 */
453 static void
454 feunload(struct pccard_devinfo *devi)
455 {
456 struct fe_softc *sc = &fe_softc[devi->isahd.id_unit];
457 printf("fe%d: unload\n", sc->sc_unit);
458 fe_stop(sc);
459 if_down(&sc->arpcom.ac_if);
460 }
461
462 /*
463 * fe_card_intr - Shared interrupt called from
464 * front end of PC-Card handler.
465 */
466 static int
467 fe_card_intr(struct pccard_devinfo *devi)
468 {
469 feintr(devi->isahd.id_unit);
470 return (1);
471 }
472 #endif /* NCARD > 0 */
473
474
475 /*
476 * Hardware probe routines.
477 *
478 * In older versions of this driver, we provided an automatic I/O
479 * address detection. The features is, however, removed from this
480 * version, for simplicity. Any comments?
481 */
482
483 /*
484 * Determine if the device is present at a specified I/O address. The
485 * main entry to the driver.
486 */
487
488 static int
489 fe_probe (struct isa_device * dev)
490 {
491 struct fe_softc * sc;
492 int nports;
493
494 #ifdef DIAGNOSTIC
495 if (dev->id_unit >= NFE) {
496 printf("fe%d: too large unit number for the current config\n",
497 dev->id_unit);
498 return 0;
499 }
500 #endif
501
502 /* Prepare for the softc struct. */
503 sc = &fe_softc[dev->id_unit];
504 sc->sc_unit = dev->id_unit;
505 sc->iobase = dev->id_iobase;
506
507 /* Probe for supported boards. */
508 nports = 0;
509 #ifdef PC98
510 if (!nports) nports = fe_probe_re1000(dev, sc);
511 if (!nports) nports = fe_probe_cnet9ne(dev, sc);
512 if (!nports) nports = fe_probe_rex(dev, sc);
513 #endif
514 if (!nports) nports = fe_probe_ssi(dev, sc);
515 if (!nports) nports = fe_probe_jli(dev, sc);
516 if (!nports) nports = fe_probe_fmv(dev, sc);
517 if (!nports) nports = fe_probe_lnx(dev, sc);
518 if (!nports) nports = fe_probe_ubn(dev, sc);
519 if (!nports) nports = fe_probe_gwy(dev, sc);
520
521 /* We found supported board. */
522 return nports;
523 }
524
525 /*
526 * Check for specific bits in specific registers have specific values.
527 * A common utility function called from various sub-probe routines.
528 */
529
530 struct fe_simple_probe_struct
531 {
532 u_char port; /* Offset from the base I/O address. */
533 u_char mask; /* Bits to be checked. */
534 u_char bits; /* Values to be compared against. */
535 };
536
537 static int
538 fe_simple_probe ( struct fe_softc const * sc,
539 struct fe_simple_probe_struct const * sp )
540 {
541 struct fe_simple_probe_struct const * p;
542
543 for ( p = sp; p->mask != 0; p++ ) {
544 #ifdef FE_DEBUG
545 unsigned a = sc->ioaddr[p->port];
546 printf("fe%d: Probing %02x (%04x): %02x (%02x, %02x): %s\n",
547 sc->sc_unit, p->port, a, inb(a), p->mask, p->bits,
548 (inb(a) & p->mask) == p->bits ? "OK" : "NG");
549 #endif
550 if ( ( inb( sc->ioaddr[ p->port ] ) & p->mask ) != p->bits )
551 {
552 return ( 0 );
553 }
554 }
555 return ( 1 );
556 }
557
558 /* Test if a given 6 byte value is a valid Ethernet station (MAC)
559 address. "Vendor" is an expected vendor code (first three bytes,)
560 or a zero when nothing expected. */
561 static int
562 valid_Ether_p (u_char const * addr, unsigned vendor)
563 {
564 #ifdef FE_DEBUG
565 printf("fe?: validating %6D against %06x\n", addr, ":", vendor);
566 #endif
567
568 /* All zero is not allowed as a vendor code. */
569 if (addr[0] == 0 && addr[1] == 0 && addr[2] == 0) return 0;
570
571 switch (vendor) {
572 case 0x000000:
573 /* Legal Ethernet address (stored in ROM) must have
574 its Group and Local bits cleared. */
575 if ((addr[0] & 0x03) != 0) return 0;
576 break;
577 case 0x020000:
578 /* Same as above, but a local address is allowed in
579 this context. */
580 if ((addr[0] & 0x01) != 0) return 0;
581 break;
582 default:
583 /* Make sure the vendor part matches if one is given. */
584 if ( addr[0] != ((vendor >> 16) & 0xFF)
585 || addr[1] != ((vendor >> 8) & 0xFF)
586 || addr[2] != ((vendor ) & 0xFF)) return 0;
587 break;
588 }
589
590 /* Host part must not be all-zeros nor all-ones. */
591 if (addr[3] == 0xFF && addr[4] == 0xFF && addr[5] == 0xFF) return 0;
592 if (addr[3] == 0x00 && addr[4] == 0x00 && addr[5] == 0x00) return 0;
593
594 /* Given addr looks like an Ethernet address. */
595 return 1;
596 }
597
598 /* Fill our softc struct with default value. */
599 static void
600 fe_softc_defaults (struct fe_softc *sc)
601 {
602 int i;
603
604 /* Initialize I/O address re-mapping table for the standard
605 (contiguous) register layout. This routine doesn't use
606 ioaddr[], so the caller can safely override it after
607 calling fe_softc_defaults, if needed. */
608 for (i = 0; i < MAXREGISTERS; i++) sc->ioaddr[i] = sc->iobase + i;
609
610 /* Prepare for typical register prototypes. We assume a
611 "typical" board has <32KB> of <fast> SRAM connected with a
612 <byte-wide> data lines. */
613 sc->proto_dlcr4 = FE_D4_LBC_DISABLE | FE_D4_CNTRL;
614 sc->proto_dlcr5 = 0;
615 sc->proto_dlcr6 = FE_D6_BUFSIZ_32KB | FE_D6_TXBSIZ_2x4KB
616 | FE_D6_BBW_BYTE | FE_D6_SBW_WORD | FE_D6_SRAM_100ns;
617 sc->proto_dlcr7 = FE_D7_BYTSWP_LH;
618 sc->proto_bmpr13 = 0;
619
620 /* Assume the probe process (to be done later) is stable. */
621 sc->stability = 0;
622
623 /* A typical board needs no hooks. */
624 sc->init = NULL;
625 sc->stop = NULL;
626
627 /* Assume the board has no software-controllable media selection. */
628 sc->mbitmap = MB_HM;
629 sc->defmedia = MB_HM;
630 sc->msel = NULL;
631 }
632
633 /* Common error reporting routine used in probe routines for
634 "soft configured IRQ"-type boards. */
635 static void
636 fe_irq_failure (char const *name, int unit, int irq, char const *list)
637 {
638 printf("fe%d: %s board is detected, but %s IRQ was given\n",
639 unit, name, (irq == NO_IRQ ? "no" : "invalid"));
640 if (list != NULL) {
641 printf("fe%d: specify an IRQ from %s in kernel config\n",
642 unit, list);
643 }
644 }
645
646 /*
647 * Hardware (vendor) specific probe routines and hooks.
648 */
649
650 /*
651 * Machine independent routines.
652 */
653
654 /*
655 * Generic media selection scheme for MB86965 based boards.
656 */
657 static void
658 fe_msel_965 (struct fe_softc *sc)
659 {
660 u_char b13;
661
662 /* Find the appropriate bits for BMPR13 tranceiver control. */
663 switch (IFM_SUBTYPE(sc->media.ifm_media)) {
664 case IFM_AUTO: b13 = FE_B13_PORT_AUTO | FE_B13_TPTYPE_UTP; break;
665 case IFM_10_T: b13 = FE_B13_PORT_TP | FE_B13_TPTYPE_UTP; break;
666 default: b13 = FE_B13_PORT_AUI; break;
667 }
668
669 /* Write it into the register. It takes effect immediately. */
670 outb(sc->ioaddr[FE_BMPR13], sc->proto_bmpr13 | b13);
671 }
672
673 /*
674 * Fujitsu MB86965 JLI mode support routines.
675 */
676
677 /* Datasheet for 86965 explicitly states that it only supports serial
678 * EEPROM with 16 words (32 bytes) capacity. (I.e., 93C06.) However,
679 * ones with 64 words (128 bytes) are available in the marked, namely
680 * 93C46, and are also fully compatible with 86965. It is known that
681 * some boards (e.g., ICL) actually have 93C46 on them and use extra
682 * storage to keep various config info. */
683 #define JLI_EEPROM_SIZE 128
684
685 /*
686 * Routines to read all bytes from the config EEPROM through MB86965A.
687 * It is a MicroWire (3-wire) serial EEPROM with 6-bit address.
688 * (93C06 or 93C46.)
689 */
690 static void
691 fe_strobe_eeprom_jli ( u_short bmpr16 )
692 {
693 /*
694 * We must guarantee 1us (or more) interval to access slow
695 * EEPROMs. The following redundant code provides enough
696 * delay with ISA timing. (Even if the bus clock is "tuned.")
697 * Some modification will be needed on faster busses.
698 */
699 outb( bmpr16, FE_B16_SELECT );
700 outb( bmpr16, FE_B16_SELECT | FE_B16_CLOCK );
701 outb( bmpr16, FE_B16_SELECT | FE_B16_CLOCK );
702 outb( bmpr16, FE_B16_SELECT );
703 }
704
705 static void
706 fe_read_eeprom_jli ( struct fe_softc * sc, u_char * data )
707 {
708 u_short bmpr16 = sc->ioaddr[ FE_BMPR16 ];
709 u_short bmpr17 = sc->ioaddr[ FE_BMPR17 ];
710 u_char n, val, bit;
711 u_char save16, save17;
712
713 /* Save the current value of the EEPROM interface registers. */
714 save16 = inb(bmpr16);
715 save17 = inb(bmpr17);
716
717 /* Read bytes from EEPROM; two bytes per an iteration. */
718 for ( n = 0; n < JLI_EEPROM_SIZE / 2; n++ ) {
719
720 /* Reset the EEPROM interface. */
721 outb( bmpr16, 0x00 );
722 outb( bmpr17, 0x00 );
723
724 /* Start EEPROM access. */
725 outb( bmpr16, FE_B16_SELECT );
726 outb( bmpr17, FE_B17_DATA );
727 fe_strobe_eeprom_jli( bmpr16 );
728
729 /* Pass the iteration count as well as a READ command. */
730 val = 0x80 | n;
731 for ( bit = 0x80; bit != 0x00; bit >>= 1 ) {
732 outb( bmpr17, ( val & bit ) ? FE_B17_DATA : 0 );
733 fe_strobe_eeprom_jli( bmpr16 );
734 }
735 outb( bmpr17, 0x00 );
736
737 /* Read a byte. */
738 val = 0;
739 for ( bit = 0x80; bit != 0x00; bit >>= 1 ) {
740 fe_strobe_eeprom_jli( bmpr16 );
741 if ( inb( bmpr17 ) & FE_B17_DATA ) {
742 val |= bit;
743 }
744 }
745 *data++ = val;
746
747 /* Read one more byte. */
748 val = 0;
749 for ( bit = 0x80; bit != 0x00; bit >>= 1 ) {
750 fe_strobe_eeprom_jli( bmpr16 );
751 if ( inb( bmpr17 ) & FE_B17_DATA ) {
752 val |= bit;
753 }
754 }
755 *data++ = val;
756 }
757
758 #if 0
759 /* Reset the EEPROM interface, again. */
760 outb( bmpr16, 0x00 );
761 outb( bmpr17, 0x00 );
762 #else
763 /* Make sure to restore the original value of EEPROM interface
764 registers, since we are not yet sure we have MB86965A on
765 the address. */
766 outb(bmpr17, save17);
767 outb(bmpr16, save16);
768 #endif
769
770 #if 1
771 /* Report what we got. */
772 if (bootverbose) {
773 int i;
774 data -= JLI_EEPROM_SIZE;
775 for (i = 0; i < JLI_EEPROM_SIZE; i += 16) {
776 printf("fe%d: EEPROM(JLI):%3x: %16D\n",
777 sc->sc_unit, i, data + i, " ");
778 }
779 }
780 #endif
781 }
782
783 static void
784 fe_init_jli (struct fe_softc * sc)
785 {
786 /* "Reset" by writing into a magic location. */
787 DELAY(200);
788 outb(sc->ioaddr[0x1E], inb(sc->ioaddr[0x1E]));
789 DELAY(300);
790 }
791
792 /*
793 * SSi 78Q8377A support routines.
794 */
795
796 #define SSI_EEPROM_SIZE 512
797 #define SSI_DIN 0x01
798 #define SSI_DAT 0x01
799 #define SSI_CSL 0x02
800 #define SSI_CLK 0x04
801 #define SSI_EEP 0x10
802
803 /*
804 * Routines to read all bytes from the config EEPROM through 78Q8377A.
805 * It is a MicroWire (3-wire) serial EEPROM with 8-bit address. (I.e.,
806 * 93C56 or 93C66.)
807 *
808 * As I don't have SSi manuals, (hmm, an old song again!) I'm not exactly
809 * sure the following code is correct... It is just stolen from the
810 * C-NET(98)P2 support routine in FreeBSD(98).
811 */
812
813 static void
814 fe_read_eeprom_ssi (struct fe_softc *sc, u_char *data)
815 {
816 u_short bmpr12 = sc->ioaddr[FE_DLCR12];
817 u_char val, bit;
818 int n;
819 u_char save6, save7, save12;
820
821 /* Save the current value for the DLCR registers we are about
822 to destroy. */
823 save6 = inb(sc->ioaddr[FE_DLCR6]);
824 save7 = inb(sc->ioaddr[FE_DLCR7]);
825
826 /* Put the 78Q8377A into a state that we can access the EEPROM. */
827 outb(sc->ioaddr[FE_DLCR6],
828 FE_D6_BBW_WORD | FE_D6_SBW_WORD | FE_D6_DLC_DISABLE);
829 outb(sc->ioaddr[FE_DLCR7],
830 FE_D7_BYTSWP_LH | FE_D7_RBS_BMPR | FE_D7_RDYPNS | FE_D7_POWER_UP);
831
832 /* Save the current value for the BMPR12 register, too. */
833 save12 = inb(bmpr12);
834
835 /* Read bytes from EEPROM; two bytes per an iteration. */
836 for ( n = 0; n < SSI_EEPROM_SIZE / 2; n++ ) {
837
838 /* Start EEPROM access */
839 outb(bmpr12, SSI_EEP);
840 outb(bmpr12, SSI_EEP | SSI_CSL);
841
842 /* Send the following four bits to the EEPROM in the
843 specified order: a dummy bit, a start bit, and
844 command bits (10) for READ. */
845 outb(bmpr12, SSI_EEP | SSI_CSL );
846 outb(bmpr12, SSI_EEP | SSI_CSL | SSI_CLK ); /* 0 */
847 outb(bmpr12, SSI_EEP | SSI_CSL | SSI_DAT);
848 outb(bmpr12, SSI_EEP | SSI_CSL | SSI_CLK | SSI_DAT); /* 1 */
849 outb(bmpr12, SSI_EEP | SSI_CSL | SSI_DAT);
850 outb(bmpr12, SSI_EEP | SSI_CSL | SSI_CLK | SSI_DAT); /* 1 */
851 outb(bmpr12, SSI_EEP | SSI_CSL );
852 outb(bmpr12, SSI_EEP | SSI_CSL | SSI_CLK ); /* 0 */
853
854 /* Pass the iteration count to the chip. */
855 for ( bit = 0x80; bit != 0x00; bit >>= 1 ) {
856 val = ( n & bit ) ? SSI_DAT : 0;
857 outb(bmpr12, SSI_EEP | SSI_CSL | val);
858 outb(bmpr12, SSI_EEP | SSI_CSL | SSI_CLK | val);
859 }
860
861 /* Read a byte. */
862 val = 0;
863 for ( bit = 0x80; bit != 0x00; bit >>= 1 ) {
864 outb(bmpr12, SSI_EEP | SSI_CSL);
865 outb(bmpr12, SSI_EEP | SSI_CSL | SSI_CLK);
866 if (inb(bmpr12) & SSI_DIN) val |= bit;
867 }
868 *data++ = val;
869
870 /* Read one more byte. */
871 val = 0;
872 for ( bit = 0x80; bit != 0x00; bit >>= 1 ) {
873 outb(bmpr12, SSI_EEP | SSI_CSL);
874 outb(bmpr12, SSI_EEP | SSI_CSL | SSI_CLK);
875 if (inb(bmpr12) & SSI_DIN) val |= bit;
876 }
877 *data++ = val;
878
879 outb(bmpr12, SSI_EEP);
880 }
881
882 /* Reset the EEPROM interface. (For now.) */
883 outb( bmpr12, 0x00 );
884
885 /* Restore the saved register values, for the case that we
886 didn't have 78Q8377A at the given address. */
887 outb(bmpr12, save12);
888 outb(sc->ioaddr[FE_DLCR7], save7);
889 outb(sc->ioaddr[FE_DLCR6], save6);
890
891 #if 1
892 /* Report what we got. */
893 if (bootverbose) {
894 int i;
895 data -= SSI_EEPROM_SIZE;
896 for (i = 0; i < SSI_EEPROM_SIZE; i += 16) {
897 printf("fe%d: EEPROM(SSI):%3x: %16D\n",
898 sc->sc_unit, i, data + i, " ");
899 }
900 }
901 #endif
902 }
903
904 #define FE_SSI_EEP_IRQ 9 /* Irq ??? */
905 #define FE_SSI_EEP_ADDR 16 /* Station(MAC) address */
906 #define FE_SSI_EEP_DUPLEX 25 /* Duplex mode ??? */
907
908 /*
909 * TDK/LANX boards support routines.
910 */
911
912 /* AX012/AX013 equips an X24C01 chip, which has 128 bytes of memory cells. */
913 #define LNX_EEPROM_SIZE 128
914
915 /* Bit assignments and command definitions for the serial EEPROM
916 interface register in LANX ASIC. */
917 #define LNX_SDA_HI 0x08 /* Drive SDA line high (logical 1.) */
918 #define LNX_SDA_LO 0x00 /* Drive SDA line low (logical 0.) */
919 #define LNX_SDA_FL 0x08 /* Float (don't drive) SDA line. */
920 #define LNX_SDA_IN 0x01 /* Mask for reading SDA line. */
921 #define LNX_CLK_HI 0x04 /* Drive clock line high (active.) */
922 #define LNX_CLK_LO 0x00 /* Drive clock line low (inactive.) */
923
924 /* It is assumed that the CLK line is low and SDA is high (float) upon entry. */
925 #define LNX_PH(D,K,N) \
926 ((LNX_SDA_##D | LNX_CLK_##K) << N)
927 #define LNX_CYCLE(D1,D2,D3,D4,K1,K2,K3,K4) \
928 (LNX_PH(D1,K1,0)|LNX_PH(D2,K2,8)|LNX_PH(D3,K3,16)|LNX_PH(D4,K4,24))
929
930 #define LNX_CYCLE_START LNX_CYCLE(HI,LO,LO,HI, HI,HI,LO,LO)
931 #define LNX_CYCLE_STOP LNX_CYCLE(LO,LO,HI,HI, LO,HI,HI,LO)
932 #define LNX_CYCLE_HI LNX_CYCLE(HI,HI,HI,HI, LO,HI,LO,LO)
933 #define LNX_CYCLE_LO LNX_CYCLE(LO,LO,LO,HI, LO,HI,LO,LO)
934 #define LNX_CYCLE_INIT LNX_CYCLE(LO,HI,HI,HI, LO,LO,LO,LO)
935
936 static void
937 fe_eeprom_cycle_lnx (u_short reg20, u_long cycle)
938 {
939 outb(reg20, (cycle ) & 0xFF);
940 DELAY(15);
941 outb(reg20, (cycle >> 8) & 0xFF);
942 DELAY(15);
943 outb(reg20, (cycle >> 16) & 0xFF);
944 DELAY(15);
945 outb(reg20, (cycle >> 24) & 0xFF);
946 DELAY(15);
947 }
948
949 static u_char
950 fe_eeprom_receive_lnx (u_short reg20)
951 {
952 u_char dat;
953
954 outb(reg20, LNX_CLK_HI | LNX_SDA_FL);
955 DELAY(15);
956 dat = inb(reg20);
957 outb(reg20, LNX_CLK_LO | LNX_SDA_FL);
958 DELAY(15);
959 return (dat & LNX_SDA_IN);
960 }
961
962 static void
963 fe_read_eeprom_lnx (struct fe_softc *sc, u_char *data)
964 {
965 int i;
966 u_char n, bit, val;
967 u_char save20;
968 u_short reg20 = sc->ioaddr[0x14];
969
970 save20 = inb(reg20);
971
972 /* NOTE: DELAY() timing constants are approximately three
973 times longer (slower) than the required minimum. This is
974 to guarantee a reliable operation under some tough
975 conditions... Fortunately, this routine is only called
976 during the boot phase, so the speed is less important than
977 stability. */
978
979 #if 1
980 /* Reset the X24C01's internal state machine and put it into
981 the IDLE state. We usually don't need this, but *if*
982 someone (e.g., probe routine of other driver) write some
983 garbage into the register at 0x14, synchronization will be
984 lost, and the normal EEPROM access protocol won't work.
985 Moreover, as there are no easy way to reset, we need a
986 _manoeuvre_ here. (It even lacks a reset pin, so pushing
987 the RESET button on the PC doesn't help!) */
988 fe_eeprom_cycle_lnx(reg20, LNX_CYCLE_INIT);
989 for (i = 0; i < 10; i++) {
990 fe_eeprom_cycle_lnx(reg20, LNX_CYCLE_START);
991 }
992 fe_eeprom_cycle_lnx(reg20, LNX_CYCLE_STOP);
993 DELAY(10000);
994 #endif
995
996 /* Issue a start condition. */
997 fe_eeprom_cycle_lnx(reg20, LNX_CYCLE_START);
998
999 /* Send seven bits of the starting address (zero, in this
1000 case) and a command bit for READ. */
1001 val = 0x01;
1002 for (bit = 0x80; bit != 0x00; bit >>= 1) {
1003 if (val & bit) {
1004 fe_eeprom_cycle_lnx(reg20, LNX_CYCLE_HI);
1005 } else {
1006 fe_eeprom_cycle_lnx(reg20, LNX_CYCLE_LO);
1007 }
1008 }
1009
1010 /* Receive an ACK bit. */
1011 if (fe_eeprom_receive_lnx(reg20)) {
1012 /* ACK was not received. EEPROM is not present (i.e.,
1013 this board was not a TDK/LANX) or not working
1014 properly. */
1015 if (bootverbose) {
1016 printf("fe%d: no ACK received from EEPROM(LNX)\n",
1017 sc->sc_unit);
1018 }
1019 /* Clear the given buffer to indicate we could not get
1020 any info. and return. */
1021 bzero(data, LNX_EEPROM_SIZE);
1022 goto RET;
1023 }
1024
1025 /* Read bytes from EEPROM. */
1026 for (n = 0; n < LNX_EEPROM_SIZE; n++) {
1027
1028 /* Read a byte and store it into the buffer. */
1029 val = 0x00;
1030 for (bit = 0x80; bit != 0x00; bit >>= 1) {
1031 if (fe_eeprom_receive_lnx(reg20)) val |= bit;
1032 }
1033 *data++ = val;
1034
1035 /* Acknowledge if we have to read more. */
1036 if (n < LNX_EEPROM_SIZE - 1) {
1037 fe_eeprom_cycle_lnx(reg20, LNX_CYCLE_LO);
1038 }
1039 }
1040
1041 /* Issue a STOP condition, de-activating the clock line.
1042 It will be safer to keep the clock line low than to leave
1043 it high. */
1044 fe_eeprom_cycle_lnx(reg20, LNX_CYCLE_STOP);
1045
1046 RET:
1047 outb(reg20, save20);
1048
1049 #if 1
1050 /* Report what we got. */
1051 if (bootverbose) {
1052 data -= LNX_EEPROM_SIZE;
1053 for (i = 0; i < LNX_EEPROM_SIZE; i += 16) {
1054 printf("fe%d: EEPROM(LNX):%3x: %16D\n",
1055 sc->sc_unit, i, data + i, " ");
1056 }
1057 }
1058 #endif
1059 }
1060
1061 static void
1062 fe_init_lnx ( struct fe_softc * sc )
1063 {
1064 /* Reset the 86960. Do we need this? FIXME. */
1065 outb(sc->ioaddr[0x12], 0x06);
1066 DELAY(100);
1067 outb(sc->ioaddr[0x12], 0x07);
1068 DELAY(100);
1069
1070 /* Setup IRQ control register on the ASIC. */
1071 outb(sc->ioaddr[0x14], sc->priv_info);
1072 }
1073
1074 /*
1075 * Ungermann-Bass boards support routine.
1076 */
1077 static void
1078 fe_init_ubn ( struct fe_softc * sc )
1079 {
1080 /* Do we need this? FIXME. */
1081 outb(sc->ioaddr[FE_DLCR7],
1082 sc->proto_dlcr7 | FE_D7_RBS_BMPR | FE_D7_POWER_UP);
1083 outb(sc->ioaddr[0x18], 0x00);
1084 DELAY( 200 );
1085
1086 /* Setup IRQ control register on the ASIC. */
1087 outb(sc->ioaddr[0x14], sc->priv_info);
1088 }
1089
1090 /*
1091 * Machine dependent probe routines.
1092 */
1093
1094 #ifdef PC98
1095 static int
1096 fe_probe_fmv ( struct isa_device * dev, struct fe_softc * sc )
1097 {
1098 /* PC-98 has no board of this architechture. */
1099 return 0;
1100 }
1101
1102 /* ioaddr for RE1000/1000Plus - Very dirty! */
1103 static u_short ioaddr_re1000[MAXREGISTERS] = {
1104 0x0000, 0x0001, 0x0200, 0x0201, 0x0400, 0x0401, 0x0600, 0x0601,
1105 0x0800, 0x0801, 0x0a00, 0x0a01, 0x0c00, 0x0c01, 0x0e00, 0x0e01,
1106 0x1000, 0x1200, 0x1400, 0x1600, 0x1800, 0x1a00, 0x1c00, 0x1e00,
1107 0x1001, 0x1201, 0x1401, 0x1601, 0x1801, 0x1a01, 0x1c01, 0x1e01,
1108 };
1109
1110 /*
1111 * Probe and initialization for Allied-Telesis RE1000 series.
1112 */
1113 static void
1114 fe_init_re1000 ( struct fe_softc * sc )
1115 {
1116 /* Setup IRQ control register on the ASIC. */
1117 outb(sc->ioaddr[FE_RE1000_IRQCONF], sc->priv_info);
1118 }
1119
1120 static int
1121 fe_probe_re1000 ( struct isa_device * dev, struct fe_softc * sc )
1122 {
1123 int i, n;
1124 u_char sum;
1125
1126 static struct fe_simple_probe_struct probe_table [] = {
1127 { FE_DLCR2, 0x58, 0x00 },
1128 { FE_DLCR4, 0x08, 0x00 },
1129 { 0 }
1130 };
1131
1132 /* See if the specified I/O address is possible for RE1000. */
1133 /* [01]D[02468ACE] are allowed. */
1134 if ((sc->iobase & ~0x10E) != 0xD0) return 0;
1135
1136 /* Setup an I/O address mapping table and some others. */
1137 fe_softc_defaults(sc);
1138
1139 /* Re-map ioaddr for RE1000. */
1140 for (i = 0; i < MAXREGISTERS; i++)
1141 sc->ioaddr[i] = sc->iobase + ioaddr_re1000[i];
1142
1143 /* See if the card is on its address. */
1144 if (!fe_simple_probe(sc, probe_table)) return 0;
1145
1146 /* Get our station address from EEPROM. */
1147 inblk(sc, 0x18, sc->sc_enaddr, ETHER_ADDR_LEN);
1148
1149 /* Make sure it is Allied-Telesis's. */
1150 if (!valid_Ether_p(sc->sc_enaddr, 0x0000F4)) return 0;
1151 #if 1
1152 /* Calculate checksum. */
1153 sum = inb(sc->ioaddr[0x1e]);
1154 for (i = 0; i < ETHER_ADDR_LEN; i++) {
1155 sum ^= sc->sc_enaddr[i];
1156 }
1157 if (sum != 0) return 0;
1158 #endif
1159 /* Setup the board type. */
1160 sc->typestr = "RE1000";
1161
1162 /* This looks like an RE1000 board. It requires an
1163 explicit IRQ setting in config. Make sure we have one,
1164 determining an appropriate value for the IRQ control
1165 register. */
1166 switch (dev->id_irq) {
1167 case IRQ3: n = 0x10; break;
1168 case IRQ5: n = 0x20; break;
1169 case IRQ6: n = 0x40; break;
1170 case IRQ12: n = 0x80; break;
1171 default:
1172 fe_irq_failure(sc->typestr,
1173 sc->sc_unit, dev->id_irq, "3/5/6/12");
1174 return 0;
1175 }
1176 sc->priv_info = inb(sc->ioaddr[FE_RE1000_IRQCONF]) & 0x0f | n;
1177
1178 /* Setup hooks. We need a special initialization procedure. */
1179 sc->init = fe_init_re1000;
1180
1181 /* The I/O address range is fragmented in the RE1000.
1182 It occupies 2*16 I/O addresses, by the way. */
1183 return 2;
1184 }
1185
1186 /* JLI sub-probe for Allied-Telesis RE1000Plus/ME1500 series. */
1187 static u_short const *
1188 fe_probe_jli_re1000p (struct fe_softc * sc, u_char const * eeprom)
1189 {
1190 int i;
1191 static u_short const irqmaps_re1000p [4] = { IRQ3, IRQ5, IRQ6, IRQ12 };
1192
1193 /* Make sure the EEPROM contains Allied-Telesis bit pattern. */
1194 if (eeprom[1] != 0xFF) return NULL;
1195 for (i = 2; i < 8; i++) if (eeprom[i] != 0xFF) return NULL;
1196 for (i = 14; i < 24; i++) if (eeprom[i] != 0xFF) return NULL;
1197
1198 /* Get our station address from EEPROM, and make sure the
1199 EEPROM contains Allied-Telesis's address. */
1200 bcopy(eeprom+8, sc->sc_enaddr, ETHER_ADDR_LEN);
1201 if (!valid_Ether_p(sc->sc_enaddr, 0x0000F4)) return NULL;
1202
1203 /* I don't know any sub-model identification. */
1204 sc->typestr = "RE1000Plus/ME1500";
1205
1206 /* Returns the IRQ table for the RE1000Plus. */
1207 return irqmaps_re1000p;
1208 }
1209
1210 /*
1211 * Probe for Allied-Telesis RE1000Plus/ME1500 series.
1212 */
1213 static int
1214 fe_probe_jli (struct isa_device * dev, struct fe_softc * sc)
1215 {
1216 int i, n;
1217 int irq;
1218 u_char eeprom [JLI_EEPROM_SIZE];
1219 u_short const * irqmap;
1220
1221 static u_short const baseaddr [8] =
1222 { 0x1D6, 0x1D8, 0x1DA, 0x1D4, 0x0D4, 0x0D2, 0x0D8, 0x0D0 };
1223 static struct fe_simple_probe_struct const probe_table [] = {
1224 /* { FE_DLCR1, 0x20, 0x00 }, Doesn't work. */
1225 { FE_DLCR2, 0x50, 0x00 },
1226 { FE_DLCR4, 0x08, 0x00 },
1227 /* { FE_DLCR5, 0x80, 0x00 }, Doesn't work. */
1228 #if 0
1229 { FE_BMPR16, 0x1B, 0x00 },
1230 { FE_BMPR17, 0x7F, 0x00 },
1231 #endif
1232 { 0 }
1233 };
1234
1235 /*
1236 * See if the specified address is possible for MB86965A JLI mode.
1237 */
1238 for (i = 0; i < 8; i++) {
1239 if (baseaddr[i] == sc->iobase) break;
1240 }
1241 if (i == 8) return 0;
1242
1243 /* Fill the softc struct with reasonable default. */
1244 fe_softc_defaults(sc);
1245
1246 /* Re-map ioaddr for RE1000Plus. */
1247 for (i = 0; i < MAXREGISTERS; i++)
1248 sc->ioaddr[i] = sc->iobase + ioaddr_re1000[i];
1249
1250 /*
1251 * We should test if MB86965A is on the base address now.
1252 * Unfortunately, it is very hard to probe it reliably, since
1253 * we have no way to reset the chip under software control.
1254 * On cold boot, we could check the "signature" bit patterns
1255 * described in the Fujitsu document. On warm boot, however,
1256 * we can predict almost nothing about register values.
1257 */
1258 if (!fe_simple_probe(sc, probe_table)) return 0;
1259
1260 /* Check if our I/O address matches config info on 86965. */
1261 n = (inb(sc->ioaddr[FE_BMPR19]) & FE_B19_ADDR) >> FE_B19_ADDR_SHIFT;
1262 if (baseaddr[n] != sc->iobase) return 0;
1263
1264 /*
1265 * We are now almost sure we have an MB86965 at the given
1266 * address. So, read EEPROM through it. We have to write
1267 * into LSI registers to read from EEPROM. I want to avoid it
1268 * at this stage, but I cannot test the presence of the chip
1269 * any further without reading EEPROM. FIXME.
1270 */
1271 fe_read_eeprom_jli(sc, eeprom);
1272
1273 /* Make sure that config info in EEPROM and 86965 agree. */
1274 if (eeprom[FE_EEPROM_CONF] != inb(sc->ioaddr[FE_BMPR19])) {
1275 return 0;
1276 }
1277
1278 /* Use 86965 media selection scheme, unless othewise
1279 specified. It is "AUTO always" and "select with BMPR13".
1280 This behaviour covers most of the 86965 based board (as
1281 minimum requirements.) It is backward compatible with
1282 previous versions, also. */
1283 sc->mbitmap = MB_HA;
1284 sc->defmedia = MB_HA;
1285 sc->msel = fe_msel_965;
1286
1287 /* Perform board-specific probe. */
1288 if ((irqmap = fe_probe_jli_re1000p(sc, eeprom)) == NULL) return 0;
1289
1290 /* Find the IRQ read from EEPROM. */
1291 n = (inb(sc->ioaddr[FE_BMPR19]) & FE_B19_IRQ) >> FE_B19_IRQ_SHIFT;
1292 irq = irqmap[n];
1293
1294 /* Try to determine IRQ setting. */
1295 if (dev->id_irq == NO_IRQ && irq == NO_IRQ) {
1296 /* The device must be configured with an explicit IRQ. */
1297 printf("fe%d: IRQ auto-detection does not work\n",
1298 sc->sc_unit);
1299 return 0;
1300 } else if (dev->id_irq == NO_IRQ && irq != NO_IRQ) {
1301 /* Just use the probed IRQ value. */
1302 dev->id_irq = irq;
1303 } else if (dev->id_irq != NO_IRQ && irq == NO_IRQ) {
1304 /* No problem. Go ahead. */
1305 } else if (dev->id_irq == irq) {
1306 /* Good. Go ahead. */
1307 } else {
1308 /* User must be warned in this case. */
1309 sc->stability |= UNSTABLE_IRQ;
1310 }
1311
1312 /* Setup a hook, which resets te 86965 when the driver is being
1313 initialized. This may solve a nasty bug. FIXME. */
1314 sc->init = fe_init_jli;
1315
1316 /* The I/O address range is fragmented in the RE1000Plus.
1317 It occupies 2*16 I/O addresses, by the way. */
1318 return 2;
1319 }
1320
1321 /*
1322 * Probe and initialization for Contec C-NET(9N)E series.
1323 */
1324
1325 /* TODO: Should be in "if_fereg.h" */
1326 #define FE_CNET9NE_INTR 0x10 /* Interrupt Mask? */
1327
1328 static void
1329 fe_init_cnet9ne ( struct fe_softc * sc )
1330 {
1331 /* Enable interrupt? FIXME. */
1332 outb(sc->ioaddr[FE_CNET9NE_INTR], 0x10);
1333 }
1334
1335 static int
1336 fe_probe_cnet9ne ( struct isa_device * dev, struct fe_softc * sc )
1337 {
1338 int i;
1339
1340 static struct fe_simple_probe_struct probe_table [] = {
1341 { FE_DLCR2, 0x58, 0x00 },
1342 { FE_DLCR4, 0x08, 0x00 },
1343 { 0 }
1344 };
1345 static u_short ioaddr[MAXREGISTERS - 16] = {
1346 /* 0x000, 0x001, 0x002, 0x003, 0x004, 0x005, 0x006, 0x007, */
1347 /* 0x008, 0x009, 0x00a, 0x00b, 0x00c, 0x00d, 0x00e, 0x00f, */
1348 0x400, 0x402, 0x404, 0x406, 0x408, 0x40a, 0x40c, 0x40e,
1349 0x401, 0x403, 0x405, 0x407, 0x409, 0x40b, 0x40d, 0x40f,
1350 };
1351
1352 /* See if the specified I/O address is possible for C-NET(9N)E. */
1353 if (sc->iobase != 0x73D0) return 0;
1354
1355 /* Setup an I/O address mapping table and some others. */
1356 fe_softc_defaults(sc);
1357
1358 /* Re-map ioaddr for C-NET(9N)E. */
1359 for (i = 16; i < MAXREGISTERS; i++)
1360 sc->ioaddr[i] = sc->iobase + ioaddr[i - 16];
1361
1362 /* See if the card is on its address. */
1363 if (!fe_simple_probe(sc, probe_table)) return 0;
1364
1365 /* Get our station address from EEPROM. */
1366 inblk(sc, 0x18, sc->sc_enaddr, ETHER_ADDR_LEN);
1367
1368 /* Make sure it is Contec's. */
1369 if (!valid_Ether_p(sc->sc_enaddr, 0x00804C)) return 0;
1370
1371 /* Determine the card type. */
1372 if (sc->sc_enaddr[3] == 0x06) {
1373 sc->typestr = "C-NET(9N)C";
1374
1375 /* We seems to need our own IDENT bits... FIXME. */
1376 sc->proto_dlcr7 = FE_D7_BYTSWP_LH | FE_D7_IDENT_NICE;
1377
1378 /* C-NET(9N)C requires an explicit IRQ to work. */
1379 if (dev->id_irq == NO_IRQ) {
1380 fe_irq_failure(sc->typestr, sc->sc_unit, NO_IRQ, NULL);
1381 return 0;
1382 }
1383 } else {
1384 sc->typestr = "C-NET(9N)E";
1385
1386 /* C-NET(9N)E works only IRQ5. */
1387 if (dev->id_irq != IRQ5) {
1388 fe_irq_failure(sc->typestr,
1389 sc->sc_unit, dev->id_irq, "5");
1390 return 0;
1391 }
1392
1393 /* We need an init hook to initialize ASIC before we start. */
1394 sc->init = fe_init_cnet9ne;
1395 }
1396
1397 /* C-NET(9N)E has 64KB SRAM. */
1398 sc->proto_dlcr6 = FE_D6_BUFSIZ_64KB | FE_D6_TXBSIZ_2x4KB
1399 | FE_D6_BBW_WORD | FE_D6_SBW_WORD | FE_D6_SRAM;
1400
1401 /* The I/O address range is fragmented in the C-NET(9N)E.
1402 This is the number of regs at iobase. */
1403 return 16;
1404 }
1405
1406 /*
1407 * Probe for Contec C-NET(98)P2 series.
1408 * (Logitec LAN-98TP/LAN-98T25P - parhaps)
1409 */
1410 static int
1411 fe_probe_ssi (struct isa_device *dev, struct fe_softc *sc)
1412 {
1413 u_char eeprom [SSI_EEPROM_SIZE];
1414
1415 static struct fe_simple_probe_struct probe_table [] = {
1416 { FE_DLCR2, 0x08, 0x00 },
1417 { FE_DLCR4, 0x08, 0x00 },
1418 { 0 }
1419 };
1420 static u_short const irqmap[] = {
1421 /* INT0 INT1 INT2 */
1422 NO_IRQ, NO_IRQ, NO_IRQ, IRQ3 , NO_IRQ, IRQ5 , IRQ6 , NO_IRQ,
1423 NO_IRQ, IRQ9 , IRQ10 , NO_IRQ, IRQ12 , IRQ13 , NO_IRQ, NO_IRQ,
1424 /* INT3 INT41 INT5 INT6 */
1425 };
1426
1427 /* See if the specified I/O address is possible for 78Q8377A. */
1428 /* [0-D]3D0 are allowed. */
1429 if ((sc->iobase & 0xFFF) != 0x3D0) return 0; /* XXX */
1430
1431 /* Fill the softc struct with default values. */
1432 fe_softc_defaults(sc);
1433
1434 /* See if the card is on its address. */
1435 if (!fe_simple_probe(sc, probe_table)) return 0;
1436
1437 /* We now have to read the config EEPROM. We should be very
1438 careful, since doing so destroys a register. (Remember, we
1439 are not yet sure we have a C-NET(98)P2 board here.) Don't
1440 remember to select BMPRs bofore reading EEPROM, since other
1441 register bank may be selected before the probe() is called. */
1442 fe_read_eeprom_ssi(sc, eeprom);
1443
1444 /* Make sure the Ethernet (MAC) station address is of Contec's. */
1445 if (!valid_Ether_p(eeprom+FE_SSI_EEP_ADDR, 0x00804C)) return 0;
1446 bcopy(eeprom+FE_SSI_EEP_ADDR, sc->sc_enaddr, ETHER_ADDR_LEN);
1447
1448 /* Setup the board type. */
1449 sc->typestr = "C-NET(98)P2";
1450
1451 /* Get IRQ configuration from EEPROM. */
1452 dev->id_irq = irqmap[eeprom[FE_SSI_EEP_IRQ]];
1453 if (dev->id_irq == NO_IRQ) {
1454 fe_irq_failure(sc->typestr,
1455 sc->sc_unit, dev->id_irq, "3/5/6/9/10/12/13");
1456 return 0;
1457 }
1458
1459 /* Get Duplex-mode configuration from EEPROM. */
1460 sc->proto_dlcr4 |= (eeprom[FE_SSI_EEP_DUPLEX] & FE_D4_DSC);
1461
1462 /* Fill softc struct accordingly. */
1463 sc->mbitmap = MB_HT;
1464 sc->defmedia = MB_HT;
1465
1466 /* We have 16 registers. */
1467 return 16;
1468 }
1469
1470 /*
1471 * Probe for TDK LAC-98012/013/025/9N011 - parhaps.
1472 */
1473 static int
1474 fe_probe_lnx (struct isa_device *dev, struct fe_softc *sc)
1475 {
1476 #ifndef FE_8BIT_SUPPORT
1477 printf("fe%d: skip LAC-98012/013(only 16-bit cards are supported)\n",
1478 sc->sc_unit);
1479 return 0;
1480 #else
1481 int i;
1482 u_char eeprom [LNX_EEPROM_SIZE];
1483
1484 static struct fe_simple_probe_struct probe_table [] = {
1485 { FE_DLCR2, 0x58, 0x00 },
1486 { FE_DLCR4, 0x08, 0x00 },
1487 { 0 }
1488 };
1489
1490 /* See if the specified I/O address is possible for TDK/LANX boards. */
1491 /* 0D0, 4D0, 8D0, and CD0 are allowed. */
1492 if ((sc->iobase & ~0xC00) != 0xD0) return 0;
1493
1494 /* Fill the softc struct with default values. */
1495 fe_softc_defaults(sc);
1496
1497 /* Re-map ioaddr for LAC-98.
1498 * 0x000, 0x002, 0x004, 0x006, 0x008, 0x00a, 0x00c, 0x00e,
1499 * 0x100, 0x102, 0x104, 0x106, 0x108, 0x10a, 0x10c, 0x10e,
1500 * 0x200, 0x202, 0x204, 0x206, 0x208, 0x20a, 0x20c, 0x20e,
1501 * 0x300, 0x302, 0x304, 0x306, 0x308, 0x30a, 0x30c, 0x30e,
1502 */
1503 for (i = 0; i < MAXREGISTERS; i++)
1504 sc->ioaddr[i] = sc->iobase + ((i & 7) << 1) + ((i & 0x18) << 5);
1505
1506 /* See if the card is on its address. */
1507 if (!fe_simple_probe(sc, probe_table)) return 0;
1508
1509 /* We now have to read the config EEPROM. We should be very
1510 careful, since doing so destroys a register. (Remember, we
1511 are not yet sure we have a LAC-98012/98013 board here.) */
1512 fe_read_eeprom_lnx(sc, eeprom);
1513
1514 /* Make sure the Ethernet (MAC) station address is of TDK/LANX's. */
1515 if (!valid_Ether_p(eeprom, 0x008098)) return 0;
1516 bcopy(eeprom, sc->sc_enaddr, ETHER_ADDR_LEN);
1517
1518 /* Setup the board type. */
1519 sc->typestr = "LAC-98012/98013";
1520
1521 /* This looks like a TDK/LANX board. It requires an
1522 explicit IRQ setting in config. Make sure we have one,
1523 determining an appropriate value for the IRQ control
1524 register. */
1525 switch (dev->id_irq) {
1526 case IRQ3 : sc->priv_info = 0x10 | LNX_CLK_LO | LNX_SDA_HI; break;
1527 case IRQ5 : sc->priv_info = 0x20 | LNX_CLK_LO | LNX_SDA_HI; break;
1528 case IRQ6 : sc->priv_info = 0x40 | LNX_CLK_LO | LNX_SDA_HI; break;
1529 case IRQ12: sc->priv_info = 0x80 | LNX_CLK_LO | LNX_SDA_HI; break;
1530 default:
1531 fe_irq_failure(sc->typestr,
1532 sc->sc_unit, dev->id_irq, "3/5/6/12");
1533 return 0;
1534 }
1535
1536 /* LAC-98's system bus width is 8-bit. */
1537 sc->proto_dlcr6 = FE_D6_BUFSIZ_32KB | FE_D6_TXBSIZ_2x2KB
1538 | FE_D6_BBW_BYTE | FE_D6_SBW_BYTE | FE_D6_SRAM_150ns;
1539
1540 /* Setup hooks. We need a special initialization procedure. */
1541 sc->init = fe_init_lnx;
1542
1543 /* The I/O address range is fragmented in the LAC-98.
1544 It occupies 16*4 I/O addresses, by the way. */
1545 return 16;
1546 #endif /* FE_8BIT_SUPPORT */
1547 }
1548
1549 /*
1550 * Probe for Gateway Communications' old cards.
1551 * (both as Generic MB86960 probe routine)
1552 */
1553 static int
1554 fe_probe_gwy ( struct isa_device * dev, struct fe_softc * sc )
1555 {
1556 static struct fe_simple_probe_struct probe_table [] = {
1557 /* { FE_DLCR2, 0x70, 0x00 }, */
1558 { FE_DLCR2, 0x58, 0x00 },
1559 { FE_DLCR4, 0x08, 0x00 },
1560 { 0 }
1561 };
1562
1563 /* I'm not sure which address is possible, so accepts any. FIXME. */
1564
1565 /* Setup an I/O address mapping table and some others. */
1566 fe_softc_defaults(sc);
1567
1568 /* Does we need to re-map ioaddr? FIXME. */
1569
1570 /* See if the card is on its address. */
1571 if ( !fe_simple_probe( sc, probe_table ) ) return 0;
1572
1573 /* Get our station address from EEPROM. */
1574 inblk( sc, 0x18, sc->sc_enaddr, ETHER_ADDR_LEN );
1575 if (!valid_Ether_p(sc->sc_enaddr, 0x000000)) return 0;
1576
1577 /* Determine the card type. */
1578 sc->typestr = "Generic MB86960 Ethernet";
1579 if (valid_Ether_p(sc->sc_enaddr, 0x000061))
1580 sc->typestr = "Gateway Ethernet (Fujitsu chipset)";
1581
1582 /* Gateway's board requires an explicit IRQ to work, since it
1583 is not possible to probe the setting of jumpers. */
1584 if (dev->id_irq == NO_IRQ) {
1585 fe_irq_failure(sc->typestr, sc->sc_unit, NO_IRQ, NULL);
1586 return 0;
1587 }
1588
1589 /* We should change return value when re-mapping ioaddr. FIXME. */
1590 return 32;
1591 }
1592
1593 /*
1594 * Probe for Ungermann-Bass Access/PC N98C+(Model 85152).
1595 */
1596 static int
1597 fe_probe_ubn (struct isa_device * dev, struct fe_softc * sc)
1598 {
1599 u_char sum, save7;
1600 int i;
1601 static struct fe_simple_probe_struct const probe_table [] = {
1602 { FE_DLCR2, 0x58, 0x00 },
1603 { FE_DLCR4, 0x08, 0x00 },
1604 { 0 }
1605 };
1606
1607 /* See if the specified I/O address is possible for Access/PC. */
1608 /* [01][048C]D0 are allowed. */
1609 if ((sc->iobase & ~0x1C00) != 0xD0) return 0;
1610
1611 /* Setup an I/O address mapping table and some others. */
1612 fe_softc_defaults(sc);
1613
1614 /* Re-map ioaddr for Access/PC N98C+.
1615 * 0x000, 0x001, 0x002, 0x003, 0x004, 0x005, 0x006, 0x007,
1616 * 0x008, 0x009, 0x00a, 0x00b, 0x00c, 0x00d, 0x00e, 0x00f,
1617 * 0x200, 0x201, 0x202, 0x203, 0x204, 0x205, 0x206, 0x207,
1618 * 0x208, 0x209, 0x20a, 0x20b, 0x20c, 0x20d, 0x20e, 0x20f,
1619 */
1620 for (i = 16; i < MAXREGISTERS; i++)
1621 sc->ioaddr[i] = sc->iobase + 0x200 - 16 + i;
1622
1623 /* Simple probe. */
1624 if (!fe_simple_probe(sc, probe_table)) return 0;
1625
1626 /* NOTE: Access/NOTE N98 sometimes freeze when reading station
1627 address. In case of using it togather with C-NET(9N)C,
1628 this problem usually happens.
1629 Writing DLCR7 prevents freezing, but I don't know why. FIXME. */
1630
1631 /* Save the current value for the DLCR7 register we are about
1632 to destroy. */
1633 save7 = inb(sc->ioaddr[FE_DLCR7]);
1634 outb(sc->ioaddr[FE_DLCR7],
1635 sc->proto_dlcr7 | FE_D7_RBS_BMPR | FE_D7_POWER_UP);
1636
1637 /* Get our station address form ID ROM and make sure it is UBN's. */
1638 inblk(sc, 0x18, sc->sc_enaddr, ETHER_ADDR_LEN);
1639 if (!valid_Ether_p(sc->sc_enaddr, 0x00DD01)) goto fail_ubn;
1640 #if 1
1641 /* Calculate checksum. */
1642 sum = inb(sc->ioaddr[0x1e]);
1643 for (i = 0; i < ETHER_ADDR_LEN; i++) {
1644 sum ^= sc->sc_enaddr[i];
1645 }
1646 if (sum != 0) goto fail_ubn;
1647 #endif
1648 /* Setup the board type. */
1649 sc->typestr = "Access/PC";
1650
1651 /* This looks like an AccessPC/N98C+ board. It requires an
1652 explicit IRQ setting in config. Make sure we have one,
1653 determining an appropriate value for the IRQ control
1654 register. */
1655 switch (dev->id_irq) {
1656 case IRQ3: sc->priv_info = 0x01; break;
1657 case IRQ5: sc->priv_info = 0x02; break;
1658 case IRQ6: sc->priv_info = 0x04; break;
1659 case IRQ12: sc->priv_info = 0x08; break;
1660 default:
1661 fe_irq_failure(sc->typestr,
1662 sc->sc_unit, dev->id_irq, "3/5/6/12");
1663 goto fail_ubn;
1664 }
1665
1666 /* Setup hooks. We need a special initialization procedure. */
1667 sc->init = fe_init_ubn;
1668
1669 /* The I/O address range is fragmented in the Access/PC N98C+.
1670 This is the number of regs at iobase. */
1671 return 16;
1672
1673 fail_ubn:
1674 outb(sc->ioaddr[FE_DLCR7], save7);
1675 return 0;
1676 }
1677
1678 /*
1679 * REX boards(non-JLI type) support routine.
1680 */
1681
1682 #define REX_EEPROM_SIZE 32
1683 #define REX_DAT 0x01
1684
1685 static void
1686 fe_read_eeprom_rex (struct fe_softc *sc, u_char *data)
1687 {
1688 int i;
1689 u_char bit, val;
1690 u_char save16;
1691 u_short reg16 = sc->ioaddr[0x10];
1692
1693 save16 = inb(reg16);
1694
1695 /* Issue a start condition. */
1696 val = inb(reg16) & 0xf0;
1697 outb(reg16, val);
1698
1699 (void)inb(reg16);
1700 (void)inb(reg16);
1701 (void)inb(reg16);
1702 (void)inb(reg16);
1703
1704 /* Read bytes from EEPROM. */
1705 for (i = 0; i < REX_EEPROM_SIZE; i++) {
1706 /* Read a byte and store it into the buffer. */
1707 val = 0x00;
1708 for (bit = 0x01; bit != 0x00; bit <<= 1) {
1709 if (inb(reg16) & REX_DAT) val |= bit;
1710 }
1711 *data++ = val;
1712 }
1713
1714 outb(reg16, save16);
1715
1716 #if 1
1717 /* Report what we got. */
1718 if (bootverbose) {
1719 data -= REX_EEPROM_SIZE;
1720 for (i = 0; i < REX_EEPROM_SIZE; i += 16) {
1721 printf("fe%d: EEPROM(REX):%3x: %16D\n",
1722 sc->sc_unit, i, data + i, " ");
1723 }
1724 }
1725 #endif
1726 }
1727
1728 static void
1729 fe_init_rex ( struct fe_softc * sc )
1730 {
1731 /* Setup IRQ control register on the ASIC. */
1732 outb(sc->ioaddr[0x10], sc->priv_info);
1733 }
1734
1735 /*
1736 * Probe for RATOC REX-9880/81/82/83 series.
1737 */
1738 static int
1739 fe_probe_rex (struct isa_device * dev, struct fe_softc * sc)
1740 {
1741 int i;
1742 u_char eeprom [REX_EEPROM_SIZE];
1743
1744 static struct fe_simple_probe_struct probe_table [] = {
1745 { FE_DLCR2, 0x58, 0x00 },
1746 { FE_DLCR4, 0x08, 0x00 },
1747 { 0 }
1748 };
1749
1750 /* See if the specified I/O address is possible for REX-9880. */
1751 /* 6[46CE]D0 are allowed. */
1752 if ((sc->iobase & ~0xA00) != 0x64D0) return 0;
1753
1754 /* Setup an I/O address mapping table and some others. */
1755 fe_softc_defaults(sc);
1756
1757 /* Re-map ioaddr for REX-9880. */
1758 for (i = 16; i < MAXREGISTERS; i++)
1759 sc->ioaddr[i] = sc->iobase + 0x100 - 16 + i;
1760
1761 /* See if the card is on its address. */
1762 if (!fe_simple_probe(sc, probe_table)) return 0;
1763
1764 /* We now have to read the config EEPROM. We should be very
1765 careful, since doing so destroys a register. (Remember, we
1766 are not yet sure we have a REX-9880 board here.) */
1767 fe_read_eeprom_rex(sc, eeprom);
1768 for (i = 0; i < ETHER_ADDR_LEN; i++)
1769 sc->sc_enaddr[i] = eeprom[7 - i];
1770
1771 /* Make sure it is RATOC's. */
1772 if (!valid_Ether_p(sc->sc_enaddr, 0x00C0D0)) return 0;
1773
1774 /* Setup the board type. */
1775 sc->typestr = "REX-9880/9883";
1776
1777 /* This looks like a REX-9880 board. It requires an
1778 explicit IRQ setting in config. Make sure we have one,
1779 determining an appropriate value for the IRQ control
1780 register. */
1781 switch (dev->id_irq) {
1782 case IRQ3: sc->priv_info = 0x10; break;
1783 case IRQ5: sc->priv_info = 0x20; break;
1784 case IRQ6: sc->priv_info = 0x40; break;
1785 case IRQ12: sc->priv_info = 0x80; break;
1786 default:
1787 fe_irq_failure(sc->typestr,
1788 sc->sc_unit, dev->id_irq, "3/5/6/12");
1789 return 0;
1790 }
1791
1792 /* Setup hooks. We need a special initialization procedure. */
1793 sc->init = fe_init_rex;
1794
1795 /* REX-9880 has 64KB SRAM. */
1796 sc->proto_dlcr6 = FE_D6_BUFSIZ_64KB | FE_D6_TXBSIZ_2x4KB
1797 | FE_D6_BBW_WORD | FE_D6_SBW_WORD | FE_D6_SRAM;
1798 #if 1
1799 sc->proto_dlcr7 |= FE_D7_EOPPOL; /* XXX */
1800 #endif
1801 /* The I/O address range is fragmented in the REX-9880.
1802 This is the number of regs at iobase. */
1803 return 16;
1804 }
1805 #else /* !PC98 */
1806 /*
1807 * Probe and initialization for Fujitsu FMV-180 series boards
1808 */
1809
1810 static void
1811 fe_init_fmv (struct fe_softc *sc)
1812 {
1813 /* Initialize ASIC. */
1814 outb( sc->ioaddr[ FE_FMV3 ], 0 );
1815 outb( sc->ioaddr[ FE_FMV10 ], 0 );
1816
1817 #if 0
1818 /* "Refresh" hardware configuration. FIXME. */
1819 outb( sc->ioaddr[ FE_FMV2 ], inb( sc->ioaddr[ FE_FMV2 ] ) );
1820 #endif
1821
1822 /* Turn the "master interrupt control" flag of ASIC on. */
1823 outb( sc->ioaddr[ FE_FMV3 ], FE_FMV3_IRQENB );
1824 }
1825
1826 static void
1827 fe_msel_fmv184 (struct fe_softc *sc)
1828 {
1829 u_char port;
1830
1831 /* FMV-184 has a special "register" to switch between AUI/BNC.
1832 Determine the value to write into the register, based on the
1833 user-specified media selection. */
1834 port = (IFM_SUBTYPE(sc->media.ifm_media) == IFM_10_2) ? 0x00 : 0x01;
1835
1836 /* The register is #5 on exntesion register bank...
1837 (Details of the register layout is not yet discovered.) */
1838 outb(sc->ioaddr[0x1B], 0x46); /* ??? */
1839 outb(sc->ioaddr[0x1E], 0x04); /* select ex-reg #4. */
1840 outb(sc->ioaddr[0x1F], 0xC8); /* ??? */
1841 outb(sc->ioaddr[0x1E], 0x05); /* select ex-reg #5. */
1842 outb(sc->ioaddr[0x1F], port); /* Switch the media. */
1843 outb(sc->ioaddr[0x1E], 0x04); /* select ex-reg #4. */
1844 outb(sc->ioaddr[0x1F], 0x00); /* ??? */
1845 outb(sc->ioaddr[0x1B], 0x00); /* ??? */
1846
1847 /* Make sure to select "external tranceiver" on MB86964. */
1848 outb(sc->ioaddr[FE_BMPR13], sc->proto_bmpr13 | FE_B13_PORT_AUI);
1849 }
1850
1851 static int
1852 fe_probe_fmv ( struct isa_device * dev, struct fe_softc * sc )
1853 {
1854 int n;
1855
1856 static u_short const irqmap [ 4 ] =
1857 { IRQ3, IRQ7, IRQ10, IRQ15 };
1858
1859 static struct fe_simple_probe_struct const probe_table [] = {
1860 { FE_DLCR2, 0x71, 0x00 },
1861 { FE_DLCR4, 0x08, 0x00 },
1862
1863 { FE_FMV0, 0x78, 0x50 }, /* ERRDY+PRRDY */
1864 { FE_FMV1, 0xB0, 0x00 }, /* FMV-183/4 has 0x48 bits. */
1865 { FE_FMV3, 0x7F, 0x00 },
1866
1867 { 0 }
1868 };
1869
1870 /* Board subtypes; it lists known FMV-180 variants. */
1871 struct subtype {
1872 u_short mcode;
1873 u_short mbitmap;
1874 u_short defmedia;
1875 char const * str;
1876 };
1877 static struct subtype const typelist [] = {
1878 { 0x0005, MB_HA|MB_HT|MB_H5, MB_HA, "FMV-181" },
1879 { 0x0105, MB_HA|MB_HT|MB_H5, MB_HA, "FMV-181A" },
1880 { 0x0003, MB_HM, MB_HM, "FMV-182" },
1881 { 0x0103, MB_HM, MB_HM, "FMV-182A" },
1882 { 0x0804, MB_HT, MB_HT, "FMV-183" },
1883 { 0x0C04, MB_HT, MB_HT, "FMV-183 (on-board)" },
1884 { 0x0803, MB_H2|MB_H5, MB_H2, "FMV-184" },
1885 { 0, MB_HA, MB_HA, "unknown FMV-180 (?)" },
1886 };
1887 struct subtype const * type;
1888
1889 /* Media indicator and "Hardware revision ID" */
1890 u_short mcode;
1891
1892 /* See if the specified address is possible for FMV-180
1893 series. 220, 240, 260, 280, 2A0, 2C0, 300, and 340 are
1894 allowed for all boards, and 200, 2E0, 320, 360, 380, 3A0,
1895 3C0, and 3E0 for PnP boards. */
1896 if ((sc->iobase & ~0x1E0) != 0x200) return 0;
1897
1898 /* Setup an I/O address mapping table and some others. */
1899 fe_softc_defaults(sc);
1900
1901 /* Simple probe. */
1902 if (!fe_simple_probe(sc, probe_table)) return 0;
1903
1904 /* Get our station address from EEPROM, and make sure it is
1905 Fujitsu's. */
1906 inblk(sc, FE_FMV4, sc->sc_enaddr, ETHER_ADDR_LEN);
1907 if (!valid_Ether_p(sc->sc_enaddr, 0x00000E)) return 0;
1908
1909 /* Find the supported media and "hardware revision" to know
1910 the model identification. */
1911 mcode = (inb(sc->ioaddr[FE_FMV0]) & FE_FMV0_MEDIA)
1912 | ((inb(sc->ioaddr[FE_FMV1]) & FE_FMV1_REV) << 8);
1913
1914 /* Determine the card type. */
1915 for (type = typelist; type->mcode != 0; type++) {
1916 if (type->mcode == mcode) break;
1917 }
1918 if (type->mcode == 0) {
1919 /* Unknown card type... Hope the driver works. */
1920 sc->stability |= UNSTABLE_TYPE;
1921 if (bootverbose) {
1922 printf("fe%d: unknown config: %x-%x-%x-%x\n",
1923 sc->sc_unit,
1924 inb(sc->ioaddr[FE_FMV0]),
1925 inb(sc->ioaddr[FE_FMV1]),
1926 inb(sc->ioaddr[FE_FMV2]),
1927 inb(sc->ioaddr[FE_FMV3]));
1928 }
1929 }
1930
1931 /* Setup the board type and media information. */
1932 sc->typestr = type->str;
1933 sc->mbitmap = type->mbitmap;
1934 sc->defmedia = type->defmedia;
1935 sc->msel = fe_msel_965;
1936
1937 if (type->mbitmap == (MB_H2 | MB_H5)) {
1938 /* FMV184 requires a special media selection procedure. */
1939 sc->msel = fe_msel_fmv184;
1940 }
1941
1942 /*
1943 * An FMV-180 has been probed.
1944 * Determine which IRQ to be used.
1945 *
1946 * In this version, we give a priority to the kernel config file.
1947 * If the EEPROM and config don't match, say it to the user for
1948 * an attention.
1949 */
1950 n = ( inb( sc->ioaddr[ FE_FMV2 ] ) & FE_FMV2_IRS )
1951 >> FE_FMV2_IRS_SHIFT;
1952 if ( dev->id_irq == NO_IRQ ) {
1953 /* Just use the probed value. */
1954 dev->id_irq = irqmap[ n ];
1955 } else if ( dev->id_irq != irqmap[ n ] ) {
1956 /* Don't match. */
1957 sc->stability |= UNSTABLE_IRQ;
1958 }
1959
1960 /* We need an init hook to initialize ASIC before we start. */
1961 sc->init = fe_init_fmv;
1962
1963 /*
1964 * That's all. FMV-180 occupies 32 I/O addresses, by the way.
1965 */
1966 return 32;
1967 }
1968
1969 /*
1970 * Fujitsu MB86965 JLI mode probe routines.
1971 *
1972 * 86965 has a special operating mode called JLI (mode 0), under which
1973 * the chip interfaces with ISA bus with a software-programmable
1974 * configuration. (The Fujitsu document calls the feature "Plug and
1975 * play," but it is not compatible with the ISA-PnP spec. designed by
1976 * Intel and Microsoft.) Ethernet cards designed to use JLI are
1977 * almost same, but there are two things which require board-specific
1978 * probe routines: EEPROM layout and IRQ pin connection.
1979 *
1980 * JLI provides a handy way to access EEPROM which should contains the
1981 * chip configuration information (such as I/O port address) as well
1982 * as Ethernet station (MAC) address. The chip configuration info. is
1983 * stored on a fixed location. However, the station address can be
1984 * located anywhere in the EEPROM; it is up to the board designer to
1985 * determine the location. (The manual just says "somewhere in the
1986 * EEPROM.") The fe driver must somehow find out the correct
1987 * location.
1988 *
1989 * Another problem resides in the IRQ pin connection. JLI provides a
1990 * user to choose an IRQ from up to four predefined IRQs. The 86965
1991 * chip has a register to select one out of the four possibilities.
1992 * However, the selection is against the four IRQ pins on the chip.
1993 * (So-called IRQ-A, -B, -C and -D.) It is (again) up to the board
1994 * designer to determine which pin to connect which IRQ line on the
1995 * ISA bus. We need a vendor (or model, for some vendor) specific IRQ
1996 * mapping table.
1997 *
1998 * The routine fe_probe_jli() provides all probe and initialization
1999 * processes which are common to all JLI implementation, and sub-probe
2000 * routines supply board-specific actions.
2001 *
2002 * JLI sub-probe routine has the following template:
2003 *
2004 * u_short const * func (struct fe_softc * sc, u_char const * eeprom);
2005 *
2006 * where eeprom is a pointer to an array of 32 byte data read from the
2007 * config EEPROM on the board. It retuns an IRQ mapping table for the
2008 * board, when the corresponding implementation is detected. It
2009 * returns a NULL otherwise.
2010 *
2011 * Primary purpose of the functin is to analize the config EEPROM,
2012 * determine if it matches with the pattern of that of supported card,
2013 * and extract necessary information from it. One of the information
2014 * expected to be extracted from EEPROM is the Ethernet station (MAC)
2015 * address, which must be set to the softc table of the interface by
2016 * the board-specific routine.
2017 */
2018
2019 /* JLI sub-probe for Allied-Telesyn/Allied-Telesis AT1700/RE2000 series. */
2020 static u_short const *
2021 fe_probe_jli_ati (struct fe_softc * sc, u_char const * eeprom)
2022 {
2023 int i;
2024 static u_short const irqmaps_ati [4][4] =
2025 {
2026 { IRQ3, IRQ4, IRQ5, IRQ9 },
2027 { IRQ10, IRQ11, IRQ12, IRQ15 },
2028 { IRQ3, IRQ11, IRQ5, IRQ15 },
2029 { IRQ10, IRQ11, IRQ14, IRQ15 },
2030 };
2031
2032 /* Make sure the EEPROM contains Allied-Telesis/Allied-Telesyn
2033 bit pattern. */
2034 if (eeprom[1] != 0x00) return NULL;
2035 for (i = 2; i < 8; i++) if (eeprom[i] != 0xFF) return NULL;
2036 for (i = 14; i < 24; i++) if (eeprom[i] != 0xFF) return NULL;
2037
2038 /* Get our station address from EEPROM, and make sure the
2039 EEPROM contains ATI's address. */
2040 bcopy(eeprom+8, sc->sc_enaddr, ETHER_ADDR_LEN);
2041 if (!valid_Ether_p(sc->sc_enaddr, 0x0000F4)) return NULL;
2042
2043 /*
2044 * The following model identification codes are stolen
2045 * from the NetBSD port of the fe driver. My reviewers
2046 * suggested minor revision.
2047 */
2048
2049 /* Determine the card type. */
2050 switch (eeprom[FE_ATI_EEP_MODEL]) {
2051 case FE_ATI_MODEL_AT1700T:
2052 sc->typestr = "AT-1700T/RE2001";
2053 sc->mbitmap = MB_HT;
2054 sc->defmedia = MB_HT;
2055 break;
2056 case FE_ATI_MODEL_AT1700BT:
2057 sc->typestr = "AT-1700BT/RE2003";
2058 sc->mbitmap = MB_HA | MB_HT | MB_H2;
2059 break;
2060 case FE_ATI_MODEL_AT1700FT:
2061 sc->typestr = "AT-1700FT/RE2009";
2062 sc->mbitmap = MB_HA | MB_HT | MB_HF;
2063 break;
2064 case FE_ATI_MODEL_AT1700AT:
2065 sc->typestr = "AT-1700AT/RE2005";
2066 sc->mbitmap = MB_HA | MB_HT | MB_H5;
2067 break;
2068 default:
2069 sc->typestr = "unknown AT-1700/RE2000";
2070 sc->stability |= UNSTABLE_TYPE | UNSTABLE_IRQ;
2071 break;
2072 }
2073
2074 #if 0
2075 /* Should we extract default media from eeprom? Linux driver
2076 for AT1700 does it, although previous releases of FreeBSD
2077 don't. FIXME. */
2078 /* Determine the default media selection from the config
2079 EEPROM. The byte at offset EEP_MEDIA is believed to
2080 contain BMPR13 value to be set. We just ignore STP bit or
2081 squelch bit, since we don't support those. (It is
2082 intentional.) */
2083 switch (eeprom[FE_ATI_EEP_MEDIA] & FE_B13_PORT) {
2084 case FE_B13_AUTO:
2085 sc->defmedia = MB_HA;
2086 break;
2087 case FE_B13_TP:
2088 sc->defmedia = MB_HT;
2089 break;
2090 case FE_B13_AUI:
2091 sc->defmedia = sc->mbitmap & (MB_H2|MB_H5|MB_H5); /*XXX*/
2092 break;
2093 default:
2094 sc->defmedia = MB_HA;
2095 break;
2096 }
2097
2098 /* Make sure the default media is compatible with the supported
2099 ones. */
2100 if ((sc->defmedia & sc->mbitmap) == 0) {
2101 if (sc->defmedia == MB_HA) {
2102 sc->defmedia = MB_HT;
2103 } else {
2104 sc->defmedia = MB_HA;
2105 }
2106 }
2107 #endif
2108
2109 /*
2110 * Try to determine IRQ settings.
2111 * Different models use different ranges of IRQs.
2112 */
2113 switch ((eeprom[FE_ATI_EEP_REVISION] & 0xf0)
2114 |(eeprom[FE_ATI_EEP_MAGIC] & 0x04)) {
2115 case 0x30: case 0x34: return irqmaps_ati[3];
2116 case 0x10: case 0x14:
2117 case 0x50: case 0x54: return irqmaps_ati[2];
2118 case 0x44: case 0x64: return irqmaps_ati[1];
2119 default: return irqmaps_ati[0];
2120 }
2121 }
2122
2123 /* JLI sub-probe and msel hook for ICL Ethernet. */
2124
2125 static void
2126 fe_msel_icl (struct fe_softc *sc)
2127 {
2128 u_char d4;
2129
2130 /* Switch between UTP and "external tranceiver" as always. */
2131 fe_msel_965(sc);
2132
2133 /* The board needs one more bit (on DLCR4) be set appropriately. */
2134 if (IFM_SUBTYPE(sc->media.ifm_media) == IFM_10_5) {
2135 d4 = sc->proto_dlcr4 | FE_D4_CNTRL;
2136 } else {
2137 d4 = sc->proto_dlcr4 & ~FE_D4_CNTRL;
2138 }
2139 outb(sc->ioaddr[FE_DLCR4], d4);
2140 }
2141
2142 static u_short const *
2143 fe_probe_jli_icl (struct fe_softc * sc, u_char const * eeprom)
2144 {
2145 int i;
2146 u_short defmedia;
2147 u_char d6;
2148 static u_short const irqmap_icl [4] = { IRQ9, IRQ10, IRQ5, IRQ15 };
2149
2150 /* Make sure the EEPROM contains ICL bit pattern. */
2151 for (i = 24; i < 39; i++) {
2152 if (eeprom[i] != 0x20 && (eeprom[i] & 0xF0) != 0x30) return NULL;
2153 }
2154 for (i = 112; i < 122; i++) {
2155 if (eeprom[i] != 0x20 && (eeprom[i] & 0xF0) != 0x30) return NULL;
2156 }
2157
2158 /* Make sure the EEPROM contains ICL's permanent station
2159 address. If it isn't, probably this board is not an
2160 ICL's. */
2161 if (!valid_Ether_p(eeprom+122, 0x00004B)) return NULL;
2162
2163 /* Check if the "configured" Ethernet address in the EEPROM is
2164 valid. Use it if it is, or use the "permanent" address instead. */
2165 if (valid_Ether_p(eeprom+4, 0x020000)) {
2166 /* The configured address is valid. Use it. */
2167 bcopy(eeprom+4, sc->sc_enaddr, ETHER_ADDR_LEN);
2168 } else {
2169 /* The configured address is invalid. Use permanent. */
2170 bcopy(eeprom+122, sc->sc_enaddr, ETHER_ADDR_LEN);
2171 }
2172
2173 /* Determine model and supported media. */
2174 switch (eeprom[0x5E]) {
2175 case 0:
2176 sc->typestr = "EtherTeam16i/COMBO";
2177 sc->mbitmap = MB_HA | MB_HT | MB_H5 | MB_H2;
2178 break;
2179 case 1:
2180 sc->typestr = "EtherTeam16i/TP";
2181 sc->mbitmap = MB_HT;
2182 break;
2183 case 2:
2184 sc->typestr = "EtherTeam16i/ErgoPro";
2185 sc->mbitmap = MB_HA | MB_HT | MB_H5;
2186 break;
2187 case 4:
2188 sc->typestr = "EtherTeam16i/DUO";
2189 sc->mbitmap = MB_HA | MB_HT | MB_H2;
2190 break;
2191 default:
2192 sc->typestr = "EtherTeam16i";
2193 sc->stability |= UNSTABLE_TYPE;
2194 if (bootverbose) {
2195 printf("fe%d: unknown model code %02x for EtherTeam16i\n",
2196 sc->sc_unit, eeprom[0x5E]);
2197 }
2198 break;
2199 }
2200
2201 /* I'm not sure the following msel hook is required by all
2202 models or COMBO only... FIXME. */
2203 sc->msel = fe_msel_icl;
2204
2205 /* Make the configured media selection the default media. */
2206 switch (eeprom[0x28]) {
2207 case 0: defmedia = MB_HA; break;
2208 case 1: defmedia = MB_H5; break;
2209 case 2: defmedia = MB_HT; break;
2210 case 3: defmedia = MB_H2; break;
2211 default:
2212 if (bootverbose) {
2213 printf("fe%d: unknown default media: %02x\n",
2214 sc->sc_unit, eeprom[0x28]);
2215 }
2216 defmedia = MB_HA;
2217 break;
2218 }
2219
2220 /* Make sure the default media is compatible with the
2221 supported media. */
2222 if ((defmedia & sc->mbitmap) == 0) {
2223 if (bootverbose) {
2224 printf("fe%d: default media adjusted\n", sc->sc_unit);
2225 }
2226 defmedia = sc->mbitmap;
2227 }
2228
2229 /* Keep the determined default media. */
2230 sc->defmedia = defmedia;
2231
2232 /* ICL has "fat" models. We have to program 86965 to properly
2233 reflect the hardware. */
2234 d6 = sc->proto_dlcr6 & ~(FE_D6_BUFSIZ | FE_D6_BBW);
2235 switch ((eeprom[0x61] << 8) | eeprom[0x60]) {
2236 case 0x2008: d6 |= FE_D6_BUFSIZ_32KB | FE_D6_BBW_BYTE; break;
2237 case 0x4010: d6 |= FE_D6_BUFSIZ_64KB | FE_D6_BBW_WORD; break;
2238 default:
2239 /* We can't support it, since we don't know which bits
2240 to set in DLCR6. */
2241 printf("fe%d: unknown SRAM config for ICL\n", sc->sc_unit);
2242 return NULL;
2243 }
2244 sc->proto_dlcr6 = d6;
2245
2246 /* Returns the IRQ table for the ICL board. */
2247 return irqmap_icl;
2248 }
2249
2250 /* JLI sub-probe for RATOC REX-5586/5587. */
2251 static u_short const *
2252 fe_probe_jli_rex (struct fe_softc * sc, u_char const * eeprom)
2253 {
2254 int i;
2255 static u_short const irqmap_rex [4] = { IRQ3, IRQ4, IRQ5, NO_IRQ };
2256
2257 /* Make sure the EEPROM contains RATOC's config pattern. */
2258 if (eeprom[1] != eeprom[0]) return NULL;
2259 for (i = 8; i < 32; i++) if (eeprom[i] != 0xFF) return NULL;
2260
2261 /* Get our station address from EEPROM. Note that RATOC
2262 stores it "byte-swapped" in each word. (I don't know why.)
2263 So, we just can't use bcopy().*/
2264 sc->sc_enaddr[0] = eeprom[3];
2265 sc->sc_enaddr[1] = eeprom[2];
2266 sc->sc_enaddr[2] = eeprom[5];
2267 sc->sc_enaddr[3] = eeprom[4];
2268 sc->sc_enaddr[4] = eeprom[7];
2269 sc->sc_enaddr[5] = eeprom[6];
2270
2271 /* Make sure the EEPROM contains RATOC's station address. */
2272 if (!valid_Ether_p(sc->sc_enaddr, 0x00C0D0)) return NULL;
2273
2274 /* I don't know any sub-model identification. */
2275 sc->typestr = "REX-5586/5587";
2276
2277 /* Returns the IRQ for the RATOC board. */
2278 return irqmap_rex;
2279 }
2280
2281 /* JLI sub-probe for Unknown board. */
2282 static u_short const *
2283 fe_probe_jli_unk (struct fe_softc * sc, u_char const * eeprom)
2284 {
2285 int i, n, romsize;
2286 static u_short const irqmap [4] = { NO_IRQ, NO_IRQ, NO_IRQ, NO_IRQ };
2287
2288 /* The generic JLI probe considered this board has an 86965
2289 in JLI mode, but any other board-specific routines could
2290 not find the matching implementation. So, we "guess" the
2291 location by looking for a bit pattern which looks like a
2292 MAC address. */
2293
2294 /* Determine how large the EEPROM is. */
2295 for (romsize = JLI_EEPROM_SIZE/2; romsize > 16; romsize >>= 1) {
2296 for (i = 0; i < romsize; i++) {
2297 if (eeprom[i] != eeprom[i+romsize]) break;
2298 }
2299 if (i < romsize) break;
2300 }
2301 romsize <<= 1;
2302
2303 /* Look for a bit pattern which looks like a MAC address. */
2304 for (n = 2; n <= romsize - ETHER_ADDR_LEN; n += 2) {
2305 if (!valid_Ether_p(eeprom + n, 0x000000)) continue;
2306 }
2307
2308 /* If no reasonable address was found, we can't go further. */
2309 if (n > romsize - ETHER_ADDR_LEN) return NULL;
2310
2311 /* Extract our (guessed) station address. */
2312 bcopy(eeprom+n, sc->sc_enaddr, ETHER_ADDR_LEN);
2313
2314 /* We are not sure what type of board it is... */
2315 sc->typestr = "(unknown JLI)";
2316 sc->stability |= UNSTABLE_TYPE | UNSTABLE_MAC;
2317
2318 /* Returns the totally unknown IRQ mapping table. */
2319 return irqmap;
2320 }
2321
2322 /*
2323 * Probe and initialization for all JLI implementations.
2324 */
2325
2326 static int
2327 fe_probe_jli (struct isa_device * dev, struct fe_softc * sc)
2328 {
2329 int i, n;
2330 int irq;
2331 u_char eeprom [JLI_EEPROM_SIZE];
2332 u_short const * irqmap;
2333
2334 static u_short const baseaddr [8] =
2335 { 0x260, 0x280, 0x2A0, 0x240, 0x340, 0x320, 0x380, 0x300 };
2336 static struct fe_simple_probe_struct const probe_table [] = {
2337 { FE_DLCR1, 0x20, 0x00 },
2338 { FE_DLCR2, 0x50, 0x00 },
2339 { FE_DLCR4, 0x08, 0x00 },
2340 { FE_DLCR5, 0x80, 0x00 },
2341 #if 0
2342 { FE_BMPR16, 0x1B, 0x00 },
2343 { FE_BMPR17, 0x7F, 0x00 },
2344 #endif
2345 { 0 }
2346 };
2347
2348 /*
2349 * See if the specified address is possible for MB86965A JLI mode.
2350 */
2351 for (i = 0; i < 8; i++) {
2352 if (baseaddr[i] == sc->iobase) break;
2353 }
2354 if (i == 8) return 0;
2355
2356 /* Fill the softc struct with reasonable default. */
2357 fe_softc_defaults(sc);
2358
2359 /*
2360 * We should test if MB86965A is on the base address now.
2361 * Unfortunately, it is very hard to probe it reliably, since
2362 * we have no way to reset the chip under software control.
2363 * On cold boot, we could check the "signature" bit patterns
2364 * described in the Fujitsu document. On warm boot, however,
2365 * we can predict almost nothing about register values.
2366 */
2367 if (!fe_simple_probe(sc, probe_table)) return 0;
2368
2369 /* Check if our I/O address matches config info on 86965. */
2370 n = (inb(sc->ioaddr[FE_BMPR19]) & FE_B19_ADDR) >> FE_B19_ADDR_SHIFT;
2371 if (baseaddr[n] != sc->iobase) return 0;
2372
2373 /*
2374 * We are now almost sure we have an MB86965 at the given
2375 * address. So, read EEPROM through it. We have to write
2376 * into LSI registers to read from EEPROM. I want to avoid it
2377 * at this stage, but I cannot test the presence of the chip
2378 * any further without reading EEPROM. FIXME.
2379 */
2380 fe_read_eeprom_jli(sc, eeprom);
2381
2382 /* Make sure that config info in EEPROM and 86965 agree. */
2383 if (eeprom[FE_EEPROM_CONF] != inb(sc->ioaddr[FE_BMPR19])) {
2384 return 0;
2385 }
2386
2387 /* Use 86965 media selection scheme, unless othewise
2388 specified. It is "AUTO always" and "select with BMPR13."
2389 This behaviour covers most of the 86965 based board (as
2390 minimum requirements.) It is backward compatible with
2391 previous versions, also. */
2392 sc->mbitmap = MB_HA;
2393 sc->defmedia = MB_HA;
2394 sc->msel = fe_msel_965;
2395
2396 /* Perform board-specific probe, one by one. Note that the
2397 order of probe is important and should not be changed
2398 arbitrarily. */
2399 if ((irqmap = fe_probe_jli_ati(sc, eeprom)) == NULL
2400 && (irqmap = fe_probe_jli_rex(sc, eeprom)) == NULL
2401 && (irqmap = fe_probe_jli_icl(sc, eeprom)) == NULL
2402 && (irqmap = fe_probe_jli_unk(sc, eeprom)) == NULL) return 0;
2403
2404 /* Find the IRQ read from EEPROM. */
2405 n = (inb(sc->ioaddr[FE_BMPR19]) & FE_B19_IRQ) >> FE_B19_IRQ_SHIFT;
2406 irq = irqmap[n];
2407
2408 /* Try to determine IRQ setting. */
2409 if (dev->id_irq == NO_IRQ && irq == NO_IRQ) {
2410 /* The device must be configured with an explicit IRQ. */
2411 printf("fe%d: IRQ auto-detection does not work\n",
2412 sc->sc_unit);
2413 return 0;
2414 } else if (dev->id_irq == NO_IRQ && irq != NO_IRQ) {
2415 /* Just use the probed IRQ value. */
2416 dev->id_irq = irq;
2417 } else if (dev->id_irq != NO_IRQ && irq == NO_IRQ) {
2418 /* No problem. Go ahead. */
2419 } else if (dev->id_irq == irq) {
2420 /* Good. Go ahead. */
2421 } else {
2422 /* User must be warned in this case. */
2423 sc->stability |= UNSTABLE_IRQ;
2424 }
2425
2426 /* Setup a hook, which resets te 86965 when the driver is being
2427 initialized. This may solve a nasty bug. FIXME. */
2428 sc->init = fe_init_jli;
2429
2430 /*
2431 * That's all. 86965 JLI occupies 32 I/O addresses, by the way.
2432 */
2433 return 32;
2434 }
2435
2436 /* Probe for TDK LAK-AX031, which is an SSi 78Q8377A based board. */
2437
2438 static int
2439 fe_probe_ssi (struct isa_device *dev, struct fe_softc *sc)
2440 {
2441 u_char eeprom [SSI_EEPROM_SIZE];
2442
2443 static struct fe_simple_probe_struct probe_table [] = {
2444 { FE_DLCR2, 0x08, 0x00 },
2445 { FE_DLCR4, 0x08, 0x00 },
2446 { 0 }
2447 };
2448
2449 /* See if the specified I/O address is possible for 78Q8377A. */
2450 if ((sc->iobase & ~0x3F0) != 0x000) return 0;
2451
2452 /* Fill the softc struct with default values. */
2453 fe_softc_defaults(sc);
2454
2455 /* See if the card is on its address. */
2456 if (!fe_simple_probe(sc, probe_table)) return 0;
2457
2458 /* We now have to read the config EEPROM. We should be very
2459 careful, since doing so destroys a register. (Remember, we
2460 are not yet sure we have a LAK-AX031 board here.) Don't
2461 remember to select BMPRs bofore reading EEPROM, since other
2462 register bank may be selected before the probe() is called. */
2463 fe_read_eeprom_ssi(sc, eeprom);
2464
2465 /* Make sure the Ethernet (MAC) station address is of TDK's. */
2466 if (!valid_Ether_p(eeprom+FE_SSI_EEP_ADDR, 0x008098)) return 0;
2467 bcopy(eeprom+FE_SSI_EEP_ADDR, sc->sc_enaddr, ETHER_ADDR_LEN);
2468
2469 /* This looks like a TDK-AX031 board. It requires an explicit
2470 IRQ setting in config, since we currently don't know how we
2471 can find the IRQ value assigned by ISA PnP manager. */
2472 if (dev->id_irq == NO_IRQ) {
2473 fe_irq_failure("LAK-AX031", sc->sc_unit, dev->id_irq, NULL);
2474 return 0;
2475 }
2476
2477 /* Fill softc struct accordingly. */
2478 sc->typestr = "LAK-AX031";
2479 sc->mbitmap = MB_HT;
2480 sc->defmedia = MB_HT;
2481
2482 /* We have 16 registers. */
2483 return 16;
2484 }
2485
2486 /*
2487 * Probe and initialization for TDK/LANX LAC-AX012/013 boards.
2488 */
2489 static int
2490 fe_probe_lnx (struct isa_device *dev, struct fe_softc *sc)
2491 {
2492 u_char eeprom [LNX_EEPROM_SIZE];
2493
2494 static struct fe_simple_probe_struct probe_table [] = {
2495 { FE_DLCR2, 0x58, 0x00 },
2496 { FE_DLCR4, 0x08, 0x00 },
2497 { 0 }
2498 };
2499
2500 /* See if the specified I/O address is possible for TDK/LANX boards. */
2501 /* 300, 320, 340, and 360 are allowed. */
2502 if ((sc->iobase & ~0x060) != 0x300) return 0;
2503
2504 /* Fill the softc struct with default values. */
2505 fe_softc_defaults(sc);
2506
2507 /* See if the card is on its address. */
2508 if (!fe_simple_probe(sc, probe_table)) return 0;
2509
2510 /* We now have to read the config EEPROM. We should be very
2511 careful, since doing so destroys a register. (Remember, we
2512 are not yet sure we have a LAC-AX012/AX013 board here.) */
2513 fe_read_eeprom_lnx(sc, eeprom);
2514
2515 /* Make sure the Ethernet (MAC) station address is of TDK/LANX's. */
2516 if (!valid_Ether_p(eeprom, 0x008098)) return 0;
2517 bcopy(eeprom, sc->sc_enaddr, ETHER_ADDR_LEN);
2518
2519 /* This looks like a TDK/LANX board. It requires an
2520 explicit IRQ setting in config. Make sure we have one,
2521 determining an appropriate value for the IRQ control
2522 register. */
2523 switch (dev->id_irq) {
2524 case IRQ3: sc->priv_info = 0x40 | LNX_CLK_LO | LNX_SDA_HI; break;
2525 case IRQ4: sc->priv_info = 0x20 | LNX_CLK_LO | LNX_SDA_HI; break;
2526 case IRQ5: sc->priv_info = 0x10 | LNX_CLK_LO | LNX_SDA_HI; break;
2527 case IRQ9: sc->priv_info = 0x80 | LNX_CLK_LO | LNX_SDA_HI; break;
2528 default:
2529 fe_irq_failure("LAC-AX012/AX013",
2530 sc->sc_unit, dev->id_irq, "3/4/5/9");
2531 return 0;
2532 }
2533
2534 /* Fill softc struct accordingly. */
2535 sc->typestr = "LAC-AX012/AX013";
2536 sc->init = fe_init_lnx;
2537
2538 /* We have 32 registers. */
2539 return 32;
2540 }
2541
2542 /*
2543 * Probe and initialization for Gateway Communications' old cards.
2544 */
2545 static int
2546 fe_probe_gwy ( struct isa_device * dev, struct fe_softc * sc )
2547 {
2548 static struct fe_simple_probe_struct probe_table [] = {
2549 /* { FE_DLCR2, 0x70, 0x00 }, */
2550 { FE_DLCR2, 0x58, 0x00 },
2551 { FE_DLCR4, 0x08, 0x00 },
2552 { 0 }
2553 };
2554
2555 /* See if the specified I/O address is possible for Gateway boards. */
2556 if ((sc->iobase & ~0x1E0) != 0x200) return 0;
2557
2558 /* Setup an I/O address mapping table and some others. */
2559 fe_softc_defaults(sc);
2560
2561 /* See if the card is on its address. */
2562 if ( !fe_simple_probe( sc, probe_table ) ) return 0;
2563
2564 /* Get our station address from EEPROM. */
2565 inblk( sc, 0x18, sc->sc_enaddr, ETHER_ADDR_LEN );
2566
2567 /* Make sure it is Gateway Communication's. */
2568 if (!valid_Ether_p(sc->sc_enaddr, 0x000061)) return 0;
2569
2570 /* Gateway's board requires an explicit IRQ to work, since it
2571 is not possible to probe the setting of jumpers. */
2572 if (dev->id_irq == NO_IRQ) {
2573 fe_irq_failure("Gateway Ethernet", sc->sc_unit, NO_IRQ, NULL);
2574 return 0;
2575 }
2576
2577 /* Fill softc struct accordingly. */
2578 sc->typestr = "Gateway Ethernet (Fujitsu chipset)";
2579
2580 /* That's all. The card occupies 32 I/O addresses, as always. */
2581 return 32;
2582 }
2583
2584 /* Probe and initialization for Ungermann-Bass Network
2585 K.K. "Access/PC" boards. */
2586 static int
2587 fe_probe_ubn (struct isa_device * dev, struct fe_softc * sc)
2588 {
2589 #if 0
2590 u_char sum;
2591 #endif
2592 static struct fe_simple_probe_struct const probe_table [] = {
2593 { FE_DLCR2, 0x58, 0x00 },
2594 { FE_DLCR4, 0x08, 0x00 },
2595 { 0 }
2596 };
2597
2598 /* See if the specified I/O address is possible for AccessPC/ISA. */
2599 if ((sc->iobase & ~0x0E0) != 0x300) return 0;
2600
2601 /* Setup an I/O address mapping table and some others. */
2602 fe_softc_defaults(sc);
2603
2604 /* Simple probe. */
2605 if (!fe_simple_probe(sc, probe_table)) return 0;
2606
2607 /* Get our station address form ID ROM and make sure it is UBN's. */
2608 inblk(sc, 0x18, sc->sc_enaddr, ETHER_ADDR_LEN);
2609 if (!valid_Ether_p(sc->sc_enaddr, 0x00DD01)) return 0;
2610 #if 0
2611 /* Calculate checksum. */
2612 sum = inb(sc->ioaddr[0x1e]);
2613 for (i = 0; i < ETHER_ADDR_LEN; i++) {
2614 sum ^= sc->sc_enaddr[i];
2615 }
2616 if (sum != 0) return 0;
2617 #endif
2618 /* This looks like an AccessPC/ISA board. It requires an
2619 explicit IRQ setting in config. Make sure we have one,
2620 determining an appropriate value for the IRQ control
2621 register. */
2622 switch (dev->id_irq) {
2623 case IRQ3: sc->priv_info = 0x02; break;
2624 case IRQ4: sc->priv_info = 0x04; break;
2625 case IRQ5: sc->priv_info = 0x08; break;
2626 case IRQ10: sc->priv_info = 0x10; break;
2627 default:
2628 fe_irq_failure("Access/PC",
2629 sc->sc_unit, dev->id_irq, "3/4/5/10");
2630 return 0;
2631 }
2632
2633 /* Fill softc struct accordingly. */
2634 sc->typestr = "Access/PC";
2635 sc->init = fe_init_ubn;
2636
2637 /* We have 32 registers. */
2638 return 32;
2639 }
2640 #endif /* PC98 */
2641
2642 #if NCARD > 0
2643 /*
2644 * Probe and initialization for Fujitsu MBH10302 PCMCIA Ethernet interface.
2645 * Note that this is for 10302 only; MBH10304 is handled by fe_probe_tdk().
2646 */
2647
2648 static void
2649 fe_init_mbh ( struct fe_softc * sc )
2650 {
2651 /* Minimal initialization of 86960. */
2652 DELAY( 200 );
2653 outb( sc->ioaddr[ FE_DLCR6 ], sc->proto_dlcr6 | FE_D6_DLC_DISABLE );
2654 DELAY( 200 );
2655
2656 /* Disable all interrupts. */
2657 outb( sc->ioaddr[ FE_DLCR2 ], 0 );
2658 outb( sc->ioaddr[ FE_DLCR3 ], 0 );
2659
2660 /* Enable master interrupt flag. */
2661 outb( sc->ioaddr[ FE_MBH0 ], FE_MBH0_MAGIC | FE_MBH0_INTR_ENABLE );
2662 }
2663
2664 static int
2665 fe_probe_mbh ( struct isa_device * dev, struct fe_softc * sc )
2666 {
2667 static struct fe_simple_probe_struct probe_table [] = {
2668 { FE_DLCR2, 0x58, 0x00 },
2669 { FE_DLCR4, 0x08, 0x00 },
2670 { FE_DLCR6, 0xFF, 0xB6 },
2671 { 0 }
2672 };
2673
2674 #ifdef DIAGNOSTIC
2675 /* We need an explicit IRQ. */
2676 if (dev->id_irq == NO_IRQ) return 0;
2677 #endif
2678
2679 /* Ethernet MAC address should *NOT* have been given by pccardd,
2680 if this is a true MBH10302; i.e., Ethernet address must be
2681 "all-zero" upon entry. */
2682 if (sc->sc_enaddr[0] || sc->sc_enaddr[1] || sc->sc_enaddr[2] ||
2683 sc->sc_enaddr[3] || sc->sc_enaddr[4] || sc->sc_enaddr[5]) {
2684 return 0;
2685 }
2686
2687 /* Fill the softc struct with default values. */
2688 fe_softc_defaults(sc);
2689
2690 /*
2691 * See if MBH10302 is on its address.
2692 * I'm not sure the following probe code works. FIXME.
2693 */
2694 if ( !fe_simple_probe( sc, probe_table ) ) return 0;
2695
2696 /* Get our station address from EEPROM. */
2697 inblk( sc, FE_MBH10, sc->sc_enaddr, ETHER_ADDR_LEN );
2698
2699 /* Make sure we got a valid station address. */
2700 if (!valid_Ether_p(sc->sc_enaddr, 0)) return 0;
2701
2702 /* Determine the card type. */
2703 sc->typestr = "MBH10302 (PCMCIA)";
2704
2705 /* We seems to need our own IDENT bits... FIXME. */
2706 sc->proto_dlcr7 = FE_D7_BYTSWP_LH | FE_D7_IDENT_NICE;
2707
2708 /* Setup hooks. We need a special initialization procedure. */
2709 sc->init = fe_init_mbh;
2710
2711 /*
2712 * That's all. MBH10302 occupies 32 I/O addresses, by the way.
2713 */
2714 return 32;
2715 }
2716
2717 /*
2718 * Probe and initialization for TDK/CONTEC PCMCIA Ethernet interface.
2719 * by MASUI Kenji <masui@cs.titech.ac.jp>
2720 *
2721 * (Contec uses TDK Ethenet chip -- hosokawa)
2722 *
2723 * This version of fe_probe_tdk has been rewrote to handle
2724 * *generic* PC card implementation of Fujitsu MB8696x family. The
2725 * name _tdk is just for a historical reason. :-)
2726 */
2727 static int
2728 fe_probe_tdk ( struct isa_device * dev, struct fe_softc * sc )
2729 {
2730 static struct fe_simple_probe_struct probe_table [] = {
2731 { FE_DLCR2, 0x50, 0x00 },
2732 { FE_DLCR4, 0x08, 0x00 },
2733 /* { FE_DLCR5, 0x80, 0x00 }, Does not work well. */
2734 { 0 }
2735 };
2736
2737 if ( dev->id_irq == NO_IRQ ) {
2738 return ( 0 );
2739 }
2740
2741 fe_softc_defaults(sc);
2742
2743 /*
2744 * See if C-NET(PC)C is on its address.
2745 */
2746
2747 if ( !fe_simple_probe( sc, probe_table ) ) return 0;
2748
2749 /* Determine the card type. */
2750 sc->typestr = "Generic MB8696x/78Q837x Ethernet (PCMCIA)";
2751
2752 /*
2753 * Initialize constants in the per-line structure.
2754 */
2755
2756 /* Make sure we got a valid station address. */
2757 if (!valid_Ether_p(sc->sc_enaddr, 0)) return 0;
2758
2759 /*
2760 * That's all. C-NET(PC)C occupies 16 I/O addresses.
2761 * XXX: Are there any card with 32 I/O addresses? FIXME.
2762 */
2763 return 16;
2764 }
2765 #endif /* NCARD > 0 */
2766
2767 /*
2768 * Install interface into kernel networking data structures
2769 */
2770 static int
2771 fe_attach ( struct isa_device * dev )
2772 {
2773 #if NCARD > 0
2774 static int already_ifattach[NFE];
2775 #endif
2776 struct fe_softc *sc = &fe_softc[dev->id_unit];
2777 int b;
2778
2779 dev->id_ointr = feintr;
2780
2781 /*
2782 * Initialize ifnet structure
2783 */
2784 sc->sc_if.if_softc = sc;
2785 sc->sc_if.if_unit = sc->sc_unit;
2786 sc->sc_if.if_name = "fe";
2787 sc->sc_if.if_output = ether_output;
2788 sc->sc_if.if_start = fe_start;
2789 sc->sc_if.if_ioctl = fe_ioctl;
2790 sc->sc_if.if_watchdog = fe_watchdog;
2791 sc->sc_if.if_init = fe_init;
2792 sc->sc_if.if_linkmib = &sc->mibdata;
2793 sc->sc_if.if_linkmiblen = sizeof (sc->mibdata);
2794
2795 #if 0 /* I'm not sure... */
2796 sc->mibdata.dot3Compliance = DOT3COMPLIANCE_COLLS;
2797 #endif
2798
2799 /*
2800 * Set fixed interface flags.
2801 */
2802 sc->sc_if.if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
2803
2804 #if 1
2805 /*
2806 * Set maximum size of output queue, if it has not been set.
2807 * It is done here as this driver may be started after the
2808 * system initialization (i.e., the interface is PCMCIA.)
2809 *
2810 * I'm not sure this is really necessary, but, even if it is,
2811 * it should be done somewhere else, e.g., in if_attach(),
2812 * since it must be a common workaround for all network drivers.
2813 * FIXME.
2814 */
2815 if ( sc->sc_if.if_snd.ifq_maxlen == 0 ) {
2816 sc->sc_if.if_snd.ifq_maxlen = ifqmaxlen;
2817 }
2818 #endif
2819
2820 #if FE_SINGLE_TRANSMISSION
2821 /* Override txb config to allocate minimum. */
2822 sc->proto_dlcr6 &= ~FE_D6_TXBSIZ
2823 sc->proto_dlcr6 |= FE_D6_TXBSIZ_2x2KB;
2824 #endif
2825
2826 /* Modify hardware config if it is requested. */
2827 if ( dev->id_flags & FE_FLAGS_OVERRIDE_DLCR6 ) {
2828 sc->proto_dlcr6 = dev->id_flags & FE_FLAGS_DLCR6_VALUE;
2829 }
2830
2831 /* Find TX buffer size, based on the hardware dependent proto. */
2832 switch ( sc->proto_dlcr6 & FE_D6_TXBSIZ ) {
2833 case FE_D6_TXBSIZ_2x2KB: sc->txb_size = 2048; break;
2834 case FE_D6_TXBSIZ_2x4KB: sc->txb_size = 4096; break;
2835 case FE_D6_TXBSIZ_2x8KB: sc->txb_size = 8192; break;
2836 default:
2837 /* Oops, we can't work with single buffer configuration. */
2838 if (bootverbose) {
2839 printf("fe%d: strange TXBSIZ config; fixing\n",
2840 sc->sc_unit);
2841 }
2842 sc->proto_dlcr6 &= ~FE_D6_TXBSIZ;
2843 sc->proto_dlcr6 |= FE_D6_TXBSIZ_2x2KB;
2844 sc->txb_size = 2048;
2845 break;
2846 }
2847
2848 /* Initialize the if_media interface. */
2849 ifmedia_init(&sc->media, 0, fe_medchange, fe_medstat );
2850 for (b = 0; bit2media[b] != 0; b++) {
2851 if (sc->mbitmap & (1 << b)) {
2852 ifmedia_add(&sc->media, bit2media[b], 0, NULL);
2853 }
2854 }
2855 for (b = 0; bit2media[b] != 0; b++) {
2856 if (sc->defmedia & (1 << b)) {
2857 ifmedia_set(&sc->media, bit2media[b]);
2858 break;
2859 }
2860 }
2861 #if 0 /* Turned off; this is called later, when the interface UPs. */
2862 fe_medchange(sc);
2863 #endif
2864
2865 /* Attach and stop the interface. */
2866 #if NCARD > 0
2867 if (already_ifattach[dev->id_unit] != 1) {
2868 if_attach(&sc->sc_if);
2869 already_ifattach[dev->id_unit] = 1;
2870 }
2871 #else
2872 if_attach(&sc->sc_if);
2873 #endif
2874 fe_stop(sc);
2875 ether_ifattach(&sc->sc_if);
2876
2877 /* Print additional info when attached. */
2878 printf("fe%d: address %6D, type %s%s\n", sc->sc_unit,
2879 sc->sc_enaddr, ":" , sc->typestr,
2880 (sc->proto_dlcr4 & FE_D4_DSC) ? ", full duplex" : "");
2881 if (bootverbose) {
2882 int buf, txb, bbw, sbw, ram;
2883
2884 buf = txb = bbw = sbw = ram = -1;
2885 switch ( sc->proto_dlcr6 & FE_D6_BUFSIZ ) {
2886 case FE_D6_BUFSIZ_8KB: buf = 8; break;
2887 case FE_D6_BUFSIZ_16KB: buf = 16; break;
2888 case FE_D6_BUFSIZ_32KB: buf = 32; break;
2889 case FE_D6_BUFSIZ_64KB: buf = 64; break;
2890 }
2891 switch ( sc->proto_dlcr6 & FE_D6_TXBSIZ ) {
2892 case FE_D6_TXBSIZ_2x2KB: txb = 2; break;
2893 case FE_D6_TXBSIZ_2x4KB: txb = 4; break;
2894 case FE_D6_TXBSIZ_2x8KB: txb = 8; break;
2895 }
2896 switch ( sc->proto_dlcr6 & FE_D6_BBW ) {
2897 case FE_D6_BBW_BYTE: bbw = 8; break;
2898 case FE_D6_BBW_WORD: bbw = 16; break;
2899 }
2900 switch ( sc->proto_dlcr6 & FE_D6_SBW ) {
2901 case FE_D6_SBW_BYTE: sbw = 8; break;
2902 case FE_D6_SBW_WORD: sbw = 16; break;
2903 }
2904 switch ( sc->proto_dlcr6 & FE_D6_SRAM ) {
2905 case FE_D6_SRAM_100ns: ram = 100; break;
2906 case FE_D6_SRAM_150ns: ram = 150; break;
2907 }
2908 printf("fe%d: SRAM %dKB %dbit %dns, TXB %dKBx2, %dbit I/O\n",
2909 sc->sc_unit, buf, bbw, ram, txb, sbw);
2910 }
2911 if (sc->stability & UNSTABLE_IRQ) {
2912 printf("fe%d: warning: IRQ number may be incorrect\n",
2913 sc->sc_unit);
2914 }
2915 if (sc->stability & UNSTABLE_MAC) {
2916 printf("fe%d: warning: above MAC address may be incorrect\n",
2917 sc->sc_unit);
2918 }
2919 if (sc->stability & UNSTABLE_TYPE) {
2920 printf("fe%d: warning: hardware type was not validated\n",
2921 sc->sc_unit);
2922 }
2923
2924 #if NBPFILTER > 0
2925 /* If BPF is in the kernel, call the attach for it. */
2926 bpfattach(&sc->sc_if, DLT_EN10MB, sizeof(struct ether_header));
2927 #endif
2928 return 1;
2929 }
2930
2931 /*
2932 * Reset interface, after some (hardware) trouble is deteced.
2933 */
2934 static void
2935 fe_reset (struct fe_softc *sc)
2936 {
2937 /* Record how many packets are lost by this accident. */
2938 sc->sc_if.if_oerrors += sc->txb_sched + sc->txb_count;
2939 sc->mibdata.dot3StatsInternalMacTransmitErrors++;
2940
2941 /* Put the interface into known initial state. */
2942 fe_stop(sc);
2943 if (sc->sc_if.if_flags & IFF_UP) fe_init(sc);
2944 }
2945
2946 /*
2947 * Stop everything on the interface.
2948 *
2949 * All buffered packets, both transmitting and receiving,
2950 * if any, will be lost by stopping the interface.
2951 */
2952 static void
2953 fe_stop (struct fe_softc *sc)
2954 {
2955 int s;
2956
2957 s = splimp();
2958
2959 /* Disable interrupts. */
2960 outb( sc->ioaddr[ FE_DLCR2 ], 0x00 );
2961 outb( sc->ioaddr[ FE_DLCR3 ], 0x00 );
2962
2963 /* Stop interface hardware. */
2964 DELAY( 200 );
2965 outb( sc->ioaddr[ FE_DLCR6 ], sc->proto_dlcr6 | FE_D6_DLC_DISABLE );
2966 DELAY( 200 );
2967
2968 /* Clear all interrupt status. */
2969 outb( sc->ioaddr[ FE_DLCR0 ], 0xFF );
2970 outb( sc->ioaddr[ FE_DLCR1 ], 0xFF );
2971
2972 /* Put the chip in stand-by mode. */
2973 DELAY( 200 );
2974 outb( sc->ioaddr[ FE_DLCR7 ], sc->proto_dlcr7 | FE_D7_POWER_DOWN );
2975 DELAY( 200 );
2976
2977 /* Reset transmitter variables and interface flags. */
2978 sc->sc_if.if_flags &= ~( IFF_OACTIVE | IFF_RUNNING );
2979 sc->sc_if.if_timer = 0;
2980 sc->txb_free = sc->txb_size;
2981 sc->txb_count = 0;
2982 sc->txb_sched = 0;
2983
2984 /* MAR loading can be delayed. */
2985 sc->filter_change = 0;
2986
2987 /* Call a device-specific hook. */
2988 if ( sc->stop ) sc->stop( sc );
2989
2990 (void) splx(s);
2991 }
2992
2993 /*
2994 * Device timeout/watchdog routine. Entered if the device neglects to
2995 * generate an interrupt after a transmit has been started on it.
2996 */
2997 static void
2998 fe_watchdog ( struct ifnet *ifp )
2999 {
3000 struct fe_softc *sc = (struct fe_softc *)ifp;
3001
3002 /* A "debug" message. */
3003 printf("fe%d: transmission timeout (%d+%d)%s\n",
3004 ifp->if_unit, sc->txb_sched, sc->txb_count,
3005 (ifp->if_flags & IFF_UP) ? "" : " when down");
3006 if ( sc->sc_if.if_opackets == 0 && sc->sc_if.if_ipackets == 0 ) {
3007 printf("fe%d: wrong IRQ setting in config?\n", ifp->if_unit);
3008 }
3009 fe_reset( sc );
3010 }
3011
3012 /*
3013 * Initialize device.
3014 */
3015 static void
3016 fe_init (void * xsc)
3017 {
3018 struct fe_softc *sc = xsc;
3019 int s;
3020
3021 /* We need an address. */
3022 if (TAILQ_EMPTY(&sc->sc_if.if_addrhead)) { /* XXX unlikely */
3023 #ifdef DIAGNOSTIC
3024 printf("fe%d: init() without any address\n", sc->sc_unit);
3025 #endif
3026 return;
3027 }
3028
3029 /* Start initializing 86960. */
3030 s = splimp();
3031
3032 /* Call a hook before we start initializing the chip. */
3033 if ( sc->init ) sc->init( sc );
3034
3035 /*
3036 * Make sure to disable the chip, also.
3037 * This may also help re-programming the chip after
3038 * hot insertion of PCMCIAs.
3039 */
3040 DELAY( 200 );
3041 outb( sc->ioaddr[ FE_DLCR6 ], sc->proto_dlcr6 | FE_D6_DLC_DISABLE );
3042 DELAY( 200 );
3043
3044 /* Power up the chip and select register bank for DLCRs. */
3045 DELAY( 200 );
3046 outb( sc->ioaddr[ FE_DLCR7 ],
3047 sc->proto_dlcr7 | FE_D7_RBS_DLCR | FE_D7_POWER_UP );
3048 DELAY( 200 );
3049
3050 /* Feed the station address. */
3051 outblk( sc, FE_DLCR8, sc->sc_enaddr, ETHER_ADDR_LEN );
3052
3053 /* Clear multicast address filter to receive nothing. */
3054 outb( sc->ioaddr[ FE_DLCR7 ],
3055 sc->proto_dlcr7 | FE_D7_RBS_MAR | FE_D7_POWER_UP );
3056 outblk( sc, FE_MAR8, fe_filter_nothing.data, FE_FILTER_LEN );
3057
3058 /* Select the BMPR bank for runtime register access. */
3059 outb( sc->ioaddr[ FE_DLCR7 ],
3060 sc->proto_dlcr7 | FE_D7_RBS_BMPR | FE_D7_POWER_UP );
3061
3062 /* Initialize registers. */
3063 outb( sc->ioaddr[ FE_DLCR0 ], 0xFF ); /* Clear all bits. */
3064 outb( sc->ioaddr[ FE_DLCR1 ], 0xFF ); /* ditto. */
3065 outb( sc->ioaddr[ FE_DLCR2 ], 0x00 );
3066 outb( sc->ioaddr[ FE_DLCR3 ], 0x00 );
3067 outb( sc->ioaddr[ FE_DLCR4 ], sc->proto_dlcr4 );
3068 outb( sc->ioaddr[ FE_DLCR5 ], sc->proto_dlcr5 );
3069 outb( sc->ioaddr[ FE_BMPR10 ], 0x00 );
3070 outb( sc->ioaddr[ FE_BMPR11 ], FE_B11_CTRL_SKIP | FE_B11_MODE1 );
3071 outb( sc->ioaddr[ FE_BMPR12 ], 0x00 );
3072 outb( sc->ioaddr[ FE_BMPR13 ], sc->proto_bmpr13 );
3073 outb( sc->ioaddr[ FE_BMPR14 ], 0x00 );
3074 outb( sc->ioaddr[ FE_BMPR15 ], 0x00 );
3075
3076 /* Enable interrupts. */
3077 outb( sc->ioaddr[ FE_DLCR2 ], FE_TMASK );
3078 outb( sc->ioaddr[ FE_DLCR3 ], FE_RMASK );
3079
3080 /* Select requested media, just before enabling DLC. */
3081 if (sc->msel) sc->msel(sc);
3082
3083 /* Enable transmitter and receiver. */
3084 DELAY( 200 );
3085 outb( sc->ioaddr[ FE_DLCR6 ], sc->proto_dlcr6 | FE_D6_DLC_ENABLE );
3086 DELAY( 200 );
3087
3088 #ifdef DIAGNOSTIC
3089 /*
3090 * Make sure to empty the receive buffer.
3091 *
3092 * This may be redundant, but *if* the receive buffer were full
3093 * at this point, then the driver would hang. I have experienced
3094 * some strange hang-up just after UP. I hope the following
3095 * code solve the problem.
3096 *
3097 * I have changed the order of hardware initialization.
3098 * I think the receive buffer cannot have any packets at this
3099 * point in this version. The following code *must* be
3100 * redundant now. FIXME.
3101 *
3102 * I've heard a rumore that on some PC card implementation of
3103 * 8696x, the receive buffer can have some data at this point.
3104 * The following message helps discovering the fact. FIXME.
3105 */
3106 if ( !( inb( sc->ioaddr[ FE_DLCR5 ] ) & FE_D5_BUFEMP ) ) {
3107 printf("fe%d: receive buffer has some data after reset\n",
3108 sc->sc_unit);
3109 fe_emptybuffer( sc );
3110 }
3111
3112 /* Do we need this here? Actually, no. I must be paranoia. */
3113 outb( sc->ioaddr[ FE_DLCR0 ], 0xFF ); /* Clear all bits. */
3114 outb( sc->ioaddr[ FE_DLCR1 ], 0xFF ); /* ditto. */
3115 #endif
3116
3117 /* Set 'running' flag, because we are now running. */
3118 sc->sc_if.if_flags |= IFF_RUNNING;
3119
3120 /*
3121 * At this point, the interface is running properly,
3122 * except that it receives *no* packets. we then call
3123 * fe_setmode() to tell the chip what packets to be
3124 * received, based on the if_flags and multicast group
3125 * list. It completes the initialization process.
3126 */
3127 fe_setmode( sc );
3128
3129 #if 0
3130 /* ...and attempt to start output queued packets. */
3131 /* TURNED OFF, because the semi-auto media prober wants to UP
3132 the interface keeping it idle. The upper layer will soon
3133 start the interface anyway, and there are no significant
3134 delay. */
3135 fe_start( &sc->sc_if );
3136 #endif
3137
3138 (void) splx(s);
3139 }
3140
3141 /*
3142 * This routine actually starts the transmission on the interface
3143 */
3144 static void
3145 fe_xmit ( struct fe_softc * sc )
3146 {
3147 /*
3148 * Set a timer just in case we never hear from the board again.
3149 * We use longer timeout for multiple packet transmission.
3150 * I'm not sure this timer value is appropriate. FIXME.
3151 */
3152 sc->sc_if.if_timer = 1 + sc->txb_count;
3153
3154 /* Update txb variables. */
3155 sc->txb_sched = sc->txb_count;
3156 sc->txb_count = 0;
3157 sc->txb_free = sc->txb_size;
3158 sc->tx_excolls = 0;
3159
3160 /* Start transmitter, passing packets in TX buffer. */
3161 outb( sc->ioaddr[ FE_BMPR10 ], sc->txb_sched | FE_B10_START );
3162 }
3163
3164 /*
3165 * Start output on interface.
3166 * We make two assumptions here:
3167 * 1) that the current priority is set to splimp _before_ this code
3168 * is called *and* is returned to the appropriate priority after
3169 * return
3170 * 2) that the IFF_OACTIVE flag is checked before this code is called
3171 * (i.e. that the output part of the interface is idle)
3172 */
3173 void
3174 fe_start ( struct ifnet *ifp )
3175 {
3176 struct fe_softc *sc = ifp->if_softc;
3177 struct mbuf *m;
3178
3179 #ifdef DIAGNOSTIC
3180 /* Just a sanity check. */
3181 if ( ( sc->txb_count == 0 ) != ( sc->txb_free == sc->txb_size ) ) {
3182 /*
3183 * Txb_count and txb_free co-works to manage the
3184 * transmission buffer. Txb_count keeps track of the
3185 * used potion of the buffer, while txb_free does unused
3186 * potion. So, as long as the driver runs properly,
3187 * txb_count is zero if and only if txb_free is same
3188 * as txb_size (which represents whole buffer.)
3189 */
3190 printf("fe%d: inconsistent txb variables (%d, %d)\n",
3191 sc->sc_unit, sc->txb_count, sc->txb_free);
3192 /*
3193 * So, what should I do, then?
3194 *
3195 * We now know txb_count and txb_free contradicts. We
3196 * cannot, however, tell which is wrong. More
3197 * over, we cannot peek 86960 transmission buffer or
3198 * reset the transmission buffer. (In fact, we can
3199 * reset the entire interface. I don't want to do it.)
3200 *
3201 * If txb_count is incorrect, leaving it as-is will cause
3202 * sending of garbage after next interrupt. We have to
3203 * avoid it. Hence, we reset the txb_count here. If
3204 * txb_free was incorrect, resetting txb_count just loose
3205 * some packets. We can live with it.
3206 */
3207 sc->txb_count = 0;
3208 }
3209 #endif
3210
3211 /*
3212 * First, see if there are buffered packets and an idle
3213 * transmitter - should never happen at this point.
3214 */
3215 if ( ( sc->txb_count > 0 ) && ( sc->txb_sched == 0 ) ) {
3216 printf("fe%d: transmitter idle with %d buffered packets\n",
3217 sc->sc_unit, sc->txb_count);
3218 fe_xmit( sc );
3219 }
3220
3221 /*
3222 * Stop accepting more transmission packets temporarily, when
3223 * a filter change request is delayed. Updating the MARs on
3224 * 86960 flushes the transmission buffer, so it is delayed
3225 * until all buffered transmission packets have been sent
3226 * out.
3227 */
3228 if ( sc->filter_change ) {
3229 /*
3230 * Filter change request is delayed only when the DLC is
3231 * working. DLC soon raise an interrupt after finishing
3232 * the work.
3233 */
3234 goto indicate_active;
3235 }
3236
3237 for (;;) {
3238
3239 /*
3240 * See if there is room to put another packet in the buffer.
3241 * We *could* do better job by peeking the send queue to
3242 * know the length of the next packet. Current version just
3243 * tests against the worst case (i.e., longest packet). FIXME.
3244 *
3245 * When adding the packet-peek feature, don't forget adding a
3246 * test on txb_count against QUEUEING_MAX.
3247 * There is a little chance the packet count exceeds
3248 * the limit. Assume transmission buffer is 8KB (2x8KB
3249 * configuration) and an application sends a bunch of small
3250 * (i.e., minimum packet sized) packets rapidly. An 8KB
3251 * buffer can hold 130 blocks of 62 bytes long...
3252 */
3253 if ( sc->txb_free
3254 < ETHER_MAX_LEN - ETHER_CRC_LEN + FE_DATA_LEN_LEN ) {
3255 /* No room. */
3256 goto indicate_active;
3257 }
3258
3259 #if FE_SINGLE_TRANSMISSION
3260 if ( sc->txb_count > 0 ) {
3261 /* Just one packet per a transmission buffer. */
3262 goto indicate_active;
3263 }
3264 #endif
3265
3266 /*
3267 * Get the next mbuf chain for a packet to send.
3268 */
3269 IF_DEQUEUE( &sc->sc_if.if_snd, m );
3270 if ( m == NULL ) {
3271 /* No more packets to send. */
3272 goto indicate_inactive;
3273 }
3274
3275 /*
3276 * Copy the mbuf chain into the transmission buffer.
3277 * txb_* variables are updated as necessary.
3278 */
3279 fe_write_mbufs( sc, m );
3280
3281 /* Start transmitter if it's idle. */
3282 if ( ( sc->txb_count > 0 ) && ( sc->txb_sched == 0 ) ) {
3283 fe_xmit( sc );
3284 }
3285
3286 /*
3287 * Tap off here if there is a bpf listener,
3288 * and the device is *not* in promiscuous mode.
3289 * (86960 receives self-generated packets if
3290 * and only if it is in "receive everything"
3291 * mode.)
3292 */
3293 #if NBPFILTER > 0
3294 if ( sc->sc_if.if_bpf
3295 && !( sc->sc_if.if_flags & IFF_PROMISC ) ) {
3296 bpf_mtap( &sc->sc_if, m );
3297 }
3298 #endif
3299
3300 m_freem( m );
3301 }
3302
3303 indicate_inactive:
3304 /*
3305 * We are using the !OACTIVE flag to indicate to
3306 * the outside world that we can accept an
3307 * additional packet rather than that the
3308 * transmitter is _actually_ active. Indeed, the
3309 * transmitter may be active, but if we haven't
3310 * filled all the buffers with data then we still
3311 * want to accept more.
3312 */
3313 sc->sc_if.if_flags &= ~IFF_OACTIVE;
3314 return;
3315
3316 indicate_active:
3317 /*
3318 * The transmitter is active, and there are no room for
3319 * more outgoing packets in the transmission buffer.
3320 */
3321 sc->sc_if.if_flags |= IFF_OACTIVE;
3322 return;
3323 }
3324
3325 /*
3326 * Drop (skip) a packet from receive buffer in 86960 memory.
3327 */
3328 static void
3329 fe_droppacket ( struct fe_softc * sc, int len )
3330 {
3331 int i;
3332
3333 /*
3334 * 86960 manual says that we have to read 8 bytes from the buffer
3335 * before skip the packets and that there must be more than 8 bytes
3336 * remaining in the buffer when issue a skip command.
3337 * Remember, we have already read 4 bytes before come here.
3338 */
3339 if ( len > 12 ) {
3340 /* Read 4 more bytes, and skip the rest of the packet. */
3341 #ifdef FE_8BIT_SUPPORT
3342 if ((sc->proto_dlcr6 & FE_D6_SBW) == FE_D6_SBW_BYTE)
3343 {
3344 ( void )inb( sc->ioaddr[ FE_BMPR8 ] );
3345 ( void )inb( sc->ioaddr[ FE_BMPR8 ] );
3346 ( void )inb( sc->ioaddr[ FE_BMPR8 ] );
3347 ( void )inb( sc->ioaddr[ FE_BMPR8 ] );
3348 }
3349 else
3350 #endif
3351 {
3352 ( void )inw( sc->ioaddr[ FE_BMPR8 ] );
3353 ( void )inw( sc->ioaddr[ FE_BMPR8 ] );
3354 }
3355 outb( sc->ioaddr[ FE_BMPR14 ], FE_B14_SKIP );
3356 } else {
3357 /* We should not come here unless receiving RUNTs. */
3358 #ifdef FE_8BIT_SUPPORT
3359 if ((sc->proto_dlcr6 & FE_D6_SBW) == FE_D6_SBW_BYTE)
3360 {
3361 for ( i = 0; i < len; i++ ) {
3362 ( void )inb( sc->ioaddr[ FE_BMPR8 ] );
3363 }
3364 }
3365 else
3366 #endif
3367 {
3368 for ( i = 0; i < len; i += 2 ) {
3369 ( void )inw( sc->ioaddr[ FE_BMPR8 ] );
3370 }
3371 }
3372 }
3373 }
3374
3375 #ifdef DIAGNOSTIC
3376 /*
3377 * Empty receiving buffer.
3378 */
3379 static void
3380 fe_emptybuffer ( struct fe_softc * sc )
3381 {
3382 int i;
3383 u_char saved_dlcr5;
3384
3385 #ifdef FE_DEBUG
3386 printf("fe%d: emptying receive buffer\n", sc->sc_unit);
3387 #endif
3388
3389 /*
3390 * Stop receiving packets, temporarily.
3391 */
3392 saved_dlcr5 = inb( sc->ioaddr[ FE_DLCR5 ] );
3393 outb( sc->ioaddr[ FE_DLCR5 ], sc->proto_dlcr5 );
3394 DELAY(1300);
3395
3396 /*
3397 * When we come here, the receive buffer management may
3398 * have been broken. So, we cannot use skip operation.
3399 * Just discard everything in the buffer.
3400 */
3401 #ifdef FE_8BIT_SUPPORT
3402 if ((sc->proto_dlcr6 & FE_D6_SBW) == FE_D6_SBW_BYTE)
3403 {
3404 for ( i = 0; i < 65536; i++ ) {
3405 if ( inb( sc->ioaddr[ FE_DLCR5 ] ) & FE_D5_BUFEMP ) break;
3406 ( void )inb( sc->ioaddr[ FE_BMPR8 ] );
3407 }
3408 }
3409 else
3410 #endif
3411 {
3412 for ( i = 0; i < 65536; i += 2 ) {
3413 if ( inb( sc->ioaddr[ FE_DLCR5 ] ) & FE_D5_BUFEMP ) break;
3414 ( void )inw( sc->ioaddr[ FE_BMPR8 ] );
3415 }
3416 }
3417
3418 /*
3419 * Double check.
3420 */
3421 if ( inb( sc->ioaddr[ FE_DLCR5 ] ) & FE_D5_BUFEMP ) {
3422 printf("fe%d: could not empty receive buffer\n", sc->sc_unit);
3423 /* Hmm. What should I do if this happens? FIXME. */
3424 }
3425
3426 /*
3427 * Restart receiving packets.
3428 */
3429 outb( sc->ioaddr[ FE_DLCR5 ], saved_dlcr5 );
3430 }
3431 #endif
3432
3433 /*
3434 * Transmission interrupt handler
3435 * The control flow of this function looks silly. FIXME.
3436 */
3437 static void
3438 fe_tint ( struct fe_softc * sc, u_char tstat )
3439 {
3440 int left;
3441 int col;
3442
3443 /*
3444 * Handle "excessive collision" interrupt.
3445 */
3446 if ( tstat & FE_D0_COLL16 ) {
3447
3448 /*
3449 * Find how many packets (including this collided one)
3450 * are left unsent in transmission buffer.
3451 */
3452 left = inb( sc->ioaddr[ FE_BMPR10 ] );
3453 printf("fe%d: excessive collision (%d/%d)\n",
3454 sc->sc_unit, left, sc->txb_sched);
3455
3456 /*
3457 * Clear the collision flag (in 86960) here
3458 * to avoid confusing statistics.
3459 */
3460 outb( sc->ioaddr[ FE_DLCR0 ], FE_D0_COLLID );
3461
3462 /*
3463 * Restart transmitter, skipping the
3464 * collided packet.
3465 *
3466 * We *must* skip the packet to keep network running
3467 * properly. Excessive collision error is an
3468 * indication of the network overload. If we
3469 * tried sending the same packet after excessive
3470 * collision, the network would be filled with
3471 * out-of-time packets. Packets belonging
3472 * to reliable transport (such as TCP) are resent
3473 * by some upper layer.
3474 */
3475 outb( sc->ioaddr[ FE_BMPR11 ],
3476 FE_B11_CTRL_SKIP | FE_B11_MODE1 );
3477
3478 /* Update statistics. */
3479 sc->tx_excolls++;
3480 }
3481
3482 /*
3483 * Handle "transmission complete" interrupt.
3484 */
3485 if ( tstat & FE_D0_TXDONE ) {
3486
3487 /*
3488 * Add in total number of collisions on last
3489 * transmission. We also clear "collision occurred" flag
3490 * here.
3491 *
3492 * 86960 has a design flaw on collision count on multiple
3493 * packet transmission. When we send two or more packets
3494 * with one start command (that's what we do when the
3495 * transmission queue is crowded), 86960 informs us number
3496 * of collisions occurred on the last packet on the
3497 * transmission only. Number of collisions on previous
3498 * packets are lost. I have told that the fact is clearly
3499 * stated in the Fujitsu document.
3500 *
3501 * I considered not to mind it seriously. Collision
3502 * count is not so important, anyway. Any comments? FIXME.
3503 */
3504
3505 if ( inb( sc->ioaddr[ FE_DLCR0 ] ) & FE_D0_COLLID ) {
3506
3507 /* Clear collision flag. */
3508 outb( sc->ioaddr[ FE_DLCR0 ], FE_D0_COLLID );
3509
3510 /* Extract collision count from 86960. */
3511 col = inb( sc->ioaddr[ FE_DLCR4 ] );
3512 col = ( col & FE_D4_COL ) >> FE_D4_COL_SHIFT;
3513 if ( col == 0 ) {
3514 /*
3515 * Status register indicates collisions,
3516 * while the collision count is zero.
3517 * This can happen after multiple packet
3518 * transmission, indicating that one or more
3519 * previous packet(s) had been collided.
3520 *
3521 * Since the accurate number of collisions
3522 * has been lost, we just guess it as 1;
3523 * Am I too optimistic? FIXME.
3524 */
3525 col = 1;
3526 }
3527 sc->sc_if.if_collisions += col;
3528 if ( col == 1 ) {
3529 sc->mibdata.dot3StatsSingleCollisionFrames++;
3530 } else {
3531 sc->mibdata.dot3StatsMultipleCollisionFrames++;
3532 }
3533 sc->mibdata.dot3StatsCollFrequencies[col-1]++;
3534 }
3535
3536 /*
3537 * Update transmission statistics.
3538 * Be sure to reflect number of excessive collisions.
3539 */
3540 col = sc->tx_excolls;
3541 sc->sc_if.if_opackets += sc->txb_sched - col;
3542 sc->sc_if.if_oerrors += col;
3543 sc->sc_if.if_collisions += col * 16;
3544 sc->mibdata.dot3StatsExcessiveCollisions += col;
3545 sc->mibdata.dot3StatsCollFrequencies[15] += col;
3546 sc->txb_sched = 0;
3547
3548 /*
3549 * The transmitter is no more active.
3550 * Reset output active flag and watchdog timer.
3551 */
3552 sc->sc_if.if_flags &= ~IFF_OACTIVE;
3553 sc->sc_if.if_timer = 0;
3554
3555 /*
3556 * If more data is ready to transmit in the buffer, start
3557 * transmitting them. Otherwise keep transmitter idle,
3558 * even if more data is queued. This gives receive
3559 * process a slight priority.
3560 */
3561 if ( sc->txb_count > 0 ) fe_xmit( sc );
3562 }
3563 }
3564
3565 /*
3566 * Ethernet interface receiver interrupt.
3567 */
3568 static void
3569 fe_rint ( struct fe_softc * sc, u_char rstat )
3570 {
3571 u_short len;
3572 u_char status;
3573 int i;
3574
3575 /*
3576 * Update statistics if this interrupt is caused by an error.
3577 * Note that, when the system was not sufficiently fast, the
3578 * receive interrupt might not be acknowledged immediately. If
3579 * one or more errornous frames were received before this routine
3580 * was scheduled, they are ignored, and the following error stats
3581 * give less than real values.
3582 */
3583 if ( rstat & ( FE_D1_OVRFLO | FE_D1_CRCERR
3584 | FE_D1_ALGERR | FE_D1_SRTPKT ) ) {
3585 if ( rstat & FE_D1_OVRFLO )
3586 sc->mibdata.dot3StatsInternalMacReceiveErrors++;
3587 if ( rstat & FE_D1_CRCERR )
3588 sc->mibdata.dot3StatsFCSErrors++;
3589 if ( rstat & FE_D1_ALGERR )
3590 sc->mibdata.dot3StatsAlignmentErrors++;
3591 #if 0
3592 /* The reference MAC receiver defined in 802.3
3593 silently ignores short frames (RUNTs) without
3594 notifying upper layer. RFC 1650 (dot3 MIB) is
3595 based on the 802.3, and it has no stats entry for
3596 RUNTs... */
3597 if ( rstat & FE_D1_SRTPKT )
3598 sc->mibdata.dot3StatsFrameTooShorts++; /* :-) */
3599 #endif
3600 sc->sc_if.if_ierrors++;
3601 }
3602
3603 /*
3604 * MB86960 has a flag indicating "receive queue empty."
3605 * We just loop, checking the flag, to pull out all received
3606 * packets.
3607 *
3608 * We limit the number of iterations to avoid infinite-loop.
3609 * The upper bound is set to unrealistic high value.
3610 */
3611 for ( i = 0; i < FE_MAX_RECV_COUNT * 2; i++ ) {
3612
3613 /* Stop the iteration if 86960 indicates no packets. */
3614 if ( inb( sc->ioaddr[ FE_DLCR5 ] ) & FE_D5_BUFEMP ) return;
3615
3616 /*
3617 * Extract a receive status byte.
3618 * As our 86960 is in 16 bit bus access mode, we have to
3619 * use inw() to get the status byte. The significant
3620 * value is returned in lower 8 bits.
3621 */
3622 #ifdef FE_8BIT_SUPPORT
3623 if ((sc->proto_dlcr6 & FE_D6_SBW) == FE_D6_SBW_BYTE)
3624 {
3625 status = inb( sc->ioaddr[ FE_BMPR8 ] );
3626 ( void ) inb( sc->ioaddr[ FE_BMPR8 ] );
3627 }
3628 else
3629 #endif
3630 {
3631 status = ( u_char )inw( sc->ioaddr[ FE_BMPR8 ] );
3632 }
3633
3634 /*
3635 * Extract the packet length.
3636 * It is a sum of a header (14 bytes) and a payload.
3637 * CRC has been stripped off by the 86960.
3638 */
3639 #ifdef FE_8BIT_SUPPORT
3640 if ((sc->proto_dlcr6 & FE_D6_SBW) == FE_D6_SBW_BYTE)
3641 {
3642 len = inb( sc->ioaddr[ FE_BMPR8 ] );
3643 len |= ( inb( sc->ioaddr[ FE_BMPR8 ] ) << 8 );
3644 }
3645 else
3646 #endif
3647 {
3648 len = inw( sc->ioaddr[ FE_BMPR8 ] );
3649 }
3650
3651 /*
3652 * AS our 86960 is programed to ignore errored frame,
3653 * we must not see any error indication in the
3654 * receive buffer. So, any error condition is a
3655 * serious error, e.g., out-of-sync of the receive
3656 * buffer pointers.
3657 */
3658 if ( ( status & 0xF0 ) != 0x20
3659 || len > ETHER_MAX_LEN - ETHER_CRC_LEN
3660 || len < ETHER_MIN_LEN - ETHER_CRC_LEN ) {
3661 printf("fe%d: RX buffer out-of-sync\n", sc->sc_unit);
3662 sc->sc_if.if_ierrors++;
3663 sc->mibdata.dot3StatsInternalMacReceiveErrors++;
3664 fe_reset(sc);
3665 return;
3666 }
3667
3668 /*
3669 * Go get a packet.
3670 */
3671 if ( fe_get_packet( sc, len ) < 0 ) {
3672 /*
3673 * Negative return from fe_get_packet()
3674 * indicates no available mbuf. We stop
3675 * receiving packets, even if there are more
3676 * in the buffer. We hope we can get more
3677 * mbuf next time.
3678 */
3679 sc->sc_if.if_ierrors++;
3680 sc->mibdata.dot3StatsMissedFrames++;
3681 fe_droppacket( sc, len );
3682 return;
3683 }
3684
3685 /* Successfully received a packet. Update stat. */
3686 sc->sc_if.if_ipackets++;
3687 }
3688
3689 /* Maximum number of frames has been received. Something
3690 strange is happening here... */
3691 printf("fe%d: unusual receive flood\n", sc->sc_unit);
3692 sc->mibdata.dot3StatsInternalMacReceiveErrors++;
3693 fe_reset(sc);
3694 }
3695
3696 /*
3697 * Ethernet interface interrupt processor
3698 */
3699 static void
3700 feintr ( int unit )
3701 {
3702 struct fe_softc *sc = &fe_softc[unit];
3703 u_char tstat, rstat;
3704 int loop_count = FE_MAX_LOOP;
3705
3706 /* Loop until there are no more new interrupt conditions. */
3707 while (loop_count-- > 0) {
3708 /*
3709 * Get interrupt conditions, masking unneeded flags.
3710 */
3711 tstat = inb( sc->ioaddr[ FE_DLCR0 ] ) & FE_TMASK;
3712 rstat = inb( sc->ioaddr[ FE_DLCR1 ] ) & FE_RMASK;
3713 if ( tstat == 0 && rstat == 0 ) return;
3714
3715 /*
3716 * Reset the conditions we are acknowledging.
3717 */
3718 outb( sc->ioaddr[ FE_DLCR0 ], tstat );
3719 outb( sc->ioaddr[ FE_DLCR1 ], rstat );
3720
3721 /*
3722 * Handle transmitter interrupts.
3723 */
3724 if ( tstat ) {
3725 fe_tint( sc, tstat );
3726 }
3727
3728 /*
3729 * Handle receiver interrupts
3730 */
3731 if ( rstat ) {
3732 fe_rint( sc, rstat );
3733 }
3734
3735 /*
3736 * Update the multicast address filter if it is
3737 * needed and possible. We do it now, because
3738 * we can make sure the transmission buffer is empty,
3739 * and there is a good chance that the receive queue
3740 * is empty. It will minimize the possibility of
3741 * packet loss.
3742 */
3743 if ( sc->filter_change
3744 && sc->txb_count == 0 && sc->txb_sched == 0 ) {
3745 fe_loadmar(sc);
3746 sc->sc_if.if_flags &= ~IFF_OACTIVE;
3747 }
3748
3749 /*
3750 * If it looks like the transmitter can take more data,
3751 * attempt to start output on the interface. This is done
3752 * after handling the receiver interrupt to give the
3753 * receive operation priority.
3754 *
3755 * BTW, I'm not sure in what case the OACTIVE is on at
3756 * this point. Is the following test redundant?
3757 *
3758 * No. This routine polls for both transmitter and
3759 * receiver interrupts. 86960 can raise a receiver
3760 * interrupt when the transmission buffer is full.
3761 */
3762 if ( ( sc->sc_if.if_flags & IFF_OACTIVE ) == 0 ) {
3763 fe_start( &sc->sc_if );
3764 }
3765
3766 }
3767
3768 printf("fe%d: too many loops\n", sc->sc_unit);
3769 return;
3770 }
3771
3772 /*
3773 * Process an ioctl request. This code needs some work - it looks
3774 * pretty ugly.
3775 */
3776 static int
3777 fe_ioctl ( struct ifnet * ifp, u_long command, caddr_t data )
3778 {
3779 struct fe_softc *sc = ifp->if_softc;
3780 struct ifreq *ifr = (struct ifreq *)data;
3781 int s, error = 0;
3782
3783 s = splimp();
3784
3785 switch (command) {
3786
3787 case SIOCSIFADDR:
3788 case SIOCGIFADDR:
3789 case SIOCSIFMTU:
3790 /* Just an ordinary action. */
3791 error = ether_ioctl(ifp, command, data);
3792 break;
3793
3794 case SIOCSIFFLAGS:
3795 /*
3796 * Switch interface state between "running" and
3797 * "stopped", reflecting the UP flag.
3798 */
3799 if ( sc->sc_if.if_flags & IFF_UP ) {
3800 if ( ( sc->sc_if.if_flags & IFF_RUNNING ) == 0 ) {
3801 fe_init(sc);
3802 }
3803 } else {
3804 if ( ( sc->sc_if.if_flags & IFF_RUNNING ) != 0 ) {
3805 fe_stop(sc);
3806 }
3807 }
3808
3809 /*
3810 * Promiscuous and/or multicast flags may have changed,
3811 * so reprogram the multicast filter and/or receive mode.
3812 */
3813 fe_setmode( sc );
3814
3815 /* Done. */
3816 break;
3817
3818 case SIOCADDMULTI:
3819 case SIOCDELMULTI:
3820 /*
3821 * Multicast list has changed; set the hardware filter
3822 * accordingly.
3823 */
3824 fe_setmode( sc );
3825 break;
3826
3827 case SIOCSIFMEDIA:
3828 case SIOCGIFMEDIA:
3829 /* Let if_media to handle these commands and to call
3830 us back. */
3831 error = ifmedia_ioctl(ifp, ifr, &sc->media, command);
3832 break;
3833
3834 default:
3835 error = EINVAL;
3836 break;
3837 }
3838
3839 (void) splx(s);
3840 return (error);
3841 }
3842
3843 /*
3844 * Retrieve packet from receive buffer and send to the next level up via
3845 * ether_input(). If there is a BPF listener, give a copy to BPF, too.
3846 * Returns 0 if success, -1 if error (i.e., mbuf allocation failure).
3847 */
3848 static int
3849 fe_get_packet ( struct fe_softc * sc, u_short len )
3850 {
3851 struct ether_header *eh;
3852 struct mbuf *m;
3853
3854 /*
3855 * NFS wants the data be aligned to the word (4 byte)
3856 * boundary. Ethernet header has 14 bytes. There is a
3857 * 2-byte gap.
3858 */
3859 #define NFS_MAGIC_OFFSET 2
3860
3861 /*
3862 * This function assumes that an Ethernet packet fits in an
3863 * mbuf (with a cluster attached when necessary.) On FreeBSD
3864 * 2.0 for x86, which is the primary target of this driver, an
3865 * mbuf cluster has 4096 bytes, and we are happy. On ancient
3866 * BSDs, such as vanilla 4.3 for 386, a cluster size was 1024,
3867 * however. If the following #error message were printed upon
3868 * compile, you need to rewrite this function.
3869 */
3870 #if ( MCLBYTES < ETHER_MAX_LEN - ETHER_CRC_LEN + NFS_MAGIC_OFFSET )
3871 #error "Too small MCLBYTES to use fe driver."
3872 #endif
3873
3874 /*
3875 * Our strategy has one more problem. There is a policy on
3876 * mbuf cluster allocation. It says that we must have at
3877 * least MINCLSIZE (208 bytes on FreeBSD 2.0 for x86) to
3878 * allocate a cluster. For a packet of a size between
3879 * (MHLEN - 2) to (MINCLSIZE - 2), our code violates the rule...
3880 * On the other hand, the current code is short, simple,
3881 * and fast, however. It does no harmful thing, just waists
3882 * some memory. Any comments? FIXME.
3883 */
3884
3885 /* Allocate an mbuf with packet header info. */
3886 MGETHDR(m, M_DONTWAIT, MT_DATA);
3887 if ( m == NULL ) return -1;
3888
3889 /* Attach a cluster if this packet doesn't fit in a normal mbuf. */
3890 if ( len > MHLEN - NFS_MAGIC_OFFSET ) {
3891 MCLGET( m, M_DONTWAIT );
3892 if ( !( m->m_flags & M_EXT ) ) {
3893 m_freem( m );
3894 return -1;
3895 }
3896 }
3897
3898 /* Initialize packet header info. */
3899 m->m_pkthdr.rcvif = &sc->sc_if;
3900 m->m_pkthdr.len = len;
3901
3902 /* Set the length of this packet. */
3903 m->m_len = len;
3904
3905 /* The following silliness is to make NFS happy */
3906 m->m_data += NFS_MAGIC_OFFSET;
3907
3908 /* Get (actually just point to) the header part. */
3909 eh = mtod(m, struct ether_header *);
3910
3911 /* Get a packet. */
3912 #ifdef FE_8BIT_SUPPORT
3913 if ((sc->proto_dlcr6 & FE_D6_SBW) == FE_D6_SBW_BYTE)
3914 {
3915 insb( sc->ioaddr[ FE_BMPR8 ], eh, len );
3916 }
3917 else
3918 #endif
3919 {
3920 insw( sc->ioaddr[ FE_BMPR8 ], eh, ( len + 1 ) >> 1 );
3921 }
3922
3923 #define ETHER_ADDR_IS_MULTICAST(A) (*(char *)(A) & 1)
3924
3925 #if NBPFILTER > 0
3926 /*
3927 * Check if there's a BPF listener on this interface.
3928 * If it is, hand off the raw packet to bpf.
3929 */
3930 if ( sc->sc_if.if_bpf ) {
3931 bpf_mtap( &sc->sc_if, m );
3932 }
3933 #endif
3934
3935 #ifdef BRIDGE
3936 if (do_bridge) {
3937 struct ifnet *ifp;
3938
3939 ifp = bridge_in(m);
3940 if (ifp == BDG_DROP) {
3941 m_freem(m);
3942 return 0;
3943 }
3944 if (ifp != BDG_LOCAL)
3945 bdg_forward(&m, ifp); /* not local, need forwarding */
3946 if (ifp == BDG_LOCAL || ifp == BDG_BCAST || ifp == BDG_MCAST)
3947 goto getit;
3948 /* not local and not multicast, just drop it */
3949 if (m)
3950 m_freem(m);
3951 return 0;
3952 }
3953 #endif
3954
3955 /*
3956 * Make sure this packet is (or may be) directed to us.
3957 * That is, the packet is either unicasted to our address,
3958 * or broad/multi-casted. If any other packets are
3959 * received, it is an indication of an error -- probably
3960 * 86960 is in a wrong operation mode.
3961 * Promiscuous mode is an exception. Under the mode, all
3962 * packets on the media must be received. (We must have
3963 * programmed the 86960 so.)
3964 */
3965
3966 if ( ( sc->sc_if.if_flags & IFF_PROMISC )
3967 && !ETHER_ADDR_IS_MULTICAST( eh->ether_dhost )
3968 && bcmp( eh->ether_dhost, sc->sc_enaddr, ETHER_ADDR_LEN ) != 0 ) {
3969 /*
3970 * The packet was not for us. This is normal since
3971 * we are now in promiscuous mode. Just drop the packet.
3972 */
3973 m_freem( m );
3974 return 0;
3975 }
3976
3977 #ifdef BRIDGE
3978 getit:
3979 #endif
3980 /* Strip off the Ethernet header. */
3981 m->m_pkthdr.len -= sizeof ( struct ether_header );
3982 m->m_len -= sizeof ( struct ether_header );
3983 m->m_data += sizeof ( struct ether_header );
3984
3985 /* Feed the packet to upper layer. */
3986 ether_input( &sc->sc_if, eh, m );
3987 return 0;
3988 }
3989
3990 /*
3991 * Write an mbuf chain to the transmission buffer memory using 16 bit PIO.
3992 * Returns number of bytes actually written, including length word.
3993 *
3994 * If an mbuf chain is too long for an Ethernet frame, it is not sent.
3995 * Packets shorter than Ethernet minimum are legal, and we pad them
3996 * before sending out. An exception is "partial" packets which are
3997 * shorter than mandatory Ethernet header.
3998 */
3999 static void
4000 fe_write_mbufs ( struct fe_softc *sc, struct mbuf *m )
4001 {
4002 u_short addr_bmpr8 = sc->ioaddr[ FE_BMPR8 ];
4003 u_short length, len;
4004 struct mbuf *mp;
4005 u_char *data;
4006 u_short savebyte; /* WARNING: Architecture dependent! */
4007 #define NO_PENDING_BYTE 0xFFFF
4008
4009 static u_char padding [ ETHER_MIN_LEN - ETHER_CRC_LEN - ETHER_HDR_LEN ];
4010
4011 #ifdef DIAGNOSTIC
4012 /* First, count up the total number of bytes to copy */
4013 length = 0;
4014 for ( mp = m; mp != NULL; mp = mp->m_next ) {
4015 length += mp->m_len;
4016 }
4017 /* Check if this matches the one in the packet header. */
4018 if ( length != m->m_pkthdr.len ) {
4019 printf("fe%d: packet length mismatch? (%d/%d)\n", sc->sc_unit,
4020 length, m->m_pkthdr.len);
4021 }
4022 #else
4023 /* Just use the length value in the packet header. */
4024 length = m->m_pkthdr.len;
4025 #endif
4026
4027 #ifdef DIAGNOSTIC
4028 /*
4029 * Should never send big packets. If such a packet is passed,
4030 * it should be a bug of upper layer. We just ignore it.
4031 * ... Partial (too short) packets, neither.
4032 */
4033 if ( length < ETHER_HDR_LEN
4034 || length > ETHER_MAX_LEN - ETHER_CRC_LEN ) {
4035 printf("fe%d: got an out-of-spec packet (%u bytes) to send\n",
4036 sc->sc_unit, length);
4037 sc->sc_if.if_oerrors++;
4038 sc->mibdata.dot3StatsInternalMacTransmitErrors++;
4039 return;
4040 }
4041 #endif
4042
4043 /*
4044 * Put the length word for this frame.
4045 * Does 86960 accept odd length? -- Yes.
4046 * Do we need to pad the length to minimum size by ourselves?
4047 * -- Generally yes. But for (or will be) the last
4048 * packet in the transmission buffer, we can skip the
4049 * padding process. It may gain performance slightly. FIXME.
4050 */
4051 #ifdef FE_8BIT_SUPPORT
4052 if ((sc->proto_dlcr6 & FE_D6_SBW) == FE_D6_SBW_BYTE)
4053 {
4054 len = max( length, ETHER_MIN_LEN - ETHER_CRC_LEN );
4055 outb( addr_bmpr8, len & 0x00ff );
4056 outb( addr_bmpr8, ( len & 0xff00 ) >> 8 );
4057 }
4058 else
4059 #endif
4060 {
4061 outw( addr_bmpr8, max( length, ETHER_MIN_LEN - ETHER_CRC_LEN ) );
4062 }
4063
4064 /*
4065 * Update buffer status now.
4066 * Truncate the length up to an even number, since we use outw().
4067 */
4068 #ifdef FE_8BIT_SUPPORT
4069 if ((sc->proto_dlcr6 & FE_D6_SBW) != FE_D6_SBW_BYTE)
4070 #endif
4071 {
4072 length = ( length + 1 ) & ~1;
4073 }
4074 sc->txb_free -= FE_DATA_LEN_LEN + max( length, ETHER_MIN_LEN - ETHER_CRC_LEN);
4075 sc->txb_count++;
4076
4077 /*
4078 * Transfer the data from mbuf chain to the transmission buffer.
4079 * MB86960 seems to require that data be transferred as words, and
4080 * only words. So that we require some extra code to patch
4081 * over odd-length mbufs.
4082 */
4083 #ifdef FE_8BIT_SUPPORT
4084 if ((sc->proto_dlcr6 & FE_D6_SBW) == FE_D6_SBW_BYTE)
4085 {
4086 /* 8-bit cards are easy. */
4087 for ( mp = m; mp != 0; mp = mp->m_next ) {
4088 if ( mp->m_len ) {
4089 outsb( addr_bmpr8, mtod(mp, caddr_t), mp->m_len );
4090 }
4091 }
4092 }
4093 else
4094 #endif
4095 {
4096 /* 16-bit cards are a pain. */
4097 savebyte = NO_PENDING_BYTE;
4098 for ( mp = m; mp != 0; mp = mp->m_next ) {
4099
4100 /* Ignore empty mbuf. */
4101 len = mp->m_len;
4102 if ( len == 0 ) continue;
4103
4104 /* Find the actual data to send. */
4105 data = mtod(mp, caddr_t);
4106
4107 /* Finish the last byte. */
4108 if ( savebyte != NO_PENDING_BYTE ) {
4109 outw( addr_bmpr8, savebyte | ( *data << 8 ) );
4110 data++;
4111 len--;
4112 savebyte = NO_PENDING_BYTE;
4113 }
4114
4115 /* output contiguous words */
4116 if (len > 1) {
4117 outsw( addr_bmpr8, data, len >> 1);
4118 data += len & ~1;
4119 len &= 1;
4120 }
4121
4122 /* Save a remaining byte, if there is one. */
4123 if ( len > 0 ) {
4124 savebyte = *data;
4125 }
4126 }
4127
4128 /* Spit the last byte, if the length is odd. */
4129 if ( savebyte != NO_PENDING_BYTE ) {
4130 outw( addr_bmpr8, savebyte );
4131 }
4132 }
4133
4134 /* Pad to the Ethernet minimum length, if the packet is too short. */
4135 if ( length < ETHER_MIN_LEN - ETHER_CRC_LEN ) {
4136 #ifdef FE_8BIT_SUPPORT
4137 if ((sc->proto_dlcr6 & FE_D6_SBW) == FE_D6_SBW_BYTE)
4138 {
4139 outsb( addr_bmpr8, padding, ETHER_MIN_LEN - ETHER_CRC_LEN - length );
4140 }
4141 else
4142 #endif
4143 {
4144 outsw( addr_bmpr8, padding, ( ETHER_MIN_LEN - ETHER_CRC_LEN - length ) >> 1);
4145 }
4146 }
4147 }
4148
4149 /*
4150 * Compute hash value for an Ethernet address
4151 */
4152 static int
4153 fe_hash ( u_char * ep )
4154 {
4155 #define FE_HASH_MAGIC_NUMBER 0xEDB88320L
4156
4157 u_long hash = 0xFFFFFFFFL;
4158 int i, j;
4159 u_char b;
4160 u_long m;
4161
4162 for ( i = ETHER_ADDR_LEN; --i >= 0; ) {
4163 b = *ep++;
4164 for ( j = 8; --j >= 0; ) {
4165 m = hash;
4166 hash >>= 1;
4167 if ( ( m ^ b ) & 1 ) hash ^= FE_HASH_MAGIC_NUMBER;
4168 b >>= 1;
4169 }
4170 }
4171 return ( ( int )( hash >> 26 ) );
4172 }
4173
4174 /*
4175 * Compute the multicast address filter from the
4176 * list of multicast addresses we need to listen to.
4177 */
4178 static struct fe_filter
4179 fe_mcaf ( struct fe_softc *sc )
4180 {
4181 int index;
4182 struct fe_filter filter;
4183 struct ifmultiaddr *ifma;
4184
4185 filter = fe_filter_nothing;
4186 for (ifma = sc->arpcom.ac_if.if_multiaddrs.lh_first; ifma;
4187 ifma = ifma->ifma_link.le_next) {
4188 if (ifma->ifma_addr->sa_family != AF_LINK)
4189 continue;
4190 index = fe_hash(LLADDR((struct sockaddr_dl *)ifma->ifma_addr));
4191 #ifdef FE_DEBUG
4192 printf("fe%d: hash(%6D) == %d\n",
4193 sc->sc_unit, enm->enm_addrlo , ":", index);
4194 #endif
4195
4196 filter.data[index >> 3] |= 1 << (index & 7);
4197 }
4198 return ( filter );
4199 }
4200
4201 /*
4202 * Calculate a new "multicast packet filter" and put the 86960
4203 * receiver in appropriate mode.
4204 */
4205 static void
4206 fe_setmode ( struct fe_softc *sc )
4207 {
4208 int flags = sc->sc_if.if_flags;
4209
4210 /*
4211 * If the interface is not running, we postpone the update
4212 * process for receive modes and multicast address filter
4213 * until the interface is restarted. It reduces some
4214 * complicated job on maintaining chip states. (Earlier versions
4215 * of this driver had a bug on that point...)
4216 *
4217 * To complete the trick, fe_init() calls fe_setmode() after
4218 * restarting the interface.
4219 */
4220 if ( !( flags & IFF_RUNNING ) ) return;
4221
4222 /*
4223 * Promiscuous mode is handled separately.
4224 */
4225 if ( flags & IFF_PROMISC ) {
4226 /*
4227 * Program 86960 to receive all packets on the segment
4228 * including those directed to other stations.
4229 * Multicast filter stored in MARs are ignored
4230 * under this setting, so we don't need to update it.
4231 *
4232 * Promiscuous mode in FreeBSD 2 is used solely by
4233 * BPF, and BPF only listens to valid (no error) packets.
4234 * So, we ignore erroneous ones even in this mode.
4235 * (Older versions of fe driver mistook the point.)
4236 */
4237 outb( sc->ioaddr[ FE_DLCR5 ],
4238 sc->proto_dlcr5 | FE_D5_AFM0 | FE_D5_AFM1 );
4239 sc->filter_change = 0;
4240 return;
4241 }
4242
4243 /*
4244 * Turn the chip to the normal (non-promiscuous) mode.
4245 */
4246 outb( sc->ioaddr[ FE_DLCR5 ], sc->proto_dlcr5 | FE_D5_AFM1 );
4247
4248 /*
4249 * Find the new multicast filter value.
4250 */
4251 if ( flags & IFF_ALLMULTI ) {
4252 sc->filter = fe_filter_all;
4253 } else {
4254 sc->filter = fe_mcaf( sc );
4255 }
4256 sc->filter_change = 1;
4257
4258 /*
4259 * We have to update the multicast filter in the 86960, A.S.A.P.
4260 *
4261 * Note that the DLC (Data Link Control unit, i.e. transmitter
4262 * and receiver) must be stopped when feeding the filter, and
4263 * DLC trashes all packets in both transmission and receive
4264 * buffers when stopped.
4265 *
4266 * To reduce the packet loss, we delay the filter update
4267 * process until buffers are empty.
4268 */
4269 if ( sc->txb_sched == 0 && sc->txb_count == 0
4270 && !( inb( sc->ioaddr[ FE_DLCR1 ] ) & FE_D1_PKTRDY ) ) {
4271 /*
4272 * Buffers are (apparently) empty. Load
4273 * the new filter value into MARs now.
4274 */
4275 fe_loadmar(sc);
4276 } else {
4277 /*
4278 * Buffers are not empty. Mark that we have to update
4279 * the MARs. The new filter will be loaded by feintr()
4280 * later.
4281 */
4282 }
4283 }
4284
4285 /*
4286 * Load a new multicast address filter into MARs.
4287 *
4288 * The caller must have splimp'ed before fe_loadmar.
4289 * This function starts the DLC upon return. So it can be called only
4290 * when the chip is working, i.e., from the driver's point of view, when
4291 * a device is RUNNING. (I mistook the point in previous versions.)
4292 */
4293 static void
4294 fe_loadmar ( struct fe_softc * sc )
4295 {
4296 /* Stop the DLC (transmitter and receiver). */
4297 DELAY( 200 );
4298 outb( sc->ioaddr[ FE_DLCR6 ], sc->proto_dlcr6 | FE_D6_DLC_DISABLE );
4299 DELAY( 200 );
4300
4301 /* Select register bank 1 for MARs. */
4302 outb( sc->ioaddr[ FE_DLCR7 ],
4303 sc->proto_dlcr7 | FE_D7_RBS_MAR | FE_D7_POWER_UP );
4304
4305 /* Copy filter value into the registers. */
4306 outblk( sc, FE_MAR8, sc->filter.data, FE_FILTER_LEN );
4307
4308 /* Restore the bank selection for BMPRs (i.e., runtime registers). */
4309 outb( sc->ioaddr[ FE_DLCR7 ],
4310 sc->proto_dlcr7 | FE_D7_RBS_BMPR | FE_D7_POWER_UP );
4311
4312 /* Restart the DLC. */
4313 DELAY( 200 );
4314 outb( sc->ioaddr[ FE_DLCR6 ], sc->proto_dlcr6 | FE_D6_DLC_ENABLE );
4315 DELAY( 200 );
4316
4317 /* We have just updated the filter. */
4318 sc->filter_change = 0;
4319 }
4320
4321 /* Change the media selection. */
4322 static int
4323 fe_medchange (struct ifnet *ifp)
4324 {
4325 struct fe_softc *sc = (struct fe_softc *)ifp->if_softc;
4326
4327 #ifdef DIAGNOSTIC
4328 /* If_media should not pass any request for a media which this
4329 interface doesn't support. */
4330 int b;
4331
4332 for (b = 0; bit2media[b] != 0; b++) {
4333 if (bit2media[b] == sc->media.ifm_media) break;
4334 }
4335 if (((1 << b) & sc->mbitmap) == 0) {
4336 printf("fe%d: got an unsupported media request (0x%x)\n",
4337 sc->sc_unit, sc->media.ifm_media);
4338 return EINVAL;
4339 }
4340 #endif
4341
4342 /* We don't actually change media when the interface is down.
4343 fe_init() will do the job, instead. Should we also wait
4344 until the transmission buffer being empty? Changing the
4345 media when we are sending a frame will cause two garbages
4346 on wires, one on old media and another on new. FIXME */
4347 if (sc->sc_if.if_flags & IFF_UP) {
4348 if (sc->msel) sc->msel(sc);
4349 }
4350
4351 return 0;
4352 }
4353
4354 /* I don't know how I can support media status callback... FIXME. */
4355 static void
4356 fe_medstat (struct ifnet *ifp, struct ifmediareq *ifmr)
4357 {
4358 (void)ifp;
4359 (void)ifmr;
4360 }
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