Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)
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sys/i386/isa/intr_machdep.c
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1 /*- 2 * Copyright (c) 1991 The Regents of the University of California. 3 * All rights reserved. 4 * 5 * This code is derived from software contributed to Berkeley by 6 * William Jolitz. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 3. All advertising materials mentioning features or use of this software 17 * must display the following acknowledgement: 18 * This product includes software developed by the University of 19 * California, Berkeley and its contributors. 20 * 4. Neither the name of the University nor the names of its contributors 21 * may be used to endorse or promote products derived from this software 22 * without specific prior written permission. 23 * 24 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 25 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 27 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 30 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 31 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 32 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 33 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 34 * SUCH DAMAGE. 35 * 36 * from: @(#)isa.c 7.2 (Berkeley) 5/13/91 37 * $FreeBSD$ 38 */ 39 /* 40 * This file contains an aggregated module marked: 41 * Copyright (c) 1997, Stefan Esser <se@freebsd.org> 42 * All rights reserved. 43 * See the notice for details. 44 */ 45 46 #include "opt_auto_eoi.h" 47 48 #include "isa.h" 49 50 #include <sys/param.h> 51 #ifndef SMP 52 #include <machine/lock.h> 53 #endif 54 #include <sys/systm.h> 55 #include <sys/syslog.h> 56 #include <sys/malloc.h> 57 #include <sys/errno.h> 58 #include <sys/interrupt.h> 59 #include <machine/ipl.h> 60 #include <machine/md_var.h> 61 #include <machine/segments.h> 62 #include <sys/bus.h> 63 64 #if defined(APIC_IO) 65 #include <machine/smp.h> 66 #include <machine/smptests.h> /** FAST_HI */ 67 #endif /* APIC_IO */ 68 #ifdef PC98 69 #include <pc98/pc98/pc98.h> 70 #include <pc98/pc98/pc98_machdep.h> 71 #include <pc98/pc98/epsonio.h> 72 #else 73 #include <i386/isa/isa.h> 74 #endif 75 #include <i386/isa/icu.h> 76 77 #if NISA > 0 78 #include <isa/isavar.h> 79 #endif 80 #include <i386/isa/intr_machdep.h> 81 #include <sys/interrupt.h> 82 #ifdef APIC_IO 83 #include <machine/clock.h> 84 #endif 85 86 #include "mca.h" 87 #if NMCA > 0 88 #include <i386/isa/mca_machdep.h> 89 #endif 90 91 /* XXX should be in suitable include files */ 92 #ifdef PC98 93 #define ICU_IMR_OFFSET 2 /* IO_ICU{1,2} + 2 */ 94 #define ICU_SLAVEID 7 95 #else 96 #define ICU_IMR_OFFSET 1 /* IO_ICU{1,2} + 1 */ 97 #define ICU_SLAVEID 2 98 #endif 99 100 #ifdef APIC_IO 101 /* 102 * This is to accommodate "mixed-mode" programming for 103 * motherboards that don't connect the 8254 to the IO APIC. 104 */ 105 #define AUTO_EOI_1 1 106 #endif 107 108 #define NR_INTRNAMES (1 + ICU_LEN + 2 * ICU_LEN) 109 110 u_long *intr_countp[ICU_LEN]; 111 inthand2_t *intr_handler[ICU_LEN]; 112 u_int intr_mask[ICU_LEN]; 113 static u_int* intr_mptr[ICU_LEN]; 114 void *intr_unit[ICU_LEN]; 115 116 static inthand_t *fastintr[ICU_LEN] = { 117 &IDTVEC(fastintr0), &IDTVEC(fastintr1), 118 &IDTVEC(fastintr2), &IDTVEC(fastintr3), 119 &IDTVEC(fastintr4), &IDTVEC(fastintr5), 120 &IDTVEC(fastintr6), &IDTVEC(fastintr7), 121 &IDTVEC(fastintr8), &IDTVEC(fastintr9), 122 &IDTVEC(fastintr10), &IDTVEC(fastintr11), 123 &IDTVEC(fastintr12), &IDTVEC(fastintr13), 124 &IDTVEC(fastintr14), &IDTVEC(fastintr15), 125 #if defined(APIC_IO) 126 &IDTVEC(fastintr16), &IDTVEC(fastintr17), 127 &IDTVEC(fastintr18), &IDTVEC(fastintr19), 128 &IDTVEC(fastintr20), &IDTVEC(fastintr21), 129 &IDTVEC(fastintr22), &IDTVEC(fastintr23), 130 #endif /* APIC_IO */ 131 }; 132 133 static inthand_t *slowintr[ICU_LEN] = { 134 &IDTVEC(intr0), &IDTVEC(intr1), &IDTVEC(intr2), &IDTVEC(intr3), 135 &IDTVEC(intr4), &IDTVEC(intr5), &IDTVEC(intr6), &IDTVEC(intr7), 136 &IDTVEC(intr8), &IDTVEC(intr9), &IDTVEC(intr10), &IDTVEC(intr11), 137 &IDTVEC(intr12), &IDTVEC(intr13), &IDTVEC(intr14), &IDTVEC(intr15), 138 #if defined(APIC_IO) 139 &IDTVEC(intr16), &IDTVEC(intr17), &IDTVEC(intr18), &IDTVEC(intr19), 140 &IDTVEC(intr20), &IDTVEC(intr21), &IDTVEC(intr22), &IDTVEC(intr23), 141 #endif /* APIC_IO */ 142 }; 143 144 static inthand2_t isa_strayintr; 145 static void init_i8259(void); 146 147 #ifdef PC98 148 #define NMI_PARITY 0x04 149 #define NMI_EPARITY 0x02 150 #else 151 #define NMI_PARITY (1 << 7) 152 #define NMI_IOCHAN (1 << 6) 153 #define ENMI_WATCHDOG (1 << 7) 154 #define ENMI_BUSTIMER (1 << 6) 155 #define ENMI_IOSTATUS (1 << 5) 156 #endif 157 158 /* 159 * Handle a NMI, possibly a machine check. 160 * return true to panic system, false to ignore. 161 */ 162 int 163 isa_nmi(cd) 164 int cd; 165 { 166 int retval = 0; 167 #ifdef PC98 168 int port = inb(0x33); 169 170 log(LOG_CRIT, "NMI PC98 port = %x\n", port); 171 if (epson_machine_id == 0x20) 172 epson_outb(0xc16, epson_inb(0xc16) | 0x1); 173 if (port & NMI_PARITY) { 174 log(LOG_CRIT, "BASE RAM parity error, likely hardware failure."); 175 retval = 1; 176 } else if (port & NMI_EPARITY) { 177 log(LOG_CRIT, "EXTENDED RAM parity error, likely hardware failure."); 178 retval = 1; 179 } else { 180 log(LOG_CRIT, "\nNMI Resume ??\n"); 181 } 182 #else /* IBM-PC */ 183 int isa_port = inb(0x61); 184 int eisa_port = inb(0x461); 185 186 log(LOG_CRIT, "NMI ISA %x, EISA %x\n", isa_port, eisa_port); 187 #if NMCA > 0 188 if (MCA_system && mca_bus_nmi()) 189 return(0); 190 #endif 191 192 if (isa_port & NMI_PARITY) { 193 log(LOG_CRIT, "RAM parity error, likely hardware failure."); 194 retval = 1; 195 } 196 197 if (isa_port & NMI_IOCHAN) { 198 log(LOG_CRIT, "I/O channel check, likely hardware failure."); 199 retval = 1; 200 } 201 202 /* 203 * On a real EISA machine, this will never happen. However it can 204 * happen on ISA machines which implement XT style floating point 205 * error handling (very rare). Save them from a meaningless panic. 206 */ 207 if (eisa_port == 0xff) 208 return(retval); 209 210 if (eisa_port & ENMI_WATCHDOG) { 211 log(LOG_CRIT, "EISA watchdog timer expired, likely hardware failure."); 212 retval = 1; 213 } 214 215 if (eisa_port & ENMI_BUSTIMER) { 216 log(LOG_CRIT, "EISA bus timeout, likely hardware failure."); 217 retval = 1; 218 } 219 220 if (eisa_port & ENMI_IOSTATUS) { 221 log(LOG_CRIT, "EISA I/O port status error."); 222 retval = 1; 223 } 224 #endif 225 return(retval); 226 } 227 228 /* 229 * ICU reinitialize when ICU configuration has lost. 230 */ 231 void 232 icu_reinit() 233 { 234 int i; 235 236 init_i8259(); 237 for(i=0;i<ICU_LEN;i++) 238 if(intr_handler[i] != isa_strayintr) 239 INTREN(1<<i); 240 } 241 /* 242 * Fill in default interrupt table (in case of spuruious interrupt 243 * during configuration of kernel, setup interrupt control unit 244 */ 245 void 246 isa_defaultirq() 247 { 248 int i; 249 250 /* icu vectors */ 251 for (i = 0; i < ICU_LEN; i++) 252 icu_unset(i, (inthand2_t *)NULL); 253 init_i8259(); 254 } 255 256 static void 257 init_i8259(void) 258 { 259 /* initialize 8259's */ 260 #if NMCA > 0 261 if (MCA_system) 262 outb(IO_ICU1, 0x19); /* reset; program device, four bytes */ 263 else 264 #endif 265 outb(IO_ICU1, 0x11); /* reset; program device, four bytes */ 266 267 outb(IO_ICU1+ICU_IMR_OFFSET, NRSVIDT); /* starting at this vector index */ 268 outb(IO_ICU1+ICU_IMR_OFFSET, IRQ_SLAVE); /* slave on line 7 */ 269 #ifdef PC98 270 #ifdef AUTO_EOI_1 271 outb(IO_ICU1+ICU_IMR_OFFSET, 0x1f); /* (master) auto EOI, 8086 mode */ 272 #else 273 outb(IO_ICU1+ICU_IMR_OFFSET, 0x1d); /* (master) 8086 mode */ 274 #endif 275 #else /* IBM-PC */ 276 #ifdef AUTO_EOI_1 277 outb(IO_ICU1+ICU_IMR_OFFSET, 2 | 1); /* auto EOI, 8086 mode */ 278 #else 279 outb(IO_ICU1+ICU_IMR_OFFSET, 1); /* 8086 mode */ 280 #endif 281 #endif /* PC98 */ 282 outb(IO_ICU1+ICU_IMR_OFFSET, 0xff); /* leave interrupts masked */ 283 outb(IO_ICU1, 0x0a); /* default to IRR on read */ 284 #ifndef PC98 285 outb(IO_ICU1, 0xc0 | (3 - 1)); /* pri order 3-7, 0-2 (com2 first) */ 286 #endif /* !PC98 */ 287 288 #if NMCA > 0 289 if (MCA_system) 290 outb(IO_ICU2, 0x19); /* reset; program device, four bytes */ 291 else 292 #endif 293 outb(IO_ICU2, 0x11); /* reset; program device, four bytes */ 294 295 outb(IO_ICU2+ICU_IMR_OFFSET, NRSVIDT+8); /* staring at this vector index */ 296 outb(IO_ICU2+ICU_IMR_OFFSET, ICU_SLAVEID); /* my slave id is 7 */ 297 #ifdef PC98 298 outb(IO_ICU2+ICU_IMR_OFFSET,9); /* 8086 mode */ 299 #else /* IBM-PC */ 300 #ifdef AUTO_EOI_2 301 outb(IO_ICU2+ICU_IMR_OFFSET, 2 | 1); /* auto EOI, 8086 mode */ 302 #else 303 outb(IO_ICU2+ICU_IMR_OFFSET,1); /* 8086 mode */ 304 #endif 305 #endif /* PC98 */ 306 outb(IO_ICU2+ICU_IMR_OFFSET, 0xff); /* leave interrupts masked */ 307 outb(IO_ICU2, 0x0a); /* default to IRR on read */ 308 } 309 310 /* 311 * Caught a stray interrupt, notify 312 */ 313 static void 314 isa_strayintr(vcookiep) 315 void *vcookiep; 316 { 317 int intr = (void **)vcookiep - &intr_unit[0]; 318 319 /* DON'T BOTHER FOR NOW! */ 320 /* for some reason, we get bursts of intr #7, even if not enabled! */ 321 /* 322 * Well the reason you got bursts of intr #7 is because someone 323 * raised an interrupt line and dropped it before the 8259 could 324 * prioritize it. This is documented in the intel data book. This 325 * means you have BAD hardware! I have changed this so that only 326 * the first 5 get logged, then it quits logging them, and puts 327 * out a special message. rgrimes 3/25/1993 328 */ 329 /* 330 * XXX TODO print a different message for #7 if it is for a 331 * glitch. Glitches can be distinguished from real #7's by 332 * testing that the in-service bit is _not_ set. The test 333 * must be done before sending an EOI so it can't be done if 334 * we are using AUTO_EOI_1. 335 */ 336 if (intrcnt[1 + intr] <= 5) 337 log(LOG_ERR, "stray irq %d\n", intr); 338 if (intrcnt[1 + intr] == 5) 339 log(LOG_CRIT, 340 "too many stray irq %d's; not logging any more\n", intr); 341 } 342 343 #if NISA > 0 344 /* 345 * Return a bitmap of the current interrupt requests. This is 8259-specific 346 * and is only suitable for use at probe time. 347 */ 348 intrmask_t 349 isa_irq_pending() 350 { 351 u_char irr1; 352 u_char irr2; 353 354 irr1 = inb(IO_ICU1); 355 irr2 = inb(IO_ICU2); 356 return ((irr2 << 8) | irr1); 357 } 358 #endif 359 360 int 361 update_intr_masks(void) 362 { 363 int intr, n=0; 364 u_int mask,*maskptr; 365 366 for (intr=0; intr < ICU_LEN; intr ++) { 367 #if defined(APIC_IO) 368 /* no 8259 SLAVE to ignore */ 369 #else 370 if (intr==ICU_SLAVEID) continue; /* ignore 8259 SLAVE output */ 371 #endif /* APIC_IO */ 372 maskptr = intr_mptr[intr]; 373 if (!maskptr) 374 continue; 375 *maskptr |= SWI_CLOCK_MASK | (1 << intr); 376 mask = *maskptr; 377 if (mask != intr_mask[intr]) { 378 #if 0 379 printf ("intr_mask[%2d] old=%08x new=%08x ptr=%p.\n", 380 intr, intr_mask[intr], mask, maskptr); 381 #endif 382 intr_mask[intr]=mask; 383 n++; 384 } 385 386 } 387 return (n); 388 } 389 390 static void 391 update_intrname(int intr, char *name) 392 { 393 char buf[32]; 394 char *cp; 395 int name_index, off, strayintr; 396 397 /* 398 * Initialise strings for bitbucket and stray interrupt counters. 399 * These have statically allocated indices 0 and 1 through ICU_LEN. 400 */ 401 if (intrnames[0] == '\0') { 402 off = sprintf(intrnames, "???") + 1; 403 for (strayintr = 0; strayintr < ICU_LEN; strayintr++) 404 off += sprintf(intrnames + off, "stray irq%d", 405 strayintr) + 1; 406 } 407 408 if (name == NULL) 409 name = "???"; 410 if (snprintf(buf, sizeof(buf), "%s irq%d", name, intr) >= sizeof(buf)) 411 goto use_bitbucket; 412 413 /* 414 * Search for `buf' in `intrnames'. In the usual case when it is 415 * not found, append it to the end if there is enough space (the \0 416 * terminator for the previous string, if any, becomes a separator). 417 */ 418 for (cp = intrnames, name_index = 0; 419 cp != eintrnames && name_index < NR_INTRNAMES; 420 cp += strlen(cp) + 1, name_index++) { 421 if (*cp == '\0') { 422 if (strlen(buf) >= eintrnames - cp) 423 break; 424 strcpy(cp, buf); 425 goto found; 426 } 427 if (strcmp(cp, buf) == 0) 428 goto found; 429 } 430 431 use_bitbucket: 432 printf("update_intrname: counting %s irq%d as %s\n", name, intr, 433 intrnames); 434 name_index = 0; 435 found: 436 intr_countp[intr] = &intrcnt[name_index]; 437 } 438 439 int 440 icu_setup(int intr, inthand2_t *handler, void *arg, u_int *maskptr, int flags) 441 { 442 #ifdef FAST_HI 443 int select; /* the select register is 8 bits */ 444 int vector; 445 u_int32_t value; /* the window register is 32 bits */ 446 #endif /* FAST_HI */ 447 u_long ef; 448 u_int mask = (maskptr ? *maskptr : 0); 449 450 #if defined(APIC_IO) 451 if ((u_int)intr >= ICU_LEN) /* no 8259 SLAVE to ignore */ 452 #else 453 if ((u_int)intr >= ICU_LEN || intr == ICU_SLAVEID) 454 #endif /* APIC_IO */ 455 if (intr_handler[intr] != isa_strayintr) 456 return (EBUSY); 457 458 ef = read_eflags(); 459 disable_intr(); 460 intr_handler[intr] = handler; 461 intr_mptr[intr] = maskptr; 462 intr_mask[intr] = mask | SWI_CLOCK_MASK | (1 << intr); 463 intr_unit[intr] = arg; 464 #ifdef FAST_HI 465 if (flags & INTR_FAST) { 466 vector = TPR_FAST_INTS + intr; 467 setidt(vector, fastintr[intr], 468 SDT_SYS386IGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); 469 } 470 else { 471 vector = TPR_SLOW_INTS + intr; 472 #ifdef APIC_INTR_REORDER 473 #ifdef APIC_INTR_HIGHPRI_CLOCK 474 /* XXX: Hack (kludge?) for more accurate clock. */ 475 if (intr == apic_8254_intr || intr == 8) { 476 vector = TPR_FAST_INTS + intr; 477 } 478 #endif 479 #endif 480 setidt(vector, slowintr[intr], 481 SDT_SYS386IGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); 482 } 483 #ifdef APIC_INTR_REORDER 484 set_lapic_isrloc(intr, vector); 485 #endif 486 /* 487 * Reprogram the vector in the IO APIC. 488 */ 489 if (int_to_apicintpin[intr].ioapic >= 0) { 490 select = int_to_apicintpin[intr].redirindex; 491 value = io_apic_read(int_to_apicintpin[intr].ioapic, 492 select) & ~IOART_INTVEC; 493 io_apic_write(int_to_apicintpin[intr].ioapic, 494 select, value | vector); 495 } 496 #else 497 setidt(ICU_OFFSET + intr, 498 flags & INTR_FAST ? fastintr[intr] : slowintr[intr], 499 SDT_SYS386IGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); 500 #endif /* FAST_HI */ 501 INTREN(1 << intr); 502 MPINTR_UNLOCK(); 503 write_eflags(ef); 504 return (0); 505 } 506 507 int 508 icu_unset(intr, handler) 509 int intr; 510 inthand2_t *handler; 511 { 512 u_long ef; 513 514 if ((u_int)intr >= ICU_LEN || handler != intr_handler[intr]) 515 return (EINVAL); 516 517 INTRDIS(1 << intr); 518 ef = read_eflags(); 519 disable_intr(); 520 intr_countp[intr] = &intrcnt[1 + intr]; 521 intr_handler[intr] = isa_strayintr; 522 intr_mptr[intr] = NULL; 523 intr_mask[intr] = HWI_MASK | SWI_MASK; 524 intr_unit[intr] = &intr_unit[intr]; 525 #ifdef FAST_HI_XXX 526 /* XXX how do I re-create dvp here? */ 527 setidt(flags & INTR_FAST ? TPR_FAST_INTS + intr : TPR_SLOW_INTS + intr, 528 slowintr[intr], SDT_SYS386IGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); 529 #else /* FAST_HI */ 530 #ifdef APIC_INTR_REORDER 531 set_lapic_isrloc(intr, ICU_OFFSET + intr); 532 #endif 533 setidt(ICU_OFFSET + intr, slowintr[intr], SDT_SYS386IGT, SEL_KPL, 534 GSEL(GCODE_SEL, SEL_KPL)); 535 #endif /* FAST_HI */ 536 MPINTR_UNLOCK(); 537 write_eflags(ef); 538 return (0); 539 } 540 541 /* The following notice applies beyond this point in the file */ 542 543 /* 544 * Copyright (c) 1997, Stefan Esser <se@freebsd.org> 545 * All rights reserved. 546 * 547 * Redistribution and use in source and binary forms, with or without 548 * modification, are permitted provided that the following conditions 549 * are met: 550 * 1. Redistributions of source code must retain the above copyright 551 * notice unmodified, this list of conditions, and the following 552 * disclaimer. 553 * 2. Redistributions in binary form must reproduce the above copyright 554 * notice, this list of conditions and the following disclaimer in the 555 * documentation and/or other materials provided with the distribution. 556 * 557 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 558 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 559 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 560 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 561 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 562 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 563 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 564 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 565 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 566 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 567 * 568 * $FreeBSD$ 569 * 570 */ 571 572 typedef struct intrec { 573 intrmask_t mask; 574 inthand2_t *handler; 575 void *argument; 576 struct intrec *next; 577 char *name; 578 int intr; 579 intrmask_t *maskptr; 580 int flags; 581 } intrec; 582 583 static intrec *intreclist_head[ICU_LEN]; 584 585 /* 586 * The interrupt multiplexer calls each of the handlers in turn. The 587 * ipl is initially quite low. It is raised as necessary for each call 588 * and lowered after the call. Thus out of order handling is possible 589 * even for interrupts of the same type. This is probably no more 590 * harmful than out of order handling in general (not harmful except 591 * for real time response which we don't support anyway). 592 */ 593 static void 594 intr_mux(void *arg) 595 { 596 intrec *p; 597 intrmask_t oldspl; 598 599 for (p = arg; p != NULL; p = p->next) { 600 oldspl = splq(p->mask); 601 p->handler(p->argument); 602 splx(oldspl); 603 } 604 } 605 606 static intrec* 607 find_idesc(unsigned *maskptr, int irq) 608 { 609 intrec *p = intreclist_head[irq]; 610 611 while (p && p->maskptr != maskptr) 612 p = p->next; 613 614 return (p); 615 } 616 617 static intrec** 618 find_pred(intrec *idesc, int irq) 619 { 620 intrec **pp = &intreclist_head[irq]; 621 intrec *p = *pp; 622 623 while (p != idesc) { 624 if (p == NULL) 625 return (NULL); 626 pp = &p->next; 627 p = *pp; 628 } 629 return (pp); 630 } 631 632 /* 633 * Both the low level handler and the shared interrupt multiplexer 634 * block out further interrupts as set in the handlers "mask", while 635 * the handler is running. In fact *maskptr should be used for this 636 * purpose, but since this requires one more pointer dereference on 637 * each interrupt, we rather bother update "mask" whenever *maskptr 638 * changes. The function "update_masks" should be called **after** 639 * all manipulation of the linked list of interrupt handlers hung 640 * off of intrdec_head[irq] is complete, since the chain of handlers 641 * will both determine the *maskptr values and the instances of mask 642 * that are fixed. This function should be called with the irq for 643 * which a new handler has been add blocked, since the masks may not 644 * yet know about the use of this irq for a device of a certain class. 645 */ 646 647 static void 648 update_mux_masks(void) 649 { 650 int irq; 651 for (irq = 0; irq < ICU_LEN; irq++) { 652 intrec *idesc = intreclist_head[irq]; 653 while (idesc != NULL) { 654 if (idesc->maskptr != NULL) { 655 /* our copy of *maskptr may be stale, refresh */ 656 idesc->mask = *idesc->maskptr; 657 } 658 idesc = idesc->next; 659 } 660 } 661 } 662 663 static void 664 update_masks(intrmask_t *maskptr, int irq) 665 { 666 intrmask_t mask = 1 << irq; 667 668 if (maskptr == NULL) 669 return; 670 671 if (find_idesc(maskptr, irq) == NULL) { 672 /* no reference to this maskptr was found in this irq's chain */ 673 *maskptr &= ~mask; 674 } else { 675 /* a reference to this maskptr was found in this irq's chain */ 676 *maskptr |= mask; 677 } 678 /* we need to update all values in the intr_mask[irq] array */ 679 update_intr_masks(); 680 /* update mask in chains of the interrupt multiplex handler as well */ 681 update_mux_masks(); 682 } 683 684 /* 685 * Add interrupt handler to linked list hung off of intreclist_head[irq] 686 * and install shared interrupt multiplex handler, if necessary 687 */ 688 689 static int 690 add_intrdesc(intrec *idesc) 691 { 692 int irq = idesc->intr; 693 694 intrec *head = intreclist_head[irq]; 695 696 if (head == NULL) { 697 /* first handler for this irq, just install it */ 698 if (icu_setup(irq, idesc->handler, idesc->argument, 699 idesc->maskptr, idesc->flags) != 0) 700 return (-1); 701 702 update_intrname(irq, idesc->name); 703 /* keep reference */ 704 intreclist_head[irq] = idesc; 705 } else { 706 if ((idesc->flags & INTR_EXCL) != 0 707 || (head->flags & INTR_EXCL) != 0) { 708 /* 709 * can't append new handler, if either list head or 710 * new handler do not allow interrupts to be shared 711 */ 712 if (bootverbose) 713 printf("\tdevice combination doesn't support " 714 "shared irq%d\n", irq); 715 return (-1); 716 } 717 if (head->next == NULL) { 718 /* 719 * second handler for this irq, replace device driver's 720 * handler by shared interrupt multiplexer function 721 */ 722 icu_unset(irq, head->handler); 723 if (icu_setup(irq, intr_mux, head, 0, 0) != 0) 724 return (-1); 725 if (bootverbose) 726 printf("\tusing shared irq%d.\n", irq); 727 update_intrname(irq, "mux"); 728 } 729 /* just append to the end of the chain */ 730 while (head->next != NULL) 731 head = head->next; 732 head->next = idesc; 733 } 734 update_masks(idesc->maskptr, irq); 735 return (0); 736 } 737 738 /* 739 * Create and activate an interrupt handler descriptor data structure. 740 * 741 * The dev_instance pointer is required for resource management, and will 742 * only be passed through to resource_claim(). 743 * 744 * There will be functions that derive a driver and unit name from a 745 * dev_instance variable, and those functions will be used to maintain the 746 * interrupt counter label array referenced by systat and vmstat to report 747 * device interrupt rates (->update_intrlabels). 748 * 749 * Add the interrupt handler descriptor data structure created by an 750 * earlier call of create_intr() to the linked list for its irq and 751 * adjust the interrupt masks if necessary. 752 * 753 * WARNING: This is an internal function and not to be used by device 754 * drivers. It is subject to change without notice. 755 */ 756 757 intrec * 758 inthand_add(const char *name, int irq, inthand2_t handler, void *arg, 759 intrmask_t *maskptr, int flags) 760 { 761 intrec *idesc; 762 int errcode = -1; 763 intrmask_t oldspl; 764 765 if (ICU_LEN > 8 * sizeof *maskptr) { 766 printf("create_intr: ICU_LEN of %d too high for %d bit intrmask\n", 767 ICU_LEN, 8 * sizeof *maskptr); 768 return (NULL); 769 } 770 if ((unsigned)irq >= ICU_LEN) { 771 printf("create_intr: requested irq%d too high, limit is %d\n", 772 irq, ICU_LEN -1); 773 return (NULL); 774 } 775 776 idesc = malloc(sizeof *idesc, M_DEVBUF, M_WAITOK); 777 if (idesc == NULL) 778 return NULL; 779 bzero(idesc, sizeof *idesc); 780 781 if (name == NULL) 782 name = "???"; 783 idesc->name = malloc(strlen(name) + 1, M_DEVBUF, M_WAITOK); 784 if (idesc->name == NULL) { 785 free(idesc, M_DEVBUF); 786 return NULL; 787 } 788 strcpy(idesc->name, name); 789 790 idesc->handler = handler; 791 idesc->argument = arg; 792 idesc->maskptr = maskptr; 793 idesc->intr = irq; 794 idesc->flags = flags; 795 796 /* block this irq */ 797 oldspl = splq(1 << irq); 798 799 /* add irq to class selected by maskptr */ 800 errcode = add_intrdesc(idesc); 801 splx(oldspl); 802 803 if (errcode != 0) { 804 if (bootverbose) 805 printf("\tintr_connect(irq%d) failed, result=%d\n", 806 irq, errcode); 807 free(idesc->name, M_DEVBUF); 808 free(idesc, M_DEVBUF); 809 idesc = NULL; 810 } 811 812 return (idesc); 813 } 814 815 /* 816 * Deactivate and remove the interrupt handler descriptor data connected 817 * created by an earlier call of intr_connect() from the linked list and 818 * adjust theinterrupt masks if necessary. 819 * 820 * Return the memory held by the interrupt handler descriptor data structure 821 * to the system. Make sure, the handler is not actively used anymore, before. 822 */ 823 824 int 825 inthand_remove(intrec *idesc) 826 { 827 intrec **hook, *head; 828 int irq; 829 int errcode = 0; 830 intrmask_t oldspl; 831 832 if (idesc == NULL) 833 return (-1); 834 835 irq = idesc->intr; 836 837 /* find pointer that keeps the reference to this interrupt descriptor */ 838 hook = find_pred(idesc, irq); 839 if (hook == NULL) 840 return (-1); 841 842 /* make copy of original list head, the line after may overwrite it */ 843 head = intreclist_head[irq]; 844 845 /* unlink: make predecessor point to idesc->next instead of to idesc */ 846 *hook = idesc->next; 847 848 /* now check whether the element we removed was the list head */ 849 if (idesc == head) { 850 851 oldspl = splq(1 << irq); 852 853 /* check whether the new list head is the only element on list */ 854 head = intreclist_head[irq]; 855 if (head != NULL) { 856 icu_unset(irq, intr_mux); 857 if (head->next != NULL) { 858 /* install the multiplex handler with new list head as argument */ 859 errcode = icu_setup(irq, intr_mux, head, 0, 0); 860 if (errcode == 0) 861 update_intrname(irq, NULL); 862 } else { 863 /* install the one remaining handler for this irq */ 864 errcode = icu_setup(irq, head->handler, 865 head->argument, 866 head->maskptr, head->flags); 867 if (errcode == 0) 868 update_intrname(irq, head->name); 869 } 870 } else { 871 /* revert to old handler, eg: strayintr */ 872 icu_unset(irq, idesc->handler); 873 } 874 splx(oldspl); 875 } 876 update_masks(idesc->maskptr, irq); 877 free(idesc, M_DEVBUF); 878 return (0); 879 }
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