FreeBSD/Linux Kernel Cross Reference
sys/i386/isa/pnp.h
1 /*
2 * Copyright (c) 1996, Sujal M. Patel
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * 3. All advertising materials mentioning features or use of this software
14 * must display the following acknowledgement:
15 * This product includes software developed by Sujal M. Patel
16 * 4. Neither the name of the author nor the names of any co-contributors
17 * may be used to endorse or promote products derived from this software
18 * without specific prior written permission.
19 *
20 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
21 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
22 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
23 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
24 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
25 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
26 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
27 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
28 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
29 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
30 * SUCH DAMAGE.
31 *
32 * $FreeBSD$
33 */
34
35 #ifndef _I386_ISA_PNP_H_
36 #define _I386_ISA_PNP_H_
37
38 /* Maximum Number of PnP Devices. 8 should be plenty */
39 #define MAX_PNP_CARDS 8
40 /*
41 * the following is the maximum number of PnP Logical devices that
42 * userconfig can handle.
43 */
44 #define MAX_PNP_LDN 20
45
46 /* Static ports to access PnP state machine */
47 #if defined(PC98) && defined(KERNEL)
48 /* pnp.h is included from pnpinfo.c. */
49 #define _PNP_ADDRESS 0x259
50 #define _PNP_WRITE_DATA 0xa59
51 #else
52 #define _PNP_ADDRESS 0x279
53 #define _PNP_WRITE_DATA 0xa79
54 #endif
55
56 /* PnP Registers. Write to ADDRESS and then use WRITE/READ_DATA */
57 #define SET_RD_DATA 0x00
58 /***
59 Writing to this location modifies the address of the port used for
60 reading from the Plug and Play ISA cards. Bits[7:0] become I/O
61 read port address bits[9:2]. Reads from this register are ignored.
62 ***/
63
64 #define SERIAL_ISOLATION 0x01
65 /***
66 A read to this register causes a Plug and Play cards in the Isolation
67 state to compare one bit of the boards ID.
68 This register is read only.
69 ***/
70
71 #define CONFIG_CONTROL 0x02
72 /***
73 Bit[2] Reset CSN to 0
74 Bit[1] Return to the Wait for Key state
75 Bit[0] Reset all logical devices and restore configuration
76 registers to their power-up values.
77
78 A write to bit[0] of this register performs a reset function on
79 all logical devices. This resets the contents of configuration
80 registers to their default state. All card's logical devices
81 enter their default state and the CSN is preserved.
82
83 A write to bit[1] of this register causes all cards to enter the
84 Wait for Key state but all CSNs are preserved and logical devices
85 are not affected.
86
87 A write to bit[2] of this register causes all cards to reset their
88 CSN to zero .
89
90 This register is write-only. The values are not sticky, that is,
91 hardware will automatically clear them and there is no need for
92 software to clear the bits.
93 ***/
94
95 #define WAKE 0x03
96 /***
97 A write to this port will cause all cards that have a CSN that
98 matches the write data[7:0] to go from the Sleep state to the either
99 the Isolation state if the write data for this command is zero or
100 the Config state if the write data is not zero. Additionally, the
101 pointer to the byte-serial device is reset. This register is
102 writeonly.
103 ***/
104
105 #define RESOURCE_DATA 0x04
106 /***
107 A read from this address reads the next byte of resource information.
108 The Status register must be polled until bit[0] is set before this
109 register may be read. This register is read only.
110 ***/
111
112 #define STATUS 0x05
113 /***
114 Bit[0] when set indicates it is okay to read the next data byte
115 from the Resource Data register. This register is readonly.
116 ***/
117
118 #define SET_CSN 0x06
119 /***
120 A write to this port sets a card's CSN. The CSN is a value uniquely
121 assigned to each ISA card after the serial identification process
122 so that each card may be individually selected during a Wake[CSN]
123 command. This register is read/write.
124 ***/
125
126 #define SET_LDN 0x07
127 /***
128 Selects the current logical device. All reads and writes of memory,
129 I/O, interrupt and DMA configuration information access the registers
130 of the logical device written here. In addition, the I/O Range
131 Check and Activate commands operate only on the selected logical
132 device. This register is read/write. If a card has only 1 logical
133 device, this location should be a read-only value of 0x00.
134 ***/
135
136 /*** addresses 0x08 - 0x1F Card Level Reserved for future use ***/
137 /*** addresses 0x20 - 0x2F Card Level, Vendor Defined ***/
138
139 #define ACTIVATE 0x30
140 /***
141 For each logical device there is one activate register that controls
142 whether or not the logical device is active on the ISA bus. Bit[0],
143 if set, activates the logical device. Bits[7:1] are reserved and
144 must return 0 on reads. This is a read/write register. Before a
145 logical device is activated, I/O range check must be disabled.
146 ***/
147
148 #define IO_RANGE_CHECK 0x31
149 /***
150 This register is used to perform a conflict check on the I/O port
151 range programmed for use by a logical device.
152
153 Bit[7:2] Reserved and must return 0 on reads
154 Bit[1] Enable I/O Range check, if set then I/O Range Check
155 is enabled. I/O range check is only valid when the logical
156 device is inactive.
157
158 Bit[0], if set, forces the logical device to respond to I/O reads
159 of the logical device's assigned I/O range with a 0x55 when I/O
160 range check is in operation. If clear, the logical device drives
161 0xAA. This register is read/write.
162 ***/
163
164 /*** addr 0x32 - 0x37 Logical Device Control Reserved for future use ***/
165 /*** addr 0x38 - 0x3F Logical Device Control Vendor Define ***/
166
167 #define MEM_CONFIG 0x40
168 /***
169 Four memory resource registers per range, four ranges.
170 Fill with 0 if no ranges are enabled.
171
172 Offset 0: RW Memory base address bits[23:16]
173 Offset 1: RW Memory base address bits[15:8]
174 Offset 2: Memory control
175 Bit[1] specifies 8/16-bit control. This bit is set to indicate
176 16-bit memory, and cleared to indicate 8-bit memory.
177 Bit[0], if cleared, indicates the next field can be used as a range
178 length for decode (implies range length and base alignment of memory
179 descriptor are equal).
180 Bit[0], if set, indicates the next field is the upper limit for
181 the address. - - Bit[0] is read-only.
182 Offset 3: RW upper limit or range len, bits[23:16]
183 Offset 4: RW upper limit or range len, bits[15:8]
184 Offset 5-Offset 7: filler, unused.
185 ***/
186
187 #define IO_CONFIG_BASE 0x60
188 /***
189 Eight ranges, two bytes per range.
190 Offset 0: I/O port base address bits[15:8]
191 Offset 1: I/O port base address bits[7:0]
192 ***/
193
194 #define IRQ_CONFIG 0x70
195 /***
196 Two entries, two bytes per entry.
197 Offset 0: RW interrupt level (1..15, 0=unused).
198 Offset 1: Bit[1]: level(1:hi, 0:low),
199 Bit[0]: type (1:level, 0:edge)
200 byte 1 can be readonly if 1 type of int is used.
201 ***/
202
203 #define DRQ_CONFIG 0x74
204 /***
205 Two entries, one byte per entry. Bits[2:0] select
206 which DMA channel is in use for DMA 0. Zero selects DMA channel
207 0, seven selects DMA channel 7. DMA channel 4, the cascade channel
208 is used to indicate no DMA channel is active.
209 ***/
210
211 /*** 32-bit memory accesses are at 0x76 ***/
212
213 /* Macros to parse Resource IDs */
214 #define PNP_RES_TYPE(a) (a >> 7)
215 #define PNP_SRES_NUM(a) (a >> 3)
216 #define PNP_SRES_LEN(a) (a & 0x07)
217 #define PNP_LRES_NUM(a) (a & 0x7f)
218
219 /* Small Resource Item names */
220 #define PNP_VERSION 0x1
221 #define LOG_DEVICE_ID 0x2
222 #define COMP_DEVICE_ID 0x3
223 #define IRQ_FORMAT 0x4
224 #define DMA_FORMAT 0x5
225 #define START_DEPEND_FUNC 0x6
226 #define END_DEPEND_FUNC 0x7
227 #define IO_PORT_DESC 0x8
228 #define FIXED_IO_PORT_DESC 0x9
229 #define SM_RES_RESERVED 0xa-0xd
230 #define SM_VENDOR_DEFINED 0xe
231 #define END_TAG 0xf
232
233 /* Large Resource Item names */
234 #define MEMORY_RANGE_DESC 0x1
235 #define ID_STRING_ANSI 0x2
236 #define ID_STRING_UNICODE 0x3
237 #define LG_VENDOR_DEFINED 0x4
238 #define _32BIT_MEM_RANGE_DESC 0x5
239 #define _32BIT_FIXED_LOC_DESC 0x6
240 #define LG_RES_RESERVED 0x7-0x7f
241
242 /*
243 * pnp_cinfo contains Configuration Information. They are used
244 * to communicate to the device driver the actual configuration
245 * of the device, and also by the userconfig menu to let the
246 * operating system override any configuration set by the bios.
247 *
248 */
249 struct pnp_cinfo {
250 u_int vendor_id; /* board id */
251 u_int serial; /* Board's Serial Number */
252 u_long flags; /* OS-reserved flags */
253 u_char csn; /* assigned Card Select Number */
254 u_char ldn; /* Logical Device Number */
255 u_char enable; /* pnp enable */
256 u_char override; /* override bios parms (in userconfig) */
257 u_char irq[2]; /* IRQ Number */
258 u_char irq_type[2]; /* IRQ Type */
259 u_char drq[2];
260 u_short port[8]; /* The Base Address of the Port */
261 struct {
262 u_long base; /* Memory Base Address */
263 int control; /* Memory Control Register */
264 u_long range; /* Memory Range *OR* Upper Limit */
265 } mem[4];
266 };
267
268 #ifdef KERNEL
269
270 struct pnp_device {
271 char *pd_name;
272 char * (*pd_probe ) (u_long csn, u_long vendor_id);
273 void (*pd_attach ) (u_long csn, u_long vend_id, char * name,
274 struct isa_device *dev);
275 u_long *pd_count;
276 u_int *imask ;
277 };
278
279 struct pnp_dlist_node {
280 struct pnp_device *pnp;
281 struct isa_device dev;
282 struct pnp_dlist_node *next;
283 };
284
285 /*
286 * Used by userconfig
287 */
288 extern struct pnp_cinfo pnp_ldn_overrides[MAX_PNP_LDN];
289
290 /*
291 * The following definitions are for use in drivers
292 */
293 extern struct linker_set pnpdevice_set;
294
295 typedef struct _pnpid_t {
296 u_long vend_id; /* Not anly a Vendor ID, also a Compatible Device ID */
297 char *id_str;
298 } pnpid_t;
299
300 void pnp_write(int d, u_char r); /* used by Luigi's sound driver */
301 u_char pnp_read(int d); /* currently unused, but who knows... */
302 int read_pnp_parms(struct pnp_cinfo *d, int ldn);
303 int write_pnp_parms(struct pnp_cinfo *d, int ldn);
304 int enable_pnp_card(void);
305
306 /*
307 * used by autoconfigure to actually probe and attach drivers
308 */
309 extern struct pnp_dlist_node *pnp_device_list;
310 void pnp_configure __P((void));
311
312 #endif /* KERNEL */
313
314 #endif /* !_I386_ISA_PNP_H_ */
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