FreeBSD/Linux Kernel Cross Reference
sys/i386/isa/pnp.h
1 /*
2 * Copyright (c) 1996, Sujal M. Patel
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * 3. All advertising materials mentioning features or use of this software
14 * must display the following acknowledgement:
15 * This product includes software developed by Sujal M. Patel
16 * 4. Neither the name of the author nor the names of any co-contributors
17 * may be used to endorse or promote products derived from this software
18 * without specific prior written permission.
19 *
20 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
21 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
22 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
23 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
24 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
25 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
26 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
27 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
28 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
29 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
30 * SUCH DAMAGE.
31 *
32 * $FreeBSD: src/sys/i386/isa/pnp.h,v 1.5.2.3 1999/09/05 08:13:18 peter Exp $
33 */
34
35
36 #ifndef _I386_ISA_PNP_H_
37 #define _I386_ISA_PNP_H_
38
39 /* Maximum Number of PnP Devices. 8 should be plenty */
40 #define MAX_PNP_CARDS 8
41 /*
42 * the following is the maximum number of PnP Logical devices that
43 * userconfig can handle.
44 */
45 #define MAX_PNP_LDN 20
46
47 /* Static ports to access PnP state machine */
48 #if defined(PC98) && defined(KERNEL)
49 /* pnp.h is included from pnpinfo.c. */
50 #define _PNP_ADDRESS 0x259
51 #define _PNP_WRITE_DATA 0xa59
52 #else
53 #define _PNP_ADDRESS 0x279
54 #define _PNP_WRITE_DATA 0xa79
55 #endif
56
57 /* PnP Registers. Write to ADDRESS and then use WRITE/READ_DATA */
58 #define SET_RD_DATA 0x00
59 /***
60 Writing to this location modifies the address of the port used for
61 reading from the Plug and Play ISA cards. Bits[7:0] become I/O
62 read port address bits[9:2]. Reads from this register are ignored.
63 ***/
64
65 #define SERIAL_ISOLATION 0x01
66 /***
67 A read to this register causes a Plug and Play cards in the Isolation
68 state to compare one bit of the boards ID.
69 This register is read only.
70 ***/
71
72 #define CONFIG_CONTROL 0x02
73 /***
74 Bit[2] Reset CSN to 0
75 Bit[1] Return to the Wait for Key state
76 Bit[0] Reset all logical devices and restore configuration
77 registers to their power-up values.
78
79 A write to bit[0] of this register performs a reset function on
80 all logical devices. This resets the contents of configuration
81 registers to their default state. All card's logical devices
82 enter their default state and the CSN is preserved.
83
84 A write to bit[1] of this register causes all cards to enter the
85 Wait for Key state but all CSNs are preserved and logical devices
86 are not affected.
87
88 A write to bit[2] of this register causes all cards to reset their
89 CSN to zero .
90
91 This register is write-only. The values are not sticky, that is,
92 hardware will automatically clear them and there is no need for
93 software to clear the bits.
94 ***/
95
96 #define WAKE 0x03
97 /***
98 A write to this port will cause all cards that have a CSN that
99 matches the write data[7:0] to go from the Sleep state to the either
100 the Isolation state if the write data for this command is zero or
101 the Config state if the write data is not zero. Additionally, the
102 pointer to the byte-serial device is reset. This register is
103 writeonly.
104 ***/
105
106 #define RESOURCE_DATA 0x04
107 /***
108 A read from this address reads the next byte of resource information.
109 The Status register must be polled until bit[0] is set before this
110 register may be read. This register is read only.
111 ***/
112
113 #define STATUS 0x05
114 /***
115 Bit[0] when set indicates it is okay to read the next data byte
116 from the Resource Data register. This register is readonly.
117 ***/
118
119 #define SET_CSN 0x06
120 /***
121 A write to this port sets a card's CSN. The CSN is a value uniquely
122 assigned to each ISA card after the serial identification process
123 so that each card may be individually selected during a Wake[CSN]
124 command. This register is read/write.
125 ***/
126
127 #define SET_LDN 0x07
128 /***
129 Selects the current logical device. All reads and writes of memory,
130 I/O, interrupt and DMA configuration information access the registers
131 of the logical device written here. In addition, the I/O Range
132 Check and Activate commands operate only on the selected logical
133 device. This register is read/write. If a card has only 1 logical
134 device, this location should be a read-only value of 0x00.
135 ***/
136
137 /*** addresses 0x08 - 0x1F Card Level Reserved for future use ***/
138 /*** addresses 0x20 - 0x2F Card Level, Vendor Defined ***/
139
140 #define ACTIVATE 0x30
141 /***
142 For each logical device there is one activate register that controls
143 whether or not the logical device is active on the ISA bus. Bit[0],
144 if set, activates the logical device. Bits[7:1] are reserved and
145 must return 0 on reads. This is a read/write register. Before a
146 logical device is activated, I/O range check must be disabled.
147 ***/
148
149 #define IO_RANGE_CHECK 0x31
150 /***
151 This register is used to perform a conflict check on the I/O port
152 range programmed for use by a logical device.
153
154 Bit[7:2] Reserved and must return 0 on reads
155 Bit[1] Enable I/O Range check, if set then I/O Range Check
156 is enabled. I/O range check is only valid when the logical
157 device is inactive.
158
159 Bit[0], if set, forces the logical device to respond to I/O reads
160 of the logical device's assigned I/O range with a 0x55 when I/O
161 range check is in operation. If clear, the logical device drives
162 0xAA. This register is read/write.
163 ***/
164
165 /*** addr 0x32 - 0x37 Logical Device Control Reserved for future use ***/
166 /*** addr 0x38 - 0x3F Logical Device Control Vendor Define ***/
167
168 #define MEM_CONFIG 0x40
169 /***
170 Four memory resource registers per range, four ranges.
171 Fill with 0 if no ranges are enabled.
172
173 Offset 0: RW Memory base address bits[23:16]
174 Offset 1: RW Memory base address bits[15:8]
175 Offset 2: Memory control
176 Bit[1] specifies 8/16-bit control. This bit is set to indicate
177 16-bit memory, and cleared to indicate 8-bit memory.
178 Bit[0], if cleared, indicates the next field can be used as a range
179 length for decode (implies range length and base alignment of memory
180 descriptor are equal).
181 Bit[0], if set, indicates the next field is the upper limit for
182 the address. - - Bit[0] is read-only.
183 Offset 3: RW upper limit or range len, bits[23:16]
184 Offset 4: RW upper limit or range len, bits[15:8]
185 Offset 5-Offset 7: filler, unused.
186 ***/
187
188 #define IO_CONFIG_BASE 0x60
189 /***
190 Eight ranges, two bytes per range.
191 Offset 0: I/O port base address bits[15:8]
192 Offset 1: I/O port base address bits[7:0]
193 ***/
194
195 #define IRQ_CONFIG 0x70
196 /***
197 Two entries, two bytes per entry.
198 Offset 0: RW interrupt level (1..15, 0=unused).
199 Offset 1: Bit[1]: level(1:hi, 0:low),
200 Bit[0]: type (1:level, 0:edge)
201 byte 1 can be readonly if 1 type of int is used.
202 ***/
203
204 #define DRQ_CONFIG 0x74
205 /***
206 Two entries, one byte per entry. Bits[2:0] select
207 which DMA channel is in use for DMA 0. Zero selects DMA channel
208 0, seven selects DMA channel 7. DMA channel 4, the cascade channel
209 is used to indicate no DMA channel is active.
210 ***/
211
212 /*** 32-bit memory accesses are at 0x76 ***/
213
214 /* Small Resource Item names */
215 #define PNP_VERSION 0x1
216 #define LOG_DEVICE_ID 0x2
217 #define COMP_DEVICE_ID 0x3
218 #define IRQ_FORMAT 0x4
219 #define DMA_FORMAT 0x5
220 #define START_DEPEND_FUNC 0x6
221 #define END_DEPEND_FUNC 0x7
222 #define IO_PORT_DESC 0x8
223 #define FIXED_IO_PORT_DESC 0x9
224 #define SM_RES_RESERVED 0xa-0xd
225 #define SM_VENDOR_DEFINED 0xe
226 #define END_TAG 0xf
227
228 /* Large Resource Item names */
229 #define MEMORY_RANGE_DESC 0x1
230 #define ID_STRING_ANSI 0x2
231 #define ID_STRING_UNICODE 0x3
232 #define LG_VENDOR_DEFINED 0x4
233 #define _32BIT_MEM_RANGE_DESC 0x5
234 #define _32BIT_FIXED_LOC_DESC 0x6
235 #define LG_RES_RESERVED 0x7-0x7f
236
237 /*
238 * pnp_cinfo contains Configuration Information. They are used
239 * to communicate to the device driver the actual configuration
240 * of the device, and also by the userconfig menu to let the
241 * operating system override any configuration set by the bios.
242 *
243 */
244 struct pnp_cinfo {
245 u_int vendor_id; /* board id */
246 u_int serial; /* Board's Serial Number */
247 u_long flags; /* OS-reserved flags */
248 u_char csn; /* assigned Card Select Number */
249 u_char ldn; /* Logical Device Number */
250 u_char enable; /* pnp enable */
251 u_char override; /* override bios parms (in userconfig) */
252 u_char irq[2]; /* IRQ Number */
253 u_char irq_type[2]; /* IRQ Type */
254 u_char drq[2];
255 u_short port[8]; /* The Base Address of the Port */
256 struct {
257 u_long base; /* Memory Base Address */
258 int control; /* Memory Control Register */
259 u_long range; /* Memory Range *OR* Upper Limit */
260 } mem[4];
261 };
262
263 #ifdef KERNEL
264
265 #include <i386/isa/isa_device.h>
266
267 struct pnp_device {
268 char *pd_name;
269 char * (*pd_probe ) (u_long csn, u_long vendor_id);
270 void (*pd_attach ) (u_long csn, u_long vend_id, char * name,
271 struct isa_device *dev);
272 u_long *pd_count;
273 u_int *imask ;
274 struct isa_device dev ;
275 };
276
277 struct _pnp_id {
278 u_long vendor_id;
279 u_long serial;
280 u_char checksum;
281 } ;
282
283 typedef struct _pnp_id pnp_id;
284 extern pnp_id pnp_devices[MAX_PNP_CARDS];
285 extern struct pnp_cinfo pnp_ldn_overrides[MAX_PNP_LDN];
286 extern int pnp_overrides_valid;
287
288 extern struct linker_set pnpdevice_set;
289
290 /*
291 * these two functions are for use in drivers
292 */
293 int read_pnp_parms(struct pnp_cinfo *d, int ldn);
294 int write_pnp_parms(struct pnp_cinfo *d, int ldn);
295 int enable_pnp_card(void);
296
297 /*
298 * used by autoconfigure to actually probe and attach drivers
299 */
300 void pnp_configure __P((void));
301
302 #endif /* KERNEL */
303
304 #endif /* !_I386_ISA_PNP_H_ */
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