The Design and Implementation of the FreeBSD Operating System, Second Edition
Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)


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FreeBSD/Linux Kernel Cross Reference
sys/i386/isa/tw.c

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    1 /*-
    2  * Copyright (c) 1992, 1993, 1995 Eugene W. Stark
    3  * All rights reserved.
    4  *
    5  * Redistribution and use in source and binary forms, with or without
    6  * modification, are permitted provided that the following conditions
    7  * are met:
    8  * 1. Redistributions of source code must retain the above copyright
    9  *    notice, this list of conditions and the following disclaimer.
   10  * 2. Redistributions in binary form must reproduce the above copyright
   11  *    notice, this list of conditions and the following disclaimer in the
   12  *    documentation and/or other materials provided with the distribution.
   13  * 3. All advertising materials mentioning features or use of this software
   14  *    must display the following acknowledgement:
   15  *      This product includes software developed by Eugene W. Stark.
   16  * 4. The name of the author may not be used to endorse or promote products
   17  *    derived from this software without specific prior written permission.
   18  *
   19  * THIS SOFTWARE IS PROVIDED BY EUGENE W. STARK (THE AUTHOR) ``AS IS'' AND
   20  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
   21  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
   22  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
   23  * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
   24  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
   25  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
   26  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
   27  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
   28  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
   29  * SUCH DAMAGE.
   30  *
   31  * $FreeBSD$
   32  *
   33  */
   34 
   35 #include "tw.h"
   36 
   37 /*
   38  * Driver configuration parameters
   39  */
   40 
   41 /*
   42  * Time for 1/2 of a power line cycle, in microseconds.
   43  * Change this to 10000 for 50Hz power.  Phil Sampson
   44  * (vk2jnt@gw.vk2jnt.ampr.org OR sampson@gidday.enet.dec.com)
   45  * reports that this works (at least in Australia) using a
   46  * TW7223 module (a local version of the TW523).
   47  */
   48 #define HALFCYCLE 8333                  /* 1/2 cycle = 8333us at 60Hz */
   49 
   50 /*
   51  * Undefine the following if you don't have the high-resolution "microtime"
   52  * routines (leave defined for FreeBSD, which has them).
   53  */
   54 #define HIRESTIME
   55 
   56 /*
   57  * End of driver configuration parameters
   58  */
   59 
   60 /*
   61  * FreeBSD Device Driver for X-10 POWERHOUSE (tm)
   62  * Two-Way Power Line Interface, Model #TW523
   63  *
   64  * written by Eugene W. Stark (stark@cs.sunysb.edu)
   65  * December 2, 1992
   66  *
   67  * NOTES:
   68  *
   69  * The TW523 is a carrier-current modem for home control/automation purposes.
   70  * It is made by:
   71  *
   72  *      X-10 Inc.
   73  *      185A LeGrand Ave.
   74  *      Northvale, NJ 07647
   75  *      USA
   76  *      (201) 784-9700 or 1-800-526-0027
   77  *
   78  *      X-10 Home Controls Inc.
   79  *      1200 Aerowood Drive, Unit 20
   80  *      Mississauga, Ontario
   81  *      (416) 624-4446 or 1-800-387-3346
   82  *
   83  * The TW523 is designed for communications using the X-10 protocol,
   84  * which is compatible with a number of home control systems, including
   85  * Radio Shack "Plug 'n Power(tm)" and Stanley "Lightmaker(tm)."
   86  * I bought my TW523 from:
   87  *
   88  *      Home Control Concepts
   89  *      9353-C Activity Road
   90  *      San Diego, CA 92126
   91  *      (619) 693-8887
   92  *
   93  * They supplied me with the TW523 (which has an RJ-11 four-wire modular
   94  * telephone connector), a modular cable, an RJ-11 to DB-25 connector with
   95  * internal wiring, documentation from X-10 on the TW523 (very good),
   96  * an instruction manual by Home Control Concepts (not very informative),
   97  * and a floppy disk containing binary object code of some demonstration/test
   98  * programs and of a C function library suitable for controlling the TW523
   99  * by an IBM PC under MS-DOS (not useful to me other than to verify that
  100  * the unit worked).  I suggest saving money and buying the bare TW523
  101  * rather than the TW523 development kit (what I bought), because if you
  102  * are running FreeBSD you don't really care about the DOS binaries.
  103  *
  104  * The interface to the TW-523 consists of four wires on the RJ-11 connector,
  105  * which are jumpered to somewhat more wires on the DB-25 connector, which
  106  * in turn is intended to plug into the PC parallel printer port.  I dismantled
  107  * the DB-25 connector to find out what they had done:
  108  *
  109  *      Signal          RJ-11 pin       DB-25 pin(s)    Parallel Port
  110  *      Transmit TX       4 (Y)         2, 4, 6, 8      Data out
  111  *      Receive RX        3 (G)         10, 14          -ACK, -AutoFeed
  112  *      Common            2 (R)         25              Common
  113  *      Zero crossing     1 (B)         17 or 12        -Select or +PaperEnd
  114  *
  115  * NOTE: In the original cable I have (which I am still using, May, 1997)
  116  * the Zero crossing signal goes to pin 17 (-Select) on the parallel port.
  117  * In retrospect, this doesn't make a whole lot of sense, given that the
  118  * -Select signal propagates the other direction.  Indeed, some people have
  119  * reported problems with this, and have had success using pin 12 (+PaperEnd)
  120  * instead.  This driver searches for the zero crossing signal on either
  121  * pin 17 or pin 12, so it should work with either cable configuration.
  122  * My suggestion would be to start by making the cable so that the zero
  123  * crossing signal goes to pin 12 on the parallel port.
  124  *
  125  * The zero crossing signal is used to synchronize transmission to the
  126  * zero crossings of the AC line, as detailed in the X-10 documentation.
  127  * It would be nice if one could generate interrupts with this signal,
  128  * however one needs interrupts on both the rising and falling edges,
  129  * and the -ACK signal to the parallel port interrupts only on the falling
  130  * edge, so it can't be done without additional hardware.
  131  *
  132  * In this driver, the transmit function is performed in a non-interrupt-driven
  133  * fashion, by polling the zero crossing signal to determine when a transition
  134  * has occurred.  This wastes CPU time during transmission, but it seems like
  135  * the best that can be done without additional hardware.  One problem with
  136  * the scheme is that preemption of the CPU during transmission can cause loss
  137  * of sync.  The driver tries to catch this, by noticing that a long delay
  138  * loop has somehow become foreshortened, and the transmission is aborted with
  139  * an error return.  It is up to the user level software to handle this
  140  * situation (most likely by retrying the transmission).
  141  */
  142 
  143 #include <sys/param.h>
  144 #include <sys/systm.h>
  145 #include <sys/conf.h>
  146 #include <sys/kernel.h>
  147 #include <sys/uio.h>
  148 #include <sys/syslog.h>
  149 #include <sys/select.h>
  150 #include <sys/poll.h>
  151 #define MIN(a,b)        ((a)<(b)?(a):(b))
  152 
  153 #ifdef HIRESTIME
  154 #include <sys/time.h>
  155 #endif /* HIRESTIME */
  156 
  157 #include <i386/isa/isa_device.h>
  158 
  159 /*
  160  * Transmission is done by calling write() to send three byte packets of data.
  161  * The first byte contains a four bit house code (0=A to 15=P).
  162  * The second byte contains five bit unit/key code (0=unit 1 to 15=unit 16,
  163  * 16=All Units Off to 31 = Status Request).  The third byte specifies
  164  * the number of times the packet is to be transmitted without any
  165  * gaps between successive transmissions.  Normally this is 2, as per
  166  * the X-10 documentation, but sometimes (e.g. for bright and dim codes)
  167  * it can be another value.  Each call to write can specify an arbitrary
  168  * number of data bytes.  An incomplete packet is buffered until a subsequent
  169  * call to write() provides data to complete it.  At most one packet will
  170  * actually be processed in any call to write().  Successive calls to write()
  171  * leave a three-cycle gap between transmissions, per the X-10 documentation.
  172  *
  173  * Reception is done using read().
  174  * The driver produces a series of three-character packets.
  175  * In each packet, the first character consists of flags,
  176  * the second character is a four bit house code (0-15),
  177  * and the third character is a five bit key/function code (0-31).
  178  * The flags are the following:
  179  */
  180 
  181 #define TW_RCV_LOCAL    1  /* The packet arrived during a local transmission */
  182 #define TW_RCV_ERROR    2  /* An invalid/corrupted packet was received */
  183 
  184 /*
  185  * IBM PC parallel port definitions relevant to TW523
  186  */
  187 
  188 #define tw_data 0                       /* Data to tw523 (R/W) */
  189 
  190 #define tw_status 1                     /* Status of tw523 (R) */
  191 #define TWS_RDATA               0x40    /* tw523 receive data */
  192 #define TWS_OUT                 0x20    /* pin 12, out of paper */
  193 
  194 #define tw_control 2                    /* Control tw523 (R/W) */
  195 #define TWC_SYNC                0x08    /* tw523 sync (pin 17) */
  196 #define TWC_ENA                 0x10    /* tw523 interrupt enable */
  197 
  198 /*
  199  * Miscellaneous defines
  200  */
  201 
  202 #define TWUNIT(dev)     (minor(dev))    /* Extract unit number from device */
  203 #define TWPRI           (PZERO+8)       /* I don't know any better, so let's */
  204                                         /* use the same as the line printer */
  205 
  206 static int twprobe(struct isa_device *idp);
  207 static int twattach(struct isa_device *idp);
  208 
  209 struct isa_driver twdriver = {
  210   twprobe, twattach, "tw"
  211 };
  212 
  213 static  d_open_t        twopen;
  214 static  d_close_t       twclose;
  215 static  d_read_t        twread;
  216 static  d_write_t       twwrite;
  217 static  d_poll_t        twpoll;
  218 
  219 #define CDEV_MAJOR 19
  220 static struct cdevsw tw_cdevsw = {
  221         /* open */      twopen,
  222         /* close */     twclose,
  223         /* read */      twread,
  224         /* write */     twwrite,
  225         /* ioctl */     noioctl,
  226         /* poll */      twpoll,
  227         /* mmap */      nommap,
  228         /* strategy */  nostrategy,
  229         /* name */      "tw",
  230         /* maj */       CDEV_MAJOR,
  231         /* dump */      nodump,
  232         /* psize */     nopsize,
  233         /* flags */     0,
  234         /* bmaj */      -1
  235 };
  236 
  237 /*
  238  * Software control structure for TW523
  239  */
  240 
  241 #define TWS_XMITTING     1      /* Transmission in progress */
  242 #define TWS_RCVING       2      /* Reception in progress */
  243 #define TWS_WANT         4      /* A process wants received data */
  244 #define TWS_OPEN         8      /* Is it currently open? */
  245 
  246 #define TW_SIZE         3*60    /* Enough for about 10 sec. of input */
  247 #define TW_MIN_DELAY    1500    /* Ignore interrupts of lesser latency */
  248 
  249 static struct tw_sc {
  250   u_int sc_port;                /* I/O Port */
  251   u_int sc_state;               /* Current software control state */
  252   struct selinfo sc_selp;       /* Information for select() */
  253   u_char sc_xphase;             /* Current state of sync (for transmitter) */
  254   u_char sc_rphase;             /* Current state of sync (for receiver) */
  255   u_char sc_flags;              /* Flags for current reception */
  256   short sc_rcount;              /* Number of bits received so far */
  257   int sc_bits;                  /* Bits received so far */
  258   u_char sc_pkt[3];             /* Packet not yet transmitted */
  259   short sc_pktsize;             /* How many bytes in the packet? */
  260   u_char sc_buf[TW_SIZE];       /* We buffer our own input */
  261   int sc_nextin;                /* Next free slot in circular buffer */
  262   int sc_nextout;               /* First used slot in circular buffer */
  263                                 /* Callout for canceling our abortrcv timeout */
  264   struct callout_handle abortrcv_ch;
  265 #ifdef HIRESTIME
  266   int sc_xtimes[22];            /* Times for bits in current xmit packet */
  267   int sc_rtimes[22];            /* Times for bits in current rcv packet */
  268   int sc_no_rcv;                /* number of interrupts received */
  269 #define SC_RCV_TIME_LEN 128
  270   int sc_rcv_time[SC_RCV_TIME_LEN]; /* usec time stamp on interrupt */
  271 #endif /* HIRESTIME */
  272 } tw_sc[NTW];
  273 
  274 static int tw_zcport;           /* offset of port for zero crossing signal */
  275 static int tw_zcmask;           /* mask for the zero crossing signal */
  276 
  277 static void twdelay25(void);
  278 static void twdelayn(int n);
  279 static void twsetuptimes(int *a);
  280 static int wait_for_zero(struct tw_sc *sc);
  281 static int twputpkt(struct tw_sc *sc, u_char *p);
  282 static ointhand2_t twintr;
  283 static int twgetbytes(struct tw_sc *sc, u_char *p, int cnt);
  284 static timeout_t twabortrcv;
  285 static int twsend(struct tw_sc *sc, int h, int k, int cnt);
  286 static int next_zero(struct tw_sc *sc);
  287 static int twchecktime(int target, int tol);
  288 static void twdebugtimes(struct tw_sc *sc);
  289 
  290 /*
  291  * Counter value for delay loop.
  292  * It is adjusted by twprobe so that the delay loop takes about 25us.
  293  */
  294 
  295 #define TWDELAYCOUNT 161                /* Works on my 486DX/33 */
  296 static int twdelaycount;
  297 
  298 /*
  299  * Twdelay25 is used for very short delays of about 25us.
  300  * It is implemented with a calibrated delay loop, and should be
  301  * fairly accurate ... unless we are preempted by an interrupt.
  302  *
  303  * We use this to wait for zero crossings because the X-10 specs say we
  304  * are supposed to assert carrier within 25us when one happens.
  305  * I don't really believe we can do this, but the X-10 devices seem to be
  306  * fairly forgiving.
  307  */
  308 
  309 static void twdelay25(void)
  310 {
  311   int cnt;
  312   for(cnt = twdelaycount; cnt; cnt--);  /* Should take about 25us */
  313 }
  314 
  315 /*
  316  * Twdelayn is used to time the length of the 1ms carrier pulse.
  317  * This is not very critical, but if we have high-resolution time-of-day
  318  * we check it every apparent 200us to make sure we don't get too far off
  319  * if we happen to be interrupted during the delay.
  320  */
  321 
  322 static void twdelayn(int n)
  323 {
  324 #ifdef HIRESTIME
  325   int t, d;
  326   struct timeval tv;
  327   microtime(&tv);
  328   t = tv.tv_usec;
  329   t += n;
  330 #endif /* HIRESTIME */
  331   while(n > 0) {
  332     twdelay25();
  333     n -= 25;
  334 #ifdef HIRESTIME
  335     if((n & 0x7) == 0) {
  336       microtime(&tv);
  337       d = tv.tv_usec - t;
  338       if(d >= 0 && d < 1000000) return;
  339     }
  340 #endif /* HIRESTIME */
  341   }
  342 }
  343 
  344 static int twprobe(idp)
  345      struct isa_device *idp;
  346 {
  347   struct tw_sc sc;
  348   int d;
  349   int tries;
  350   static int once;
  351 
  352   if (!once++)
  353         cdevsw_add(&tw_cdevsw);
  354   sc.sc_port = idp->id_iobase;
  355   /* Search for the zero crossing signal at ports, bit combinations. */
  356   tw_zcport = tw_control;
  357   tw_zcmask = TWC_SYNC;
  358   sc.sc_xphase = inb(idp->id_iobase + tw_zcport) & tw_zcmask;
  359   if(wait_for_zero(&sc) < 0) {
  360     tw_zcport = tw_status;
  361     tw_zcmask = TWS_OUT;
  362     sc.sc_xphase = inb(idp->id_iobase + tw_zcport) & tw_zcmask;
  363   }
  364   if(wait_for_zero(&sc) < 0)
  365     return(0);
  366   /*
  367    * Iteratively check the timing of a few sync transitions, and adjust
  368    * the loop delay counter, if necessary, to bring the timing reported
  369    * by wait_for_zero() close to HALFCYCLE.  Give up if anything
  370    * ridiculous happens.
  371    */
  372   if(twdelaycount == 0) {  /* Only adjust timing for first unit */
  373     twdelaycount = TWDELAYCOUNT;
  374     for(tries = 0; tries < 10; tries++) {
  375       sc.sc_xphase = inb(idp->id_iobase + tw_zcport) & tw_zcmask;
  376       if(wait_for_zero(&sc) >= 0) {
  377         d = wait_for_zero(&sc);
  378         if(d <= HALFCYCLE/100 || d >= HALFCYCLE*100) {
  379           twdelaycount = 0;
  380           return(0);
  381         }
  382         twdelaycount = (twdelaycount * d)/HALFCYCLE;
  383       }
  384     }
  385   }
  386   /*
  387    * Now do a final check, just to make sure
  388    */
  389   sc.sc_xphase = inb(idp->id_iobase + tw_zcport) & tw_zcmask;
  390   if(wait_for_zero(&sc) >= 0) {
  391     d = wait_for_zero(&sc);
  392     if(d <= (HALFCYCLE * 110)/100 && d >= (HALFCYCLE * 90)/100) return(8);
  393   }
  394   return(0);
  395 }
  396 
  397 static int twattach(idp)
  398         struct isa_device *idp;
  399 {
  400   struct tw_sc *sc;
  401   int   unit;
  402 
  403   idp->id_ointr = twintr;
  404   sc = &tw_sc[unit = idp->id_unit];
  405   sc->sc_port = idp->id_iobase;
  406   sc->sc_state = 0;
  407   sc->sc_rcount = 0;
  408   callout_handle_init(&sc->abortrcv_ch);
  409   make_dev(&tw_cdevsw, unit, 0, 0, 0600, "tw%d", unit);
  410   return (1);
  411 }
  412 
  413 int twopen(dev, flag, mode, p)
  414      dev_t dev;
  415      int flag;
  416      int mode;
  417      struct proc *p;
  418 {
  419   struct tw_sc *sc = &tw_sc[TWUNIT(dev)];
  420   int s;
  421 
  422   s = spltty();
  423   if(sc->sc_state == 0) {
  424     sc->sc_state = TWS_OPEN;
  425     sc->sc_nextin = sc->sc_nextout = 0;
  426     sc->sc_pktsize = 0;
  427     outb(sc->sc_port+tw_control, TWC_ENA);
  428   }
  429   splx(s);
  430   return(0);
  431 }
  432 
  433 int twclose(dev, flag, mode, p)
  434      dev_t dev;
  435      int flag;
  436      int mode;
  437      struct proc *p;
  438 {
  439   struct tw_sc *sc = &tw_sc[TWUNIT(dev)];
  440   int s;
  441 
  442   s = spltty();
  443   sc->sc_state = 0;
  444   outb(sc->sc_port+tw_control, 0);
  445   splx(s);
  446   return(0);
  447 }
  448 
  449 int twread(dev, uio, ioflag)
  450      dev_t dev;
  451      struct uio *uio;
  452      int ioflag;
  453 {
  454   u_char buf[3];
  455   struct tw_sc *sc = &tw_sc[TWUNIT(dev)];
  456   int error, cnt, s;
  457 
  458   s = spltty();
  459   cnt = MIN(uio->uio_resid, 3);
  460   if((error = twgetbytes(sc, buf, cnt)) == 0) {
  461     error = uiomove(buf, cnt, uio);
  462   }
  463   splx(s);
  464   return(error);
  465 }
  466 
  467 int twwrite(dev, uio, ioflag)
  468      dev_t dev;
  469      struct uio *uio;
  470      int ioflag;
  471 {
  472   struct tw_sc *sc;
  473   int house, key, reps;
  474   int s, error;
  475   int cnt;
  476 
  477   sc = &tw_sc[TWUNIT(dev)];
  478   /*
  479    * Note: Although I had intended to allow concurrent transmitters,
  480    * there is a potential problem here if two processes both write
  481    * into the sc_pkt buffer at the same time.  The following code
  482    * is an additional critical section that needs to be synchronized.
  483    */
  484   s = spltty();
  485   cnt = MIN(3 - sc->sc_pktsize, uio->uio_resid);
  486   error = uiomove(&(sc->sc_pkt[sc->sc_pktsize]), cnt, uio);
  487   if(error) {
  488     splx(s);
  489     return(error);
  490   }
  491   sc->sc_pktsize += cnt;
  492   if(sc->sc_pktsize < 3) {  /* Only transmit 3-byte packets */
  493     splx(s);
  494     return(0);
  495   }
  496   sc->sc_pktsize = 0;
  497   /*
  498    * Collect house code, key code, and rep count, and check for sanity.
  499    */
  500   house = sc->sc_pkt[0];
  501   key = sc->sc_pkt[1];
  502   reps = sc->sc_pkt[2];
  503   if(house >= 16 || key >= 32) {
  504     splx(s);
  505     return(ENODEV);
  506   }
  507   /*
  508    * Synchronize with the receiver operating in the bottom half, and
  509    * also with concurrent transmitters.
  510    * We don't want to interfere with a packet currently being received,
  511    * and we would like the receiver to recognize when a packet has
  512    * originated locally.
  513    */
  514   while(sc->sc_state & (TWS_RCVING | TWS_XMITTING)) {
  515     error = tsleep((caddr_t)sc, TWPRI|PCATCH, "twwrite", 0);
  516     if(error) {
  517       splx(s);
  518       return(error);
  519     }
  520   }
  521   sc->sc_state |= TWS_XMITTING;
  522   /*
  523    * Everything looks OK, let's do the transmission.
  524    */
  525   splx(s);  /* Enable interrupts because this takes a LONG time */
  526   error = twsend(sc, house, key, reps);
  527   s = spltty();
  528   sc->sc_state &= ~TWS_XMITTING;
  529   wakeup((caddr_t)sc);
  530   splx(s);
  531   if(error) return(EIO);
  532   else return(0);
  533 }
  534 
  535 /*
  536  * Determine if there is data available for reading
  537  */
  538 
  539 int twpoll(dev, events, p)
  540      dev_t dev;
  541      int events;
  542      struct proc *p;
  543 {
  544   struct tw_sc *sc;
  545   int s;
  546   int revents = 0;
  547 
  548   sc = &tw_sc[TWUNIT(dev)];
  549   s = spltty();
  550   /* XXX is this correct?  the original code didn't test select rw mode!! */
  551   if (events & (POLLIN | POLLRDNORM)) {
  552     if(sc->sc_nextin != sc->sc_nextout)
  553       revents |= events & (POLLIN | POLLRDNORM);
  554     else
  555       selrecord(p, &sc->sc_selp);
  556   }
  557   splx(s);
  558   return(revents);
  559 }
  560 
  561 /*
  562  * X-10 Protocol
  563  */
  564 
  565 #define X10_START_LENGTH 4
  566 static char X10_START[] = { 1, 1, 1, 0 };
  567 
  568 /*
  569  * Each bit of the 4-bit house code and 5-bit key code
  570  * is transmitted twice, once in true form, and then in
  571  * complemented form.  This is already taken into account
  572  * in the following tables.
  573  */
  574 
  575 #define X10_HOUSE_LENGTH 8
  576 static char X10_HOUSE[16][8] = {
  577         0, 1, 1, 0, 1, 0, 0, 1,         /* A = 0110 */
  578         1, 0, 1, 0, 1, 0, 0, 1,         /* B = 1110 */
  579         0, 1, 0, 1, 1, 0, 0, 1,         /* C = 0010 */
  580         1, 0, 0, 1, 1, 0, 0, 1,         /* D = 1010 */
  581         0, 1, 0, 1, 0, 1, 1, 0,         /* E = 0001 */
  582         1, 0, 0, 1, 0, 1, 1, 0,         /* F = 1001 */
  583         0, 1, 1, 0, 0, 1, 1, 0,         /* G = 0101 */
  584         1, 0, 1, 0, 0, 1, 1, 0,         /* H = 1101 */
  585         0, 1, 1, 0, 1, 0, 1, 0,         /* I = 0111 */
  586         1, 0, 1, 0, 1, 0, 1, 0,         /* J = 1111 */
  587         0, 1, 0, 1, 1, 0, 1, 0,         /* K = 0011 */
  588         1, 0, 0, 1, 1, 0, 1, 0,         /* L = 1011 */
  589         0, 1, 0, 1, 0, 1, 0, 1,         /* M = 0000 */
  590         1, 0, 0, 1, 0, 1, 0, 1,         /* N = 1000 */
  591         0, 1, 1, 0, 0, 1, 0, 1,         /* O = 0100 */
  592         1, 0, 1, 0, 0, 1, 0, 1          /* P = 1100 */
  593 };
  594 
  595 #define X10_KEY_LENGTH 10
  596 static char X10_KEY[32][10] = {
  597         0, 1, 1, 0, 1, 0, 0, 1, 0, 1,   /* 01100 => 1 */
  598         1, 0, 1, 0, 1, 0, 0, 1, 0, 1,   /* 11100 => 2 */
  599         0, 1, 0, 1, 1, 0, 0, 1, 0, 1,   /* 00100 => 3 */
  600         1, 0, 0, 1, 1, 0, 0, 1, 0, 1,   /* 10100 => 4 */
  601         0, 1, 0, 1, 0, 1, 1, 0, 0, 1,   /* 00010 => 5 */
  602         1, 0, 0, 1, 0, 1, 1, 0, 0, 1,   /* 10010 => 6 */
  603         0, 1, 1, 0, 0, 1, 1, 0, 0, 1,   /* 01010 => 7 */
  604         1, 0, 1, 0, 0, 1, 1, 0, 0, 1,   /* 11010 => 8 */
  605         0, 1, 1, 0, 1, 0, 1, 0, 0, 1,   /* 01110 => 9 */
  606         1, 0, 1, 0, 1, 0, 1, 0, 0, 1,   /* 11110 => 10 */
  607         0, 1, 0, 1, 1, 0, 1, 0, 0, 1,   /* 00110 => 11 */
  608         1, 0, 0, 1, 1, 0, 1, 0, 0, 1,   /* 10110 => 12 */
  609         0, 1, 0, 1, 0, 1, 0, 1, 0, 1,   /* 00000 => 13 */
  610         1, 0, 0, 1, 0, 1, 0, 1, 0, 1,   /* 10000 => 14 */
  611         0, 1, 1, 0, 0, 1, 0, 1, 0, 1,   /* 01000 => 15 */
  612         1, 0, 1, 0, 0, 1, 0, 1, 0, 1,   /* 11000 => 16 */
  613         0, 1, 0, 1, 0, 1, 0, 1, 1, 0,   /* 00001 => All Units Off */
  614         0, 1, 0, 1, 0, 1, 1, 0, 1, 0,   /* 00011 => All Units On */
  615         0, 1, 0, 1, 1, 0, 0, 1, 1, 0,   /* 00101 => On */
  616         0, 1, 0, 1, 1, 0, 1, 0, 1, 0,   /* 00111 => Off */
  617         0, 1, 1, 0, 0, 1, 0, 1, 1, 0,   /* 01001 => Dim */
  618         0, 1, 1, 0, 0, 1, 1, 0, 1, 0,   /* 01011 => Bright */
  619         0, 1, 1, 0, 1, 0, 0, 1, 1, 0,   /* 01101 => All LIGHTS Off */
  620         0, 1, 1, 0, 1, 0, 1, 0, 1, 0,   /* 01111 => Extended Code */
  621         1, 0, 0, 1, 0, 1, 0, 1, 1, 0,   /* 10001 => Hail Request */
  622         1, 0, 0, 1, 0, 1, 1, 0, 1, 0,   /* 10011 => Hail Acknowledge */
  623         1, 0, 0, 1, 1, 0, 0, 1, 1, 0,   /* 10101 => Preset Dim 0 */
  624         1, 0, 0, 1, 1, 0, 1, 0, 1, 0,   /* 10111 => Preset Dim 1 */
  625         1, 0, 1, 0, 0, 1, 0, 1, 0, 1,   /* 11000 => Extended Data (analog) */
  626         1, 0, 1, 0, 0, 1, 1, 0, 1, 0,   /* 11011 => Status = on */
  627         1, 0, 1, 0, 1, 0, 0, 1, 1, 0,   /* 11101 => Status = off */
  628         1, 0, 1, 0, 1, 0, 1, 0, 1, 0    /* 11111 => Status request */
  629 };
  630 
  631 /*
  632  * Tables for mapping received X-10 code back to house/key number.
  633  */
  634 
  635 static short X10_HOUSE_INV[16] = {
  636       12,  4,  2, 10, 14,  6,  0,  8,
  637       13,  5,  3, 11, 15,  7,  1,  9
  638 };
  639 
  640 static short X10_KEY_INV[32] = { 
  641       12, 16,  4, 17,  2, 18, 10, 19,
  642       14, 20,  6, 21,  0, 22,  8, 23,
  643       13, 24,  5, 25,  3, 26, 11, 27,
  644       15, 28,  7, 29,  1, 30,  9, 31
  645 };
  646 
  647 static char *X10_KEY_LABEL[32] = {
  648  "1",
  649  "2",
  650  "3",
  651  "4",
  652  "5",
  653  "6",
  654  "7",
  655  "8",
  656  "9",
  657  "10",
  658  "11",
  659  "12",
  660  "13",
  661  "14",
  662  "15",
  663  "16",
  664  "All Units Off",
  665  "All Units On",
  666  "On",
  667  "Off",
  668  "Dim",
  669  "Bright",
  670  "All LIGHTS Off",
  671  "Extended Code",
  672  "Hail Request",
  673  "Hail Acknowledge",
  674  "Preset Dim 0",
  675  "Preset Dim 1",
  676  "Extended Data (analog)",
  677  "Status = on",
  678  "Status = off",
  679  "Status request"
  680 };
  681 /*
  682  * Transmit a packet containing house code h and key code k
  683  */
  684 
  685 #define TWRETRY         10              /* Try 10 times to sync with AC line */
  686 
  687 static int twsend(sc, h, k, cnt)
  688 struct tw_sc *sc;
  689 int h, k, cnt;
  690 {
  691   int i;
  692   int port = sc->sc_port;
  693 
  694   /*
  695    * Make sure we get a reliable sync with a power line zero crossing
  696    */
  697   for(i = 0; i < TWRETRY; i++) {
  698     if(wait_for_zero(sc) > 100) goto insync;
  699   }
  700   log(LOG_ERR, "TWXMIT: failed to sync.\n");
  701   return(-1);
  702 
  703  insync:
  704   /*
  705    * Be sure to leave 3 cycles space between transmissions
  706    */
  707   for(i = 6; i > 0; i--)
  708         if(next_zero(sc) < 0) return(-1);
  709   /*
  710    * The packet is transmitted cnt times, with no gaps.
  711    */
  712   while(cnt--) {
  713     /*
  714      * Transmit the start code
  715      */
  716     for(i = 0; i < X10_START_LENGTH; i++) {
  717       outb(port+tw_data, X10_START[i] ? 0xff : 0x00);  /* Waste no time! */
  718 #ifdef HIRESTIME
  719       if(i == 0) twsetuptimes(sc->sc_xtimes);
  720       if(twchecktime(sc->sc_xtimes[i], HALFCYCLE/20) == 0) {
  721         outb(port+tw_data, 0);
  722         return(-1);
  723       }
  724 #endif /* HIRESTIME */
  725       twdelayn(1000);   /* 1ms pulse width */
  726       outb(port+tw_data, 0);
  727       if(next_zero(sc) < 0) return(-1);
  728     }
  729     /*
  730      * Transmit the house code
  731      */
  732     for(i = 0; i < X10_HOUSE_LENGTH; i++) {
  733       outb(port+tw_data, X10_HOUSE[h][i] ? 0xff : 0x00);  /* Waste no time! */
  734 #ifdef HIRESTIME
  735       if(twchecktime(sc->sc_xtimes[i+X10_START_LENGTH], HALFCYCLE/20) == 0) {
  736         outb(port+tw_data, 0);
  737         return(-1);
  738       }
  739 #endif /* HIRESTIME */
  740       twdelayn(1000);   /* 1ms pulse width */
  741       outb(port+tw_data, 0);
  742       if(next_zero(sc) < 0) return(-1);
  743     }
  744     /*
  745      * Transmit the unit/key code
  746      */
  747     for(i = 0; i < X10_KEY_LENGTH; i++) {
  748       outb(port+tw_data, X10_KEY[k][i] ? 0xff : 0x00);
  749 #ifdef HIRESTIME
  750       if(twchecktime(sc->sc_xtimes[i+X10_START_LENGTH+X10_HOUSE_LENGTH],
  751                         HALFCYCLE/20) == 0) {
  752         outb(port+tw_data, 0);
  753         return(-1);
  754       }
  755 #endif /* HIRESTIME */
  756       twdelayn(1000);   /* 1ms pulse width */
  757       outb(port+tw_data, 0);
  758       if(next_zero(sc) < 0) return(-1);
  759     }
  760   }
  761   return(0);
  762 }
  763 
  764 /*
  765  * Waste CPU cycles to get in sync with a power line zero crossing.
  766  * The value returned is roughly how many microseconds we wasted before
  767  * seeing the transition.  To avoid wasting time forever, we give up after
  768  * waiting patiently for 1/4 sec (15 power line cycles at 60 Hz),
  769  * which is more than the 11 cycles it takes to transmit a full
  770  * X-10 packet.
  771  */
  772 
  773 static int wait_for_zero(sc)
  774 struct tw_sc *sc;
  775 {
  776   int i, old, new, max;
  777   int port = sc->sc_port + tw_zcport;
  778 
  779   old = sc->sc_xphase;
  780   max = 10000;          /* 10000 * 25us = 0.25 sec */
  781   i = 0;
  782   while(max--) {
  783     new = inb(port) & tw_zcmask;
  784     if(new != old) {
  785       sc->sc_xphase = new;
  786       return(i*25);
  787     }
  788     i++;
  789     twdelay25();
  790   }
  791   return(-1);
  792 }
  793 
  794 /*
  795  * Wait for the next zero crossing transition, and if we don't have
  796  * high-resolution time-of-day, check to see that the zero crossing
  797  * appears to be arriving on schedule.
  798  * We expect to be waiting almost a full half-cycle (8.333ms-1ms = 7.333ms).
  799  * If we don't seem to wait very long, something is wrong (like we got
  800  * preempted!) and we should abort the transmission because
  801  * there's no telling how long it's really been since the
  802  * last bit was transmitted.
  803  */
  804 
  805 static int next_zero(sc)
  806 struct tw_sc *sc;
  807 {
  808   int d;
  809 #ifdef HIRESTIME
  810   if((d = wait_for_zero(sc)) < 0) {
  811 #else
  812   if((d = wait_for_zero(sc)) < 6000 || d > 8500) {
  813         /* No less than 6.0ms, no more than 8.5ms */
  814 #endif /* HIRESTIME */
  815     log(LOG_ERR, "TWXMIT framing error: %d\n", d);
  816     return(-1);
  817   }
  818   return(0);
  819 }
  820 
  821 /*
  822  * Put a three-byte packet into the circular buffer
  823  * Should be called at priority spltty()
  824  */
  825 
  826 static int twputpkt(sc, p)
  827 struct tw_sc *sc;
  828 u_char *p;
  829 {
  830   int i, next;
  831 
  832   for(i = 0; i < 3; i++) {
  833     next = sc->sc_nextin+1;
  834     if(next >= TW_SIZE) next = 0;
  835     if(next == sc->sc_nextout) {  /* Buffer full */
  836 /*
  837       log(LOG_ERR, "TWRCV: Buffer overrun\n");
  838  */
  839       return(1);
  840     }
  841     sc->sc_buf[sc->sc_nextin] = *p++;
  842     sc->sc_nextin = next;
  843   }
  844   if(sc->sc_state & TWS_WANT) {
  845     sc->sc_state &= ~TWS_WANT;
  846     wakeup((caddr_t)(&sc->sc_buf));
  847   }
  848   selwakeup(&sc->sc_selp);
  849   return(0);
  850 }
  851 
  852 /*
  853  * Get bytes from the circular buffer
  854  * Should be called at priority spltty()
  855  */
  856 
  857 static int twgetbytes(sc, p, cnt)
  858 struct tw_sc *sc;
  859 u_char *p;
  860 int cnt;
  861 {
  862   int error;
  863 
  864   while(cnt--) {
  865     while(sc->sc_nextin == sc->sc_nextout) {  /* Buffer empty */
  866       sc->sc_state |= TWS_WANT;
  867       error = tsleep((caddr_t)(&sc->sc_buf), TWPRI|PCATCH, "twread", 0);
  868       if(error) {
  869         return(error);
  870       }
  871     }
  872     *p++ = sc->sc_buf[sc->sc_nextout++];
  873     if(sc->sc_nextout >= TW_SIZE) sc->sc_nextout = 0;
  874   }
  875   return(0);
  876 }
  877 
  878 /*
  879  * Abort reception that has failed to complete in the required time.
  880  */
  881 
  882 static void
  883 twabortrcv(arg)
  884         void *arg;
  885 {
  886   struct tw_sc *sc = arg;
  887   int s;
  888   u_char pkt[3];
  889 
  890   s = spltty();
  891   sc->sc_state &= ~TWS_RCVING;
  892   /* simply ignore single isolated interrupts. */
  893   if (sc->sc_no_rcv > 1) {
  894       sc->sc_flags |= TW_RCV_ERROR;
  895       pkt[0] = sc->sc_flags;
  896       pkt[1] = pkt[2] = 0;
  897       twputpkt(sc, pkt);
  898       log(LOG_ERR, "TWRCV: aborting (%x, %d)\n", sc->sc_bits, sc->sc_rcount);
  899       twdebugtimes(sc);
  900   }
  901   wakeup((caddr_t)sc);
  902   splx(s);
  903 }
  904 
  905 static int
  906 tw_is_within(int value, int expected, int tolerance)
  907 {
  908   int diff;
  909   diff = value - expected;
  910   if (diff < 0)
  911     diff *= -1;
  912   if (diff < tolerance)
  913     return 1;
  914   return 0;
  915 }
  916 
  917 /*
  918  * This routine handles interrupts that occur when there is a falling
  919  * transition on the RX input.  There isn't going to be a transition
  920  * on every bit (some are zero), but if we are smart and keep track of
  921  * how long it's been since the last interrupt (via the zero crossing
  922  * detect line and/or high-resolution time-of-day routine), we can
  923  * reconstruct the transmission without having to poll.
  924  */
  925 
  926 static void twintr(unit)
  927 int unit;
  928 {
  929   struct tw_sc *sc = &tw_sc[unit];
  930   int port;
  931   int newphase;
  932   u_char pkt[3];
  933   int delay = 0;
  934   struct timeval tv;
  935 
  936   port = sc->sc_port;
  937   /*
  938    * Ignore any interrupts that occur if the device is not open.
  939    */
  940   if(sc->sc_state == 0) return;
  941   newphase = inb(port + tw_zcport) & tw_zcmask;
  942   microtime(&tv);
  943 
  944   /*
  945    * NEW PACKET:
  946    * If we aren't currently receiving a packet, set up a new packet
  947    * and put in the first "1" bit that has just arrived.
  948    * Arrange for the reception to be aborted if too much time goes by.
  949    */
  950   if((sc->sc_state & TWS_RCVING) == 0) {
  951 #ifdef HIRESTIME
  952     twsetuptimes(sc->sc_rtimes);
  953 #endif /* HIRESTIME */
  954     sc->sc_state |= TWS_RCVING;
  955     sc->sc_rcount = 1;
  956     if(sc->sc_state & TWS_XMITTING) sc->sc_flags = TW_RCV_LOCAL;
  957     else sc->sc_flags = 0;
  958     sc->sc_bits = 0;
  959     sc->sc_rphase = newphase;
  960     /* 3 cycles of silence = 3/60 = 1/20 = 50 msec */
  961     sc->abortrcv_ch = timeout(twabortrcv, (caddr_t)sc, hz/20);
  962     sc->sc_rcv_time[0] = tv.tv_usec;
  963     sc->sc_no_rcv = 1;
  964     return;
  965   }
  966   untimeout(twabortrcv, (caddr_t)sc, sc->abortrcv_ch);
  967   sc->abortrcv_ch = timeout(twabortrcv, (caddr_t)sc, hz/20);
  968   newphase = inb(port + tw_zcport) & tw_zcmask;
  969 
  970   /* enforce a minimum delay since the last interrupt */
  971   delay = tv.tv_usec - sc->sc_rcv_time[sc->sc_no_rcv - 1];
  972   if (delay < 0)
  973     delay += 1000000;
  974   if (delay < TW_MIN_DELAY)
  975     return;
  976 
  977   sc->sc_rcv_time[sc->sc_no_rcv] = tv.tv_usec;
  978   if (sc->sc_rcv_time[sc->sc_no_rcv] < sc->sc_rcv_time[0])
  979     sc->sc_rcv_time[sc->sc_no_rcv] += 1000000;
  980   sc->sc_no_rcv++;
  981 
  982   /*
  983    * START CODE:
  984    * The second and third bits are a special case.
  985    */
  986   if (sc->sc_rcount < 3) {
  987     if (
  988 #ifdef HIRESTIME
  989         tw_is_within(delay, HALFCYCLE, HALFCYCLE / 6)
  990 #else
  991         newphase != sc->sc_rphase
  992 #endif
  993         ) {
  994       sc->sc_rcount++;
  995     } else {
  996       /*
  997        * Invalid start code -- abort reception.
  998        */
  999       sc->sc_state &= ~TWS_RCVING;
 1000       sc->sc_flags |= TW_RCV_ERROR;
 1001       untimeout(twabortrcv, (caddr_t)sc, sc->abortrcv_ch);
 1002       log(LOG_ERR, "TWRCV: Invalid start code\n");
 1003       twdebugtimes(sc);
 1004       sc->sc_no_rcv = 0;
 1005       return;
 1006     }
 1007     if(sc->sc_rcount == 3) {
 1008       /*
 1009        * We've gotten three "1" bits in a row.  The start code
 1010        * is really 1110, but this might be followed by a zero
 1011        * bit from the house code, so if we wait any longer we
 1012        * might be confused about the first house code bit.
 1013        * So, we guess that the start code is correct and insert
 1014        * the trailing zero without actually having seen it.
 1015        * We don't change sc_rphase in this case, because two
 1016        * bit arrivals in a row preserve parity.
 1017        */
 1018       sc->sc_rcount++;
 1019       return;
 1020     }
 1021     /*
 1022      * Update sc_rphase to the current phase before returning.
 1023      */
 1024     sc->sc_rphase = newphase;
 1025     return;
 1026   }
 1027   /*
 1028    * GENERAL CASE:
 1029    * Now figure out what the current bit is that just arrived.
 1030    * The X-10 protocol transmits each data bit twice: once in
 1031    * true form and once in complemented form on the next half
 1032    * cycle.  So, there will be at least one interrupt per bit.
 1033    * By comparing the phase we see at the time of the interrupt
 1034    * with the saved sc_rphase, we can tell on which half cycle
 1035    * the interrupt occrred.  This assumes, of course, that the
 1036    * packet is well-formed.  We do the best we can at trying to
 1037    * catch errors by aborting if too much time has gone by, and
 1038    * by tossing out a packet if too many bits arrive, but the
 1039    * whole scheme is probably not as robust as if we had a nice
 1040    * interrupt on every half cycle of the power line.
 1041    * If we have high-resolution time-of-day routines, then we
 1042    * can do a bit more sanity checking.
 1043    */
 1044 
 1045   /*
 1046    * A complete packet is 22 half cycles.
 1047    */
 1048   if(sc->sc_rcount <= 20) {
 1049 #ifdef HIRESTIME
 1050     int bit = 0, last_bit;
 1051     if (sc->sc_rcount == 4)
 1052       last_bit = 1;             /* Start (1110) ends in 10, a 'one' code. */
 1053     else
 1054       last_bit = sc->sc_bits & 0x1;
 1055     if (   (   (last_bit == 1)
 1056             && (tw_is_within(delay, HALFCYCLE * 2, HALFCYCLE / 6)))
 1057         || (   (last_bit == 0)
 1058             && (tw_is_within(delay, HALFCYCLE * 1, HALFCYCLE / 6))))
 1059       bit = 1;
 1060     else if (   (   (last_bit == 1)
 1061                  && (tw_is_within(delay, HALFCYCLE * 3, HALFCYCLE / 6)))
 1062              || (   (last_bit == 0)
 1063                  && (tw_is_within(delay, HALFCYCLE * 2, HALFCYCLE / 6))))
 1064       bit = 0;
 1065     else {
 1066       sc->sc_flags |= TW_RCV_ERROR;
 1067       log(LOG_ERR, "TWRCV: %d cycle after %d bit, delay %d%%\n",
 1068           sc->sc_rcount, last_bit, 100 * delay / HALFCYCLE);
 1069     }
 1070     sc->sc_bits = (sc->sc_bits << 1) | bit;
 1071 #else
 1072     sc->sc_bits = (sc->sc_bits << 1)
 1073       | ((newphase == sc->sc_rphase) ? 0x0 : 0x1);
 1074 #endif /* HIRESTIME */
 1075     sc->sc_rcount += 2;
 1076   }
 1077   if(sc->sc_rcount >= 22 || sc->sc_flags & TW_RCV_ERROR) {
 1078     if(sc->sc_rcount != 22) {
 1079       sc->sc_flags |= TW_RCV_ERROR;
 1080       pkt[0] = sc->sc_flags;
 1081       pkt[1] = pkt[2] = 0;
 1082     } else {
 1083       pkt[0] = sc->sc_flags;
 1084       pkt[1] = X10_HOUSE_INV[(sc->sc_bits & 0x1e0) >> 5];
 1085       pkt[2] = X10_KEY_INV[sc->sc_bits & 0x1f];
 1086     }
 1087     sc->sc_state &= ~TWS_RCVING;
 1088     twputpkt(sc, pkt);
 1089     untimeout(twabortrcv, (caddr_t)sc, sc->abortrcv_ch);
 1090     if(sc->sc_flags & TW_RCV_ERROR) {
 1091       log(LOG_ERR, "TWRCV: invalid packet: (%d, %x) %c %s\n",
 1092           sc->sc_rcount, sc->sc_bits, 'A' + pkt[1], X10_KEY_LABEL[pkt[2]]);
 1093       twdebugtimes(sc);
 1094     } else {
 1095 /*      log(LOG_ERR, "TWRCV: valid packet: (%d, %x) %c %s\n",
 1096           sc->sc_rcount, sc->sc_bits, 'A' + pkt[1], X10_KEY_LABEL[pkt[2]]); */
 1097     }
 1098     sc->sc_rcount = 0;
 1099     wakeup((caddr_t)sc);
 1100   }
 1101 }
 1102 
 1103 static void twdebugtimes(struct tw_sc *sc)
 1104 {
 1105     int i;
 1106     for (i = 0; (i < sc->sc_no_rcv) && (i < SC_RCV_TIME_LEN); i++)
 1107         log(LOG_ERR, "TWRCV: interrupt %2d: %d\t%d%%\n", i, sc->sc_rcv_time[i],
 1108             (sc->sc_rcv_time[i] - sc->sc_rcv_time[(i?i-1:0)])*100/HALFCYCLE);
 1109 }
 1110 
 1111 #ifdef HIRESTIME
 1112 /*
 1113  * Initialize an array of 22 times, starting from the current
 1114  * microtime and continuing for the next 21 half cycles.
 1115  * We use the times as a reference to make sure transmission
 1116  * or reception is on schedule.
 1117  */
 1118 
 1119 static void twsetuptimes(int *a)
 1120 {
 1121   struct timeval tv;
 1122   int i, t;
 1123 
 1124   microtime(&tv);
 1125   t = tv.tv_usec;
 1126   for(i = 0; i < 22; i++) {
 1127     *a++ = t;
 1128     t += HALFCYCLE;
 1129     if(t >= 1000000) t -= 1000000;
 1130   }
 1131 }
 1132 
 1133 /*
 1134  * Check the current time against a slot in a previously set up
 1135  * timing array, and make sure that it looks like we are still
 1136  * on schedule.
 1137  */
 1138 
 1139 static int twchecktime(int target, int tol)
 1140 {
 1141   struct timeval tv;
 1142   int t, d;
 1143 
 1144   microtime(&tv);
 1145   t = tv.tv_usec;
 1146   d = (target - t) >= 0 ? (target - t) : (t - target);
 1147   if(d > 500000) d = 1000000-d;
 1148   if(d <= tol && d >= -tol) {
 1149     return(1);
 1150   } else {
 1151     return(0);
 1152   }
 1153 }
 1154 #endif /* HIRESTIME */

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