FreeBSD/Linux Kernel Cross Reference
sys/i386/pic.h
1 /*
2 * Mach Operating System
3 * Copyright (c) 1993,1991,1990,1989 Carnegie Mellon University
4 * All Rights Reserved.
5 *
6 * Permission to use, copy, modify and distribute this software and its
7 * documentation is hereby granted, provided that both the copyright
8 * notice and this permission notice appear in all copies of the
9 * software, derivative works or modified versions, and any portions
10 * thereof, and that both notices appear in supporting documentation.
11 *
12 * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
13 * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND FOR
14 * ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
15 *
16 * Carnegie Mellon requests users of this software to return to
17 *
18 * Software Distribution Coordinator or Software.Distribution@CS.CMU.EDU
19 * School of Computer Science
20 * Carnegie Mellon University
21 * Pittsburgh PA 15213-3890
22 *
23 * any improvements or extensions that they make and grant Carnegie Mellon
24 * the rights to redistribute these changes.
25 */
26 /*
27 * HISTORY
28 * $Log: pic.h,v $
29 * Revision 2.12 93/11/17 16:38:30 dbg
30 * Added definitions for MASTER_ICW, MASTER_OCW, SLAVE_ICW,
31 * SLAVE_OCW, since these are constant for a configuration
32 * (and common to both ISA and MCA machines). Corrected
33 * definitions of OCW2 operation codes.
34 * [93/10/29 dbg]
35 *
36 * Revision 2.11 93/02/04 07:56:50 danner
37 * Added PS2 to #ifdef AT386 cases.
38 * [93/01/25 rvb]
39 *
40 * Revision 2.10 91/06/19 11:55:24 rvb
41 * cputypes.h->platforms.h
42 * [91/06/12 13:45:13 rvb]
43 *
44 * Revision 2.9 91/05/14 16:14:02 mrt
45 * Correcting copyright
46 *
47 * Revision 2.8 91/05/08 12:41:27 dbg
48 * Use platforms.h to get CPU names.
49 * [91/03/21 dbg]
50 *
51 * Revision 2.7 91/02/05 17:13:51 mrt
52 * Changed to new Mach copyright
53 * [91/02/01 17:36:57 mrt]
54 *
55 * Revision 2.6 90/12/04 14:46:25 jsb
56 * iPSC2 -> iPSC386.
57 * [90/12/04 11:17:51 jsb]
58 *
59 * Revision 2.5 90/11/26 16:27:50 rvb
60 * It appears that I_AM_A_{SLAVE,MASTER} were always wrong
61 * but iPSC386 seems to care.
62 *
63 * Revision 2.4 90/11/26 14:48:39 rvb
64 * Change Prime copyright as per Peter J. Weyman authorization.
65 * [90/11/19 rvb]
66 *
67 * Revision 2.2.1.2 90/07/10 11:42:35 rvb
68 * EXL out
69 * iPSC386 in
70 * [90/06/18 rvb]
71 *
72 * Revision 2.2.1.1 89/10/22 11:31:25 rvb
73 * Flush stuff that belongs in pic.c -- undo damage of Prime merge.
74 * [89/10/20 rvb]
75 *
76 * Revision 2.2 89/09/25 12:32:34 rvb
77 * This is UNPUBLISHED PROPRIETARY SOURCE CODE of Prime Computer, Inc.
78 * [89/09/23 rvb]
79 *
80 */
81
82 /*
83 Copyright (c) 1988,1989 Prime Computer, Inc. Natick, MA 01760
84 All Rights Reserved.
85
86 Permission to use, copy, modify, and distribute this
87 software and its documentation for any purpose and
88 without fee is hereby granted, provided that the above
89 copyright notice appears in all copies and that both the
90 copyright notice and this permission notice appear in
91 supporting documentation, and that the name of Prime
92 Computer, Inc. not be used in advertising or publicity
93 pertaining to distribution of the software without
94 specific, written prior permission.
95
96 THIS SOFTWARE IS PROVIDED "AS IS", AND PRIME COMPUTER,
97 INC. DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS
98 SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
99 MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. IN
100 NO EVENT SHALL PRIME COMPUTER, INC. BE LIABLE FOR ANY
101 SPECIAL, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY
102 DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
103 PROFITS, WHETHER IN ACTION OF CONTRACT, NEGLIGENCE, OR
104 OTHER TORTIOUS ACTION, ARISING OUR OF OR IN CONNECTION
105 WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
106 */
107
108 #ifndef _I386_PIC_H_
109 #define _I386_PIC_H_
110
111 #include <platforms.h>
112
113 #define NINTR 0x10
114 #define NPICS 0x02
115
116 /*
117 ** The following are definitions used to locate the PICs in the system
118 */
119
120 #if defined(AT386) || defined(PS2)
121 #define ADDR_PIC_BASE 0x20
122 #define OFF_ICW 0x00
123 #define OFF_OCW 0x01
124 #define SIZE_PIC 0x80
125 #endif /* defined(AT386) || defined(PS2) */
126
127 #ifdef iPSC386
128 #define ADDR_PIC_BASE 0xC0
129 #define OFF_ICW 0x00
130 #define OFF_OCW 0x02
131 #define SIZE_PIC 0x04
132 #endif /* iPSC386 */
133
134
135 #define MASTER_ICW (ADDR_PIC_BASE + OFF_ICW)
136 #define MASTER_OCW (ADDR_PIC_BASE + OFF_OCW)
137 #define SLAVE_ICW (ADDR_PIC_BASE + SIZE_PIC + OFF_ICW)
138 #define SLAVE_OCW (ADDR_PIC_BASE + SIZE_PIC + OFF_OCW)
139
140 /*
141 ** The following banks of definitions ICW1, ICW2, ICW3, and ICW4 are used
142 ** to define the fields of the various ICWs for initialisation of the PICs
143 */
144
145 /*
146 ** ICW1
147 */
148
149 #define ICW_TEMPLATE 0x10
150
151 #define LEVL_TRIGGER 0x08
152 #define EDGE_TRIGGER 0x00
153 #define ADDR_INTRVL4 0x04
154 #define ADDR_INTRVL8 0x00
155 #define SINGLE__MODE 0x02
156 #define CASCADE_MODE 0x00
157 #define ICW4__NEEDED 0x01
158 #define NO_ICW4_NEED 0x00
159
160 /*
161 ** ICW2
162 */
163
164 #if defined(AT386) || defined(PS2)
165 #define PICM_VECTBASE 0x40
166 #define PICS_VECTBASE PICM_VECTBASE + 0x08
167 #endif /* defined(AT386) || defined(PS2) */
168
169 #ifdef iPSC386
170 #define PICM_VECTBASE 0x40
171 #define PICS_VECTBASE PICM_VECTBASE + 0x08
172 #endif /* iPSC386 */
173
174 /*
175 ** ICW3
176 */
177
178 #define SLAVE_ON_IR0 0x01
179 #define SLAVE_ON_IR1 0x02
180 #define SLAVE_ON_IR2 0x04
181 #define SLAVE_ON_IR3 0x08
182 #define SLAVE_ON_IR4 0x10
183 #define SLAVE_ON_IR5 0x20
184 #define SLAVE_ON_IR6 0x40
185 #define SLAVE_ON_IR7 0x80
186
187 #define I_AM_SLAVE_0 0x00
188 #define I_AM_SLAVE_1 0x01
189 #define I_AM_SLAVE_2 0x02
190 #define I_AM_SLAVE_3 0x03
191 #define I_AM_SLAVE_4 0x04
192 #define I_AM_SLAVE_5 0x05
193 #define I_AM_SLAVE_6 0x06
194 #define I_AM_SLAVE_7 0x07
195
196 /*
197 ** ICW4
198 */
199
200 #define SNF_MODE_ENA 0x10
201 #define SNF_MODE_DIS 0x00
202 #define BUFFERD_MODE 0x08
203 #define NONBUFD_MODE 0x00
204 #if iPSC386
205 #define I_AM_A_SLAVE 0x00
206 #define I_AM_A_MASTR 0x04
207 #endif /* iPSC386 */
208 #define AUTO_EOI_MOD 0x02
209 #define NRML_EOI_MOD 0x00
210 #define I8086_EMM_MOD 0x01
211 #define SET_MCS_MODE 0x00
212
213 /*
214 ** OCW1
215 */
216 #define PICM_MASK 0xFF
217 #define PICS_MASK 0xFF
218 /*
219 ** OCW2
220 */
221
222 #define NON_SPEC_EOI 0x20
223 #define SPECIFIC_EOI 0x60
224 #define ROT_NON_SPEC 0xa0
225 #define SET_ROT_AEOI 0x80
226 #define RSET_ROTAEOI 0x00
227 #define ROT_SPEC_EOI 0xe0
228 #define SET_PRIORITY 0xc0
229 #define NO_OPERATION 0x40
230
231 #define SEND_EOI_IR0 0x00
232 #define SEND_EOI_IR1 0x01
233 #define SEND_EOI_IR2 0x02
234 #define SEND_EOI_IR3 0x03
235 #define SEND_EOI_IR4 0x04
236 #define SEND_EOI_IR5 0x05
237 #define SEND_EOI_IR6 0x06
238 #define SEND_EOI_IR7 0x07
239
240 /*
241 ** OCW3
242 */
243
244 #define OCW_TEMPLATE 0x08
245 #define SPECIAL_MASK 0x40
246 #define MASK_MDE_SET 0x20
247 #define MASK_MDE_RST 0x00
248 #define POLL_COMMAND 0x04
249 #define NO_POLL_CMND 0x00
250 #define READ_NEXT_RD 0x02
251 #define READ_IR_ONRD 0x00
252 #define READ_IS_ONRD 0x01
253
254 #endif /* _I386_PIC_H_ */
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