FreeBSD/Linux Kernel Cross Reference
sys/i386/pit.h
1 /*
2 * Mach Operating System
3 * Copyright (c) 1991,1990,1989 Carnegie Mellon University
4 * All Rights Reserved.
5 *
6 * Permission to use, copy, modify and distribute this software and its
7 * documentation is hereby granted, provided that both the copyright
8 * notice and this permission notice appear in all copies of the
9 * software, derivative works or modified versions, and any portions
10 * thereof, and that both notices appear in supporting documentation.
11 *
12 * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
13 * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND FOR
14 * ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
15 *
16 * Carnegie Mellon requests users of this software to return to
17 *
18 * Software Distribution Coordinator or Software.Distribution@CS.CMU.EDU
19 * School of Computer Science
20 * Carnegie Mellon University
21 * Pittsburgh PA 15213-3890
22 *
23 * any improvements or extensions that they make and grant Carnegie Mellon
24 * the rights to redistribute these changes.
25 */
26 /*
27 * HISTORY
28 * $Log: pit.h,v $
29 * Revision 2.9 93/02/04 07:57:02 danner
30 * Add PS2 to #if AT386.
31 * [93/01/25 rvb]
32 *
33 * Revision 2.8 91/06/19 11:55:33 rvb
34 * cputypes.h->platforms.h
35 * [91/06/12 13:45:21 rvb]
36 *
37 * Revision 2.7 91/05/14 16:14:59 mrt
38 * Correcting copyright
39 *
40 * Revision 2.6 91/02/05 17:14:13 mrt
41 * Changed to new Mach copyright
42 * [91/02/01 17:37:22 mrt]
43 *
44 * Revision 2.5 90/12/04 14:46:28 jsb
45 * iPSC2 -> iPSC386.
46 * [90/12/04 11:18:09 jsb]
47 *
48 * Revision 2.4 90/09/23 17:45:18 jsb
49 * Added support for iPSC386.
50 * [90/09/21 16:41:53 jsb]
51 *
52 * Revision 2.3 90/08/27 21:58:05 dbg
53 * Fix Intel Copyright as per B. Davies authorization.
54 * [90/08/14 dbg]
55 * Add Intel copyright.
56 * [90/01/08 rvb]
57 *
58 * Revision 2.2 90/05/03 15:36:57 dbg
59 * First checkin.
60 *
61 * Revision 2.2 89/09/25 12:32:44 rvb
62 * File was provided by Intel 9/18/89.
63 * [89/09/23 rvb]
64 *
65 */
66
67 /*
68 Copyright 1988, 1989 by Intel Corporation, Santa Clara, California.
69
70 All Rights Reserved
71
72 Permission to use, copy, modify, and distribute this software and
73 its documentation for any purpose and without fee is hereby
74 granted, provided that the above copyright notice appears in all
75 copies and that both the copyright notice and this permission notice
76 appear in supporting documentation, and that the name of Intel
77 not be used in advertising or publicity pertaining to distribution
78 of the software without specific, written prior permission.
79
80 INTEL DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE
81 INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS,
82 IN NO EVENT SHALL INTEL BE LIABLE FOR ANY SPECIAL, INDIRECT, OR
83 CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM
84 LOSS OF USE, DATA OR PROFITS, WHETHER IN ACTION OF CONTRACT,
85 NEGLIGENCE, OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION
86 WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
87 */
88
89 #include <platforms.h>
90 #if defined(MB1) || defined(MB2) || EXL > 0 || iPSC386
91 /* Definitions for 8254 Programmable Interrupt Timer ports on 386/20 */
92 #define PITCTR0_PORT 0xD0 /* counter 0 port */
93 #define PITCTR1_PORT 0xD2 /* counter 1 port */
94 #define PITCTR2_PORT 0xD4 /* counter 2 port */
95 #define PITCTL_PORT 0xD6 /* PIT control port */
96 #else /* defined(AT386) || defined(PS2) */
97 /* Definitions for 8254 Programmable Interrupt Timer ports on AT 386 */
98 #define PITCTR0_PORT 0x40 /* counter 0 port */
99 #define PITCTR1_PORT 0x41 /* counter 1 port */
100 #define PITCTR2_PORT 0x42 /* counter 2 port */
101 #define PITCTL_PORT 0x43 /* PIT control port */
102 #define PITAUX_PORT 0x61 /* PIT auxiliary port */
103 /* bits used in auxiliary control port for timer 2 */
104 #define PITAUX_GATE2 0x01 /* aux port, PIT gate 2 input */
105 #define PITAUX_OUT2 0x02 /* aux port, PIT clock out 2 enable */
106 #endif /* defined(AT386) || defined(PS2) */
107
108 /* Following are used for Timer 0 */
109 #define PIT_C0 0x00 /* select counter 0 */
110 #define PIT_LOADMODE 0x30 /* load least significant byte followed
111 * by most significant byte */
112 #define PIT_NDIVMODE 0x04 /*divide by N counter */
113 #define PIT_SQUAREMODE 0x06 /* square-wave mode */
114
115 /* Used for Timer 1. Used for delay calculations in countdown mode */
116 #define PIT_C1 0x40 /* select counter 1 */
117 #define PIT_READMODE 0x30 /* read or load least significant byte
118 * followed by most significant byte */
119 #define PIT_RATEMODE 0x06 /* square-wave mode for USART */
120
121 /*
122 * Clock speed for the timer in hz divided by the constant HZ
123 * (defined in param.h)
124 */
125 #if AT386 || PS2
126 #define CLKNUM 1193167
127 #endif /* AT386 || PS2 */
128 #if defined(MB1)
129 #define CLKNUM 12300
130 #endif
131 #if defined(MB2) || EXL > 0
132 #define CLKNUM 12500
133 #endif
134 #if iPSC386
135 #define CLKNUM 1000000
136 #endif iPSC386
137
138 #if EXL
139 /* added micro-timer support. --- csy */
140 typedef struct time_latch {
141 time_t ticks; /* time in HZ since boot */
142 time_t uticks; /* time in 1.25 MHZ */
143 /* don't need these two for now. --- csy */
144 /* time_t secs; /* seconds since boot */
145 /* time_t epochsecs; /* seconds since epoch */
146 } time_latch;
147 /* a couple in-line assembly codes for efficiency. */
148 asm int intr_disable()
149 {
150 pushfl
151 cli
152 }
153
154 asm int intr_restore()
155 {
156 popfl
157 }
158
159 #endif EXL
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