FreeBSD/Linux Kernel Cross Reference
sys/i386/proc_reg.h
1 /*
2 * Mach Operating System
3 * Copyright (c) 1991,1990 Carnegie Mellon University
4 * All Rights Reserved.
5 *
6 * Permission to use, copy, modify and distribute this software and its
7 * documentation is hereby granted, provided that both the copyright
8 * notice and this permission notice appear in all copies of the
9 * software, derivative works or modified versions, and any portions
10 * thereof, and that both notices appear in supporting documentation.
11 *
12 * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
13 * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND FOR
14 * ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
15 *
16 * Carnegie Mellon requests users of this software to return to
17 *
18 * Software Distribution Coordinator or Software.Distribution@CS.CMU.EDU
19 * School of Computer Science
20 * Carnegie Mellon University
21 * Pittsburgh PA 15213-3890
22 *
23 * any improvements or extensions that they make and grant Carnegie Mellon
24 * the rights to redistribute these changes.
25 */
26
27 /*
28 * HISTORY
29 * $Log: proc_reg.h,v $
30 * Revision 2.4 92/01/03 20:08:42 dbg
31 * Add macros to get and set various privileged registers.
32 * [91/10/20 dbg]
33 *
34 * Revision 2.3 91/05/14 16:15:32 mrt
35 * Correcting copyright
36 *
37 * Revision 2.2 91/05/08 12:41:37 dbg
38 * Created.
39 * [91/03/21 dbg]
40 *
41 */
42
43 /*
44 * Processor registers for i386 and i486.
45 */
46 #ifndef _I386_PROC_REG_H_
47 #define _I386_PROC_REG_H_
48
49 /*
50 * CR0
51 */
52 #define CR0_PG 0x80000000 /* enable paging */
53 #define CR0_CD 0x40000000 /* i486: cache disable */
54 #define CR0_NW 0x20000000 /* i486: no write-through */
55 #define CR0_AM 0x00040000 /* i486: alignment check mask */
56 #define CR0_WP 0x00010000 /* i486: write-protect kernel access */
57 #define CR0_NE 0x00000020 /* i486: handle numeric exceptions */
58 #define CR0_ET 0x00000010 /* extension type is 80387 */
59 /* (not official) */
60 #define CR0_TS 0x00000008 /* task switch */
61 #define CR0_EM 0x00000004 /* emulate coprocessor */
62 #define CR0_MP 0x00000002 /* monitor coprocessor */
63 #define CR0_PE 0x00000001 /* enable protected mode */
64
65 #ifndef ASSEMBLER
66 #ifdef __GNUC__
67
68 #define get_cr0() \
69 ({ \
70 register unsigned int _temp__; \
71 asm("mov %%cr0, %0" : "=r" (_temp__)); \
72 _temp__; \
73 })
74
75 #define set_cr0(value) \
76 ({ \
77 register unsigned int _temp__ = (value); \
78 asm volatile("mov %0, %%cr0" : : "r" (_temp__)); \
79 })
80
81 #define get_cr2() \
82 ({ \
83 register unsigned int _temp__; \
84 asm("mov %%cr2, %0" : "=r" (_temp__)); \
85 _temp__; \
86 })
87
88 #define get_cr3() \
89 ({ \
90 register unsigned int _temp__; \
91 asm("mov %%cr3, %0" : "=r" (_temp__)); \
92 _temp__; \
93 })
94
95 #define set_cr3(value) \
96 ({ \
97 register unsigned int _temp__ = (value); \
98 asm volatile("mov %0, %%cr3" : : "r" (_temp__)); \
99 })
100
101 #define set_ts() \
102 set_cr0(get_cr0() | CR0_TS)
103
104 #define clear_ts() \
105 asm volatile("clts")
106
107 #define get_tr() \
108 ({ \
109 unsigned short _seg__; \
110 asm volatile("str %0" : "=rm" (_seg__) ); \
111 _seg__; \
112 })
113
114 #define set_tr(seg) \
115 asm volatile("ltr %0" : : "rm" ((unsigned short)(seg)) )
116
117 #define get_ldt() \
118 ({ \
119 unsigned short _seg__; \
120 asm volatile("sldt %0" : "=rm" (_seg__) ); \
121 _seg__; \
122 })
123
124 #define set_ldt(seg) \
125 asm volatile("lldt %0" : : "rm" ((unsigned short)(seg)) )
126
127 #endif /* __GNUC__ */
128 #endif /* ASSEMBLER */
129
130 #endif /* _I386_PROC_REG_H_ */
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