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sys/i386/xen/pmap.c
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1 /*- 2 * Copyright (c) 1991 Regents of the University of California. 3 * All rights reserved. 4 * Copyright (c) 1994 John S. Dyson 5 * All rights reserved. 6 * Copyright (c) 1994 David Greenman 7 * All rights reserved. 8 * Copyright (c) 2005 Alan L. Cox <alc@cs.rice.edu> 9 * All rights reserved. 10 * 11 * This code is derived from software contributed to Berkeley by 12 * the Systems Programming Group of the University of Utah Computer 13 * Science Department and William Jolitz of UUNET Technologies Inc. 14 * 15 * Redistribution and use in source and binary forms, with or without 16 * modification, are permitted provided that the following conditions 17 * are met: 18 * 1. Redistributions of source code must retain the above copyright 19 * notice, this list of conditions and the following disclaimer. 20 * 2. Redistributions in binary form must reproduce the above copyright 21 * notice, this list of conditions and the following disclaimer in the 22 * documentation and/or other materials provided with the distribution. 23 * 3. All advertising materials mentioning features or use of this software 24 * must display the following acknowledgement: 25 * This product includes software developed by the University of 26 * California, Berkeley and its contributors. 27 * 4. Neither the name of the University nor the names of its contributors 28 * may be used to endorse or promote products derived from this software 29 * without specific prior written permission. 30 * 31 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 32 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 33 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 34 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 35 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 36 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 37 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 38 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 39 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 40 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 41 * SUCH DAMAGE. 42 * 43 * from: @(#)pmap.c 7.7 (Berkeley) 5/12/91 44 */ 45 /*- 46 * Copyright (c) 2003 Networks Associates Technology, Inc. 47 * All rights reserved. 48 * 49 * This software was developed for the FreeBSD Project by Jake Burkholder, 50 * Safeport Network Services, and Network Associates Laboratories, the 51 * Security Research Division of Network Associates, Inc. under 52 * DARPA/SPAWAR contract N66001-01-C-8035 ("CBOSS"), as part of the DARPA 53 * CHATS research program. 54 * 55 * Redistribution and use in source and binary forms, with or without 56 * modification, are permitted provided that the following conditions 57 * are met: 58 * 1. Redistributions of source code must retain the above copyright 59 * notice, this list of conditions and the following disclaimer. 60 * 2. Redistributions in binary form must reproduce the above copyright 61 * notice, this list of conditions and the following disclaimer in the 62 * documentation and/or other materials provided with the distribution. 63 * 64 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 65 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 66 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 67 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 68 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 69 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 70 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 71 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 72 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 73 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 74 * SUCH DAMAGE. 75 */ 76 77 #include <sys/cdefs.h> 78 __FBSDID("$FreeBSD: releng/8.0/sys/i386/xen/pmap.c 197126 2009-09-12 18:11:48Z kib $"); 79 80 /* 81 * Manages physical address maps. 82 * 83 * In addition to hardware address maps, this 84 * module is called upon to provide software-use-only 85 * maps which may or may not be stored in the same 86 * form as hardware maps. These pseudo-maps are 87 * used to store intermediate results from copy 88 * operations to and from address spaces. 89 * 90 * Since the information managed by this module is 91 * also stored by the logical address mapping module, 92 * this module may throw away valid virtual-to-physical 93 * mappings at almost any time. However, invalidations 94 * of virtual-to-physical mappings must be done as 95 * requested. 96 * 97 * In order to cope with hardware architectures which 98 * make virtual-to-physical map invalidates expensive, 99 * this module may delay invalidate or reduced protection 100 * operations until such time as they are actually 101 * necessary. This module is given full information as 102 * to which processors are currently using which maps, 103 * and to when physical maps must be made correct. 104 */ 105 106 #define PMAP_DIAGNOSTIC 107 108 #include "opt_cpu.h" 109 #include "opt_pmap.h" 110 #include "opt_msgbuf.h" 111 #include "opt_smp.h" 112 #include "opt_xbox.h" 113 114 #include <sys/param.h> 115 #include <sys/systm.h> 116 #include <sys/kernel.h> 117 #include <sys/ktr.h> 118 #include <sys/lock.h> 119 #include <sys/malloc.h> 120 #include <sys/mman.h> 121 #include <sys/msgbuf.h> 122 #include <sys/mutex.h> 123 #include <sys/proc.h> 124 #include <sys/sf_buf.h> 125 #include <sys/sx.h> 126 #include <sys/vmmeter.h> 127 #include <sys/sched.h> 128 #include <sys/sysctl.h> 129 #ifdef SMP 130 #include <sys/smp.h> 131 #endif 132 133 #include <vm/vm.h> 134 #include <vm/vm_param.h> 135 #include <vm/vm_kern.h> 136 #include <vm/vm_page.h> 137 #include <vm/vm_map.h> 138 #include <vm/vm_object.h> 139 #include <vm/vm_extern.h> 140 #include <vm/vm_pageout.h> 141 #include <vm/vm_pager.h> 142 #include <vm/uma.h> 143 144 #include <machine/cpu.h> 145 #include <machine/cputypes.h> 146 #include <machine/md_var.h> 147 #include <machine/pcb.h> 148 #include <machine/specialreg.h> 149 #ifdef SMP 150 #include <machine/smp.h> 151 #endif 152 153 #ifdef XBOX 154 #include <machine/xbox.h> 155 #endif 156 157 #include <xen/interface/xen.h> 158 #include <xen/hypervisor.h> 159 #include <machine/xen/hypercall.h> 160 #include <machine/xen/xenvar.h> 161 #include <machine/xen/xenfunc.h> 162 163 #if !defined(CPU_DISABLE_SSE) && defined(I686_CPU) 164 #define CPU_ENABLE_SSE 165 #endif 166 167 #ifndef PMAP_SHPGPERPROC 168 #define PMAP_SHPGPERPROC 200 169 #endif 170 171 #if defined(DIAGNOSTIC) 172 #define PMAP_DIAGNOSTIC 173 #endif 174 175 #if !defined(PMAP_DIAGNOSTIC) 176 #define PMAP_INLINE __gnu89_inline 177 #else 178 #define PMAP_INLINE 179 #endif 180 181 #define PV_STATS 182 #ifdef PV_STATS 183 #define PV_STAT(x) do { x ; } while (0) 184 #else 185 #define PV_STAT(x) do { } while (0) 186 #endif 187 188 #define pa_index(pa) ((pa) >> PDRSHIFT) 189 #define pa_to_pvh(pa) (&pv_table[pa_index(pa)]) 190 191 /* 192 * Get PDEs and PTEs for user/kernel address space 193 */ 194 #define pmap_pde(m, v) (&((m)->pm_pdir[(vm_offset_t)(v) >> PDRSHIFT])) 195 #define pdir_pde(m, v) (m[(vm_offset_t)(v) >> PDRSHIFT]) 196 197 #define pmap_pde_v(pte) ((*(int *)pte & PG_V) != 0) 198 #define pmap_pte_w(pte) ((*(int *)pte & PG_W) != 0) 199 #define pmap_pte_m(pte) ((*(int *)pte & PG_M) != 0) 200 #define pmap_pte_u(pte) ((*(int *)pte & PG_A) != 0) 201 #define pmap_pte_v(pte) ((*(int *)pte & PG_V) != 0) 202 203 #define pmap_pte_set_prot(pte, v) ((*(int *)pte &= ~PG_PROT), (*(int *)pte |= (v))) 204 205 struct pmap kernel_pmap_store; 206 LIST_HEAD(pmaplist, pmap); 207 static struct pmaplist allpmaps; 208 static struct mtx allpmaps_lock; 209 210 vm_offset_t virtual_avail; /* VA of first avail page (after kernel bss) */ 211 vm_offset_t virtual_end; /* VA of last avail page (end of kernel AS) */ 212 int pgeflag = 0; /* PG_G or-in */ 213 int pseflag = 0; /* PG_PS or-in */ 214 215 int nkpt; 216 vm_offset_t kernel_vm_end; 217 extern u_int32_t KERNend; 218 219 #ifdef PAE 220 pt_entry_t pg_nx; 221 #if !defined(XEN) 222 static uma_zone_t pdptzone; 223 #endif 224 #endif 225 226 /* 227 * Data for the pv entry allocation mechanism 228 */ 229 static int pv_entry_count = 0, pv_entry_max = 0, pv_entry_high_water = 0; 230 static struct md_page *pv_table; 231 static int shpgperproc = PMAP_SHPGPERPROC; 232 233 struct pv_chunk *pv_chunkbase; /* KVA block for pv_chunks */ 234 int pv_maxchunks; /* How many chunks we have KVA for */ 235 vm_offset_t pv_vafree; /* freelist stored in the PTE */ 236 237 /* 238 * All those kernel PT submaps that BSD is so fond of 239 */ 240 struct sysmaps { 241 struct mtx lock; 242 pt_entry_t *CMAP1; 243 pt_entry_t *CMAP2; 244 caddr_t CADDR1; 245 caddr_t CADDR2; 246 }; 247 static struct sysmaps sysmaps_pcpu[MAXCPU]; 248 pt_entry_t *CMAP1 = 0; 249 static pt_entry_t *CMAP3; 250 caddr_t CADDR1 = 0, ptvmmap = 0; 251 static caddr_t CADDR3; 252 struct msgbuf *msgbufp = 0; 253 254 /* 255 * Crashdump maps. 256 */ 257 static caddr_t crashdumpmap; 258 259 static pt_entry_t *PMAP1 = 0, *PMAP2; 260 static pt_entry_t *PADDR1 = 0, *PADDR2; 261 #ifdef SMP 262 static int PMAP1cpu; 263 static int PMAP1changedcpu; 264 SYSCTL_INT(_debug, OID_AUTO, PMAP1changedcpu, CTLFLAG_RD, 265 &PMAP1changedcpu, 0, 266 "Number of times pmap_pte_quick changed CPU with same PMAP1"); 267 #endif 268 static int PMAP1changed; 269 SYSCTL_INT(_debug, OID_AUTO, PMAP1changed, CTLFLAG_RD, 270 &PMAP1changed, 0, 271 "Number of times pmap_pte_quick changed PMAP1"); 272 static int PMAP1unchanged; 273 SYSCTL_INT(_debug, OID_AUTO, PMAP1unchanged, CTLFLAG_RD, 274 &PMAP1unchanged, 0, 275 "Number of times pmap_pte_quick didn't change PMAP1"); 276 static struct mtx PMAP2mutex; 277 278 SYSCTL_NODE(_vm, OID_AUTO, pmap, CTLFLAG_RD, 0, "VM/pmap parameters"); 279 static int pg_ps_enabled; 280 SYSCTL_INT(_vm_pmap, OID_AUTO, pg_ps_enabled, CTLFLAG_RD, &pg_ps_enabled, 0, 281 "Are large page mappings enabled?"); 282 283 SYSCTL_INT(_vm_pmap, OID_AUTO, pv_entry_max, CTLFLAG_RD, &pv_entry_max, 0, 284 "Max number of PV entries"); 285 SYSCTL_INT(_vm_pmap, OID_AUTO, shpgperproc, CTLFLAG_RD, &shpgperproc, 0, 286 "Page share factor per proc"); 287 288 static void free_pv_entry(pmap_t pmap, pv_entry_t pv); 289 static pv_entry_t get_pv_entry(pmap_t locked_pmap, int try); 290 291 static vm_page_t pmap_enter_quick_locked(multicall_entry_t **mcl, int *count, pmap_t pmap, vm_offset_t va, 292 vm_page_t m, vm_prot_t prot, vm_page_t mpte); 293 static int pmap_remove_pte(pmap_t pmap, pt_entry_t *ptq, vm_offset_t sva, 294 vm_page_t *free); 295 static void pmap_remove_page(struct pmap *pmap, vm_offset_t va, 296 vm_page_t *free); 297 static void pmap_remove_entry(struct pmap *pmap, vm_page_t m, 298 vm_offset_t va); 299 static void pmap_insert_entry(pmap_t pmap, vm_offset_t va, vm_page_t m); 300 static boolean_t pmap_try_insert_pv_entry(pmap_t pmap, vm_offset_t va, 301 vm_page_t m); 302 303 static vm_page_t pmap_allocpte(pmap_t pmap, vm_offset_t va, int flags); 304 305 static vm_page_t _pmap_allocpte(pmap_t pmap, unsigned ptepindex, int flags); 306 static int _pmap_unwire_pte_hold(pmap_t pmap, vm_page_t m, vm_page_t *free); 307 static pt_entry_t *pmap_pte_quick(pmap_t pmap, vm_offset_t va); 308 static void pmap_pte_release(pt_entry_t *pte); 309 static int pmap_unuse_pt(pmap_t, vm_offset_t, vm_page_t *); 310 static vm_offset_t pmap_kmem_choose(vm_offset_t addr); 311 static boolean_t pmap_is_prefaultable_locked(pmap_t pmap, vm_offset_t addr); 312 static void pmap_kenter_attr(vm_offset_t va, vm_paddr_t pa, int mode); 313 314 315 #if defined(PAE) && !defined(XEN) 316 static void *pmap_pdpt_allocf(uma_zone_t zone, int bytes, u_int8_t *flags, int wait); 317 #endif 318 319 CTASSERT(1 << PDESHIFT == sizeof(pd_entry_t)); 320 CTASSERT(1 << PTESHIFT == sizeof(pt_entry_t)); 321 322 /* 323 * If you get an error here, then you set KVA_PAGES wrong! See the 324 * description of KVA_PAGES in sys/i386/include/pmap.h. It must be 325 * multiple of 4 for a normal kernel, or a multiple of 8 for a PAE. 326 */ 327 CTASSERT(KERNBASE % (1 << 24) == 0); 328 329 330 331 static __inline void 332 pagezero(void *page) 333 { 334 #if defined(I686_CPU) 335 if (cpu_class == CPUCLASS_686) { 336 #if defined(CPU_ENABLE_SSE) 337 if (cpu_feature & CPUID_SSE2) 338 sse2_pagezero(page); 339 else 340 #endif 341 i686_pagezero(page); 342 } else 343 #endif 344 bzero(page, PAGE_SIZE); 345 } 346 347 void 348 pd_set(struct pmap *pmap, int ptepindex, vm_paddr_t val, int type) 349 { 350 vm_paddr_t pdir_ma = vtomach(&pmap->pm_pdir[ptepindex]); 351 352 switch (type) { 353 case SH_PD_SET_VA: 354 #if 0 355 xen_queue_pt_update(shadow_pdir_ma, 356 xpmap_ptom(val & ~(PG_RW))); 357 #endif 358 xen_queue_pt_update(pdir_ma, 359 xpmap_ptom(val)); 360 break; 361 case SH_PD_SET_VA_MA: 362 #if 0 363 xen_queue_pt_update(shadow_pdir_ma, 364 val & ~(PG_RW)); 365 #endif 366 xen_queue_pt_update(pdir_ma, val); 367 break; 368 case SH_PD_SET_VA_CLEAR: 369 #if 0 370 xen_queue_pt_update(shadow_pdir_ma, 0); 371 #endif 372 xen_queue_pt_update(pdir_ma, 0); 373 break; 374 } 375 } 376 377 /* 378 * Move the kernel virtual free pointer to the next 379 * 4MB. This is used to help improve performance 380 * by using a large (4MB) page for much of the kernel 381 * (.text, .data, .bss) 382 */ 383 static vm_offset_t 384 pmap_kmem_choose(vm_offset_t addr) 385 { 386 vm_offset_t newaddr = addr; 387 388 #ifndef DISABLE_PSE 389 if (cpu_feature & CPUID_PSE) 390 newaddr = (addr + PDRMASK) & ~PDRMASK; 391 #endif 392 return newaddr; 393 } 394 395 /* 396 * Bootstrap the system enough to run with virtual memory. 397 * 398 * On the i386 this is called after mapping has already been enabled 399 * and just syncs the pmap module with what has already been done. 400 * [We can't call it easily with mapping off since the kernel is not 401 * mapped with PA == VA, hence we would have to relocate every address 402 * from the linked base (virtual) address "KERNBASE" to the actual 403 * (physical) address starting relative to 0] 404 */ 405 void 406 pmap_bootstrap(vm_paddr_t firstaddr) 407 { 408 vm_offset_t va; 409 pt_entry_t *pte, *unused; 410 struct sysmaps *sysmaps; 411 int i; 412 413 /* 414 * XXX The calculation of virtual_avail is wrong. It's NKPT*PAGE_SIZE too 415 * large. It should instead be correctly calculated in locore.s and 416 * not based on 'first' (which is a physical address, not a virtual 417 * address, for the start of unused physical memory). The kernel 418 * page tables are NOT double mapped and thus should not be included 419 * in this calculation. 420 */ 421 virtual_avail = (vm_offset_t) KERNBASE + firstaddr; 422 virtual_avail = pmap_kmem_choose(virtual_avail); 423 424 virtual_end = VM_MAX_KERNEL_ADDRESS; 425 426 /* 427 * Initialize the kernel pmap (which is statically allocated). 428 */ 429 PMAP_LOCK_INIT(kernel_pmap); 430 kernel_pmap->pm_pdir = (pd_entry_t *) (KERNBASE + (u_int)IdlePTD); 431 #ifdef PAE 432 kernel_pmap->pm_pdpt = (pdpt_entry_t *) (KERNBASE + (u_int)IdlePDPT); 433 #endif 434 kernel_pmap->pm_active = -1; /* don't allow deactivation */ 435 TAILQ_INIT(&kernel_pmap->pm_pvchunk); 436 LIST_INIT(&allpmaps); 437 mtx_init(&allpmaps_lock, "allpmaps", NULL, MTX_SPIN); 438 mtx_lock_spin(&allpmaps_lock); 439 LIST_INSERT_HEAD(&allpmaps, kernel_pmap, pm_list); 440 mtx_unlock_spin(&allpmaps_lock); 441 if (nkpt == 0) 442 nkpt = NKPT; 443 444 /* 445 * Reserve some special page table entries/VA space for temporary 446 * mapping of pages. 447 */ 448 #define SYSMAP(c, p, v, n) \ 449 v = (c)va; va += ((n)*PAGE_SIZE); p = pte; pte += (n); 450 451 va = virtual_avail; 452 pte = vtopte(va); 453 454 /* 455 * CMAP1/CMAP2 are used for zeroing and copying pages. 456 * CMAP3 is used for the idle process page zeroing. 457 */ 458 for (i = 0; i < MAXCPU; i++) { 459 sysmaps = &sysmaps_pcpu[i]; 460 mtx_init(&sysmaps->lock, "SYSMAPS", NULL, MTX_DEF); 461 SYSMAP(caddr_t, sysmaps->CMAP1, sysmaps->CADDR1, 1) 462 SYSMAP(caddr_t, sysmaps->CMAP2, sysmaps->CADDR2, 1) 463 } 464 SYSMAP(caddr_t, CMAP1, CADDR1, 1) 465 SYSMAP(caddr_t, CMAP3, CADDR3, 1) 466 PT_SET_MA(CADDR3, 0); 467 468 /* 469 * Crashdump maps. 470 */ 471 SYSMAP(caddr_t, unused, crashdumpmap, MAXDUMPPGS) 472 473 /* 474 * ptvmmap is used for reading arbitrary physical pages via /dev/mem. 475 */ 476 SYSMAP(caddr_t, unused, ptvmmap, 1) 477 478 /* 479 * msgbufp is used to map the system message buffer. 480 */ 481 SYSMAP(struct msgbuf *, unused, msgbufp, atop(round_page(MSGBUF_SIZE))) 482 483 /* 484 * ptemap is used for pmap_pte_quick 485 */ 486 SYSMAP(pt_entry_t *, PMAP1, PADDR1, 1); 487 SYSMAP(pt_entry_t *, PMAP2, PADDR2, 1); 488 489 mtx_init(&PMAP2mutex, "PMAP2", NULL, MTX_DEF); 490 491 virtual_avail = va; 492 PT_SET_MA(CADDR1, 0); 493 494 /* 495 * Leave in place an identity mapping (virt == phys) for the low 1 MB 496 * physical memory region that is used by the ACPI wakeup code. This 497 * mapping must not have PG_G set. 498 */ 499 #ifndef XEN 500 /* 501 * leave here deliberately to show that this is not supported 502 */ 503 #ifdef XBOX 504 /* FIXME: This is gross, but needed for the XBOX. Since we are in such 505 * an early stadium, we cannot yet neatly map video memory ... :-( 506 * Better fixes are very welcome! */ 507 if (!arch_i386_is_xbox) 508 #endif 509 for (i = 1; i < NKPT; i++) 510 PTD[i] = 0; 511 512 /* Initialize the PAT MSR if present. */ 513 pmap_init_pat(); 514 515 /* Turn on PG_G on kernel page(s) */ 516 pmap_set_pg(); 517 #endif 518 } 519 520 /* 521 * Setup the PAT MSR. 522 */ 523 void 524 pmap_init_pat(void) 525 { 526 uint64_t pat_msr; 527 528 /* Bail if this CPU doesn't implement PAT. */ 529 if (!(cpu_feature & CPUID_PAT)) 530 return; 531 532 #ifdef PAT_WORKS 533 /* 534 * Leave the indices 0-3 at the default of WB, WT, UC, and UC-. 535 * Program 4 and 5 as WP and WC. 536 * Leave 6 and 7 as UC and UC-. 537 */ 538 pat_msr = rdmsr(MSR_PAT); 539 pat_msr &= ~(PAT_MASK(4) | PAT_MASK(5)); 540 pat_msr |= PAT_VALUE(4, PAT_WRITE_PROTECTED) | 541 PAT_VALUE(5, PAT_WRITE_COMBINING); 542 #else 543 /* 544 * Due to some Intel errata, we can only safely use the lower 4 545 * PAT entries. Thus, just replace PAT Index 2 with WC instead 546 * of UC-. 547 * 548 * Intel Pentium III Processor Specification Update 549 * Errata E.27 (Upper Four PAT Entries Not Usable With Mode B 550 * or Mode C Paging) 551 * 552 * Intel Pentium IV Processor Specification Update 553 * Errata N46 (PAT Index MSB May Be Calculated Incorrectly) 554 */ 555 pat_msr = rdmsr(MSR_PAT); 556 pat_msr &= ~PAT_MASK(2); 557 pat_msr |= PAT_VALUE(2, PAT_WRITE_COMBINING); 558 #endif 559 wrmsr(MSR_PAT, pat_msr); 560 } 561 562 /* 563 * Set PG_G on kernel pages. Only the BSP calls this when SMP is turned on. 564 */ 565 void 566 pmap_set_pg(void) 567 { 568 pd_entry_t pdir; 569 pt_entry_t *pte; 570 vm_offset_t va, endva; 571 int i; 572 573 if (pgeflag == 0) 574 return; 575 576 i = KERNLOAD/NBPDR; 577 endva = KERNBASE + KERNend; 578 579 if (pseflag) { 580 va = KERNBASE + KERNLOAD; 581 while (va < endva) { 582 pdir = kernel_pmap->pm_pdir[KPTDI+i]; 583 pdir |= pgeflag; 584 kernel_pmap->pm_pdir[KPTDI+i] = PTD[KPTDI+i] = pdir; 585 invltlb(); /* Play it safe, invltlb() every time */ 586 i++; 587 va += NBPDR; 588 } 589 } else { 590 va = (vm_offset_t)btext; 591 while (va < endva) { 592 pte = vtopte(va); 593 if (*pte & PG_V) 594 *pte |= pgeflag; 595 invltlb(); /* Play it safe, invltlb() every time */ 596 va += PAGE_SIZE; 597 } 598 } 599 } 600 601 /* 602 * Initialize a vm_page's machine-dependent fields. 603 */ 604 void 605 pmap_page_init(vm_page_t m) 606 { 607 608 TAILQ_INIT(&m->md.pv_list); 609 m->md.pat_mode = PAT_WRITE_BACK; 610 } 611 612 #if defined(PAE) && !defined(XEN) 613 static void * 614 pmap_pdpt_allocf(uma_zone_t zone, int bytes, u_int8_t *flags, int wait) 615 { 616 617 /* Inform UMA that this allocator uses kernel_map/object. */ 618 *flags = UMA_SLAB_KERNEL; 619 return ((void *)kmem_alloc_contig(kernel_map, bytes, wait, 0x0ULL, 620 0xffffffffULL, 1, 0, VM_MEMATTR_DEFAULT)); 621 } 622 #endif 623 624 /* 625 * ABuse the pte nodes for unmapped kva to thread a kva freelist through. 626 * Requirements: 627 * - Must deal with pages in order to ensure that none of the PG_* bits 628 * are ever set, PG_V in particular. 629 * - Assumes we can write to ptes without pte_store() atomic ops, even 630 * on PAE systems. This should be ok. 631 * - Assumes nothing will ever test these addresses for 0 to indicate 632 * no mapping instead of correctly checking PG_V. 633 * - Assumes a vm_offset_t will fit in a pte (true for i386). 634 * Because PG_V is never set, there can be no mappings to invalidate. 635 */ 636 static int ptelist_count = 0; 637 static vm_offset_t 638 pmap_ptelist_alloc(vm_offset_t *head) 639 { 640 vm_offset_t va; 641 vm_offset_t *phead = (vm_offset_t *)*head; 642 643 if (ptelist_count == 0) { 644 printf("out of memory!!!!!!\n"); 645 return (0); /* Out of memory */ 646 } 647 ptelist_count--; 648 va = phead[ptelist_count]; 649 return (va); 650 } 651 652 static void 653 pmap_ptelist_free(vm_offset_t *head, vm_offset_t va) 654 { 655 vm_offset_t *phead = (vm_offset_t *)*head; 656 657 phead[ptelist_count++] = va; 658 } 659 660 static void 661 pmap_ptelist_init(vm_offset_t *head, void *base, int npages) 662 { 663 int i, nstackpages; 664 vm_offset_t va; 665 vm_page_t m; 666 667 nstackpages = (npages + PAGE_SIZE/sizeof(vm_offset_t) - 1)/ (PAGE_SIZE/sizeof(vm_offset_t)); 668 for (i = 0; i < nstackpages; i++) { 669 va = (vm_offset_t)base + i * PAGE_SIZE; 670 m = vm_page_alloc(NULL, i, 671 VM_ALLOC_NORMAL | VM_ALLOC_NOOBJ | VM_ALLOC_WIRED | 672 VM_ALLOC_ZERO); 673 pmap_qenter(va, &m, 1); 674 } 675 676 *head = (vm_offset_t)base; 677 for (i = npages - 1; i >= nstackpages; i--) { 678 va = (vm_offset_t)base + i * PAGE_SIZE; 679 pmap_ptelist_free(head, va); 680 } 681 } 682 683 684 /* 685 * Initialize the pmap module. 686 * Called by vm_init, to initialize any structures that the pmap 687 * system needs to map virtual memory. 688 */ 689 void 690 pmap_init(void) 691 { 692 vm_page_t mpte; 693 vm_size_t s; 694 int i, pv_npg; 695 696 /* 697 * Initialize the vm page array entries for the kernel pmap's 698 * page table pages. 699 */ 700 for (i = 0; i < nkpt; i++) { 701 mpte = PHYS_TO_VM_PAGE(xpmap_mtop(PTD[i + KPTDI] & PG_FRAME)); 702 KASSERT(mpte >= vm_page_array && 703 mpte < &vm_page_array[vm_page_array_size], 704 ("pmap_init: page table page is out of range")); 705 mpte->pindex = i + KPTDI; 706 mpte->phys_addr = xpmap_mtop(PTD[i + KPTDI] & PG_FRAME); 707 } 708 709 /* 710 * Initialize the address space (zone) for the pv entries. Set a 711 * high water mark so that the system can recover from excessive 712 * numbers of pv entries. 713 */ 714 TUNABLE_INT_FETCH("vm.pmap.shpgperproc", &shpgperproc); 715 pv_entry_max = shpgperproc * maxproc + cnt.v_page_count; 716 TUNABLE_INT_FETCH("vm.pmap.pv_entries", &pv_entry_max); 717 pv_entry_max = roundup(pv_entry_max, _NPCPV); 718 pv_entry_high_water = 9 * (pv_entry_max / 10); 719 720 /* 721 * Are large page mappings enabled? 722 */ 723 TUNABLE_INT_FETCH("vm.pmap.pg_ps_enabled", &pg_ps_enabled); 724 725 /* 726 * Calculate the size of the pv head table for superpages. 727 */ 728 for (i = 0; phys_avail[i + 1]; i += 2); 729 pv_npg = round_4mpage(phys_avail[(i - 2) + 1]) / NBPDR; 730 731 /* 732 * Allocate memory for the pv head table for superpages. 733 */ 734 s = (vm_size_t)(pv_npg * sizeof(struct md_page)); 735 s = round_page(s); 736 pv_table = (struct md_page *)kmem_alloc(kernel_map, s); 737 for (i = 0; i < pv_npg; i++) 738 TAILQ_INIT(&pv_table[i].pv_list); 739 740 pv_maxchunks = MAX(pv_entry_max / _NPCPV, maxproc); 741 pv_chunkbase = (struct pv_chunk *)kmem_alloc_nofault(kernel_map, 742 PAGE_SIZE * pv_maxchunks); 743 if (pv_chunkbase == NULL) 744 panic("pmap_init: not enough kvm for pv chunks"); 745 pmap_ptelist_init(&pv_vafree, pv_chunkbase, pv_maxchunks); 746 #if defined(PAE) && !defined(XEN) 747 pdptzone = uma_zcreate("PDPT", NPGPTD * sizeof(pdpt_entry_t), NULL, 748 NULL, NULL, NULL, (NPGPTD * sizeof(pdpt_entry_t)) - 1, 749 UMA_ZONE_VM | UMA_ZONE_NOFREE); 750 uma_zone_set_allocf(pdptzone, pmap_pdpt_allocf); 751 #endif 752 } 753 754 755 /*************************************************** 756 * Low level helper routines..... 757 ***************************************************/ 758 759 /* 760 * Determine the appropriate bits to set in a PTE or PDE for a specified 761 * caching mode. 762 */ 763 int 764 pmap_cache_bits(int mode, boolean_t is_pde) 765 { 766 int pat_flag, pat_index, cache_bits; 767 768 /* The PAT bit is different for PTE's and PDE's. */ 769 pat_flag = is_pde ? PG_PDE_PAT : PG_PTE_PAT; 770 771 /* If we don't support PAT, map extended modes to older ones. */ 772 if (!(cpu_feature & CPUID_PAT)) { 773 switch (mode) { 774 case PAT_UNCACHEABLE: 775 case PAT_WRITE_THROUGH: 776 case PAT_WRITE_BACK: 777 break; 778 case PAT_UNCACHED: 779 case PAT_WRITE_COMBINING: 780 case PAT_WRITE_PROTECTED: 781 mode = PAT_UNCACHEABLE; 782 break; 783 } 784 } 785 786 /* Map the caching mode to a PAT index. */ 787 switch (mode) { 788 #ifdef PAT_WORKS 789 case PAT_UNCACHEABLE: 790 pat_index = 3; 791 break; 792 case PAT_WRITE_THROUGH: 793 pat_index = 1; 794 break; 795 case PAT_WRITE_BACK: 796 pat_index = 0; 797 break; 798 case PAT_UNCACHED: 799 pat_index = 2; 800 break; 801 case PAT_WRITE_COMBINING: 802 pat_index = 5; 803 break; 804 case PAT_WRITE_PROTECTED: 805 pat_index = 4; 806 break; 807 #else 808 case PAT_UNCACHED: 809 case PAT_UNCACHEABLE: 810 case PAT_WRITE_PROTECTED: 811 pat_index = 3; 812 break; 813 case PAT_WRITE_THROUGH: 814 pat_index = 1; 815 break; 816 case PAT_WRITE_BACK: 817 pat_index = 0; 818 break; 819 case PAT_WRITE_COMBINING: 820 pat_index = 2; 821 break; 822 #endif 823 default: 824 panic("Unknown caching mode %d\n", mode); 825 } 826 827 /* Map the 3-bit index value into the PAT, PCD, and PWT bits. */ 828 cache_bits = 0; 829 if (pat_index & 0x4) 830 cache_bits |= pat_flag; 831 if (pat_index & 0x2) 832 cache_bits |= PG_NC_PCD; 833 if (pat_index & 0x1) 834 cache_bits |= PG_NC_PWT; 835 return (cache_bits); 836 } 837 #ifdef SMP 838 /* 839 * For SMP, these functions have to use the IPI mechanism for coherence. 840 * 841 * N.B.: Before calling any of the following TLB invalidation functions, 842 * the calling processor must ensure that all stores updating a non- 843 * kernel page table are globally performed. Otherwise, another 844 * processor could cache an old, pre-update entry without being 845 * invalidated. This can happen one of two ways: (1) The pmap becomes 846 * active on another processor after its pm_active field is checked by 847 * one of the following functions but before a store updating the page 848 * table is globally performed. (2) The pmap becomes active on another 849 * processor before its pm_active field is checked but due to 850 * speculative loads one of the following functions stills reads the 851 * pmap as inactive on the other processor. 852 * 853 * The kernel page table is exempt because its pm_active field is 854 * immutable. The kernel page table is always active on every 855 * processor. 856 */ 857 void 858 pmap_invalidate_page(pmap_t pmap, vm_offset_t va) 859 { 860 u_int cpumask; 861 u_int other_cpus; 862 863 CTR2(KTR_PMAP, "pmap_invalidate_page: pmap=%p va=0x%x", 864 pmap, va); 865 866 sched_pin(); 867 if (pmap == kernel_pmap || pmap->pm_active == all_cpus) { 868 invlpg(va); 869 smp_invlpg(va); 870 } else { 871 cpumask = PCPU_GET(cpumask); 872 other_cpus = PCPU_GET(other_cpus); 873 if (pmap->pm_active & cpumask) 874 invlpg(va); 875 if (pmap->pm_active & other_cpus) 876 smp_masked_invlpg(pmap->pm_active & other_cpus, va); 877 } 878 sched_unpin(); 879 PT_UPDATES_FLUSH(); 880 } 881 882 void 883 pmap_invalidate_range(pmap_t pmap, vm_offset_t sva, vm_offset_t eva) 884 { 885 u_int cpumask; 886 u_int other_cpus; 887 vm_offset_t addr; 888 889 CTR3(KTR_PMAP, "pmap_invalidate_page: pmap=%p eva=0x%x sva=0x%x", 890 pmap, sva, eva); 891 892 sched_pin(); 893 if (pmap == kernel_pmap || pmap->pm_active == all_cpus) { 894 for (addr = sva; addr < eva; addr += PAGE_SIZE) 895 invlpg(addr); 896 smp_invlpg_range(sva, eva); 897 } else { 898 cpumask = PCPU_GET(cpumask); 899 other_cpus = PCPU_GET(other_cpus); 900 if (pmap->pm_active & cpumask) 901 for (addr = sva; addr < eva; addr += PAGE_SIZE) 902 invlpg(addr); 903 if (pmap->pm_active & other_cpus) 904 smp_masked_invlpg_range(pmap->pm_active & other_cpus, 905 sva, eva); 906 } 907 sched_unpin(); 908 PT_UPDATES_FLUSH(); 909 } 910 911 void 912 pmap_invalidate_all(pmap_t pmap) 913 { 914 u_int cpumask; 915 u_int other_cpus; 916 917 CTR1(KTR_PMAP, "pmap_invalidate_page: pmap=%p", pmap); 918 919 sched_pin(); 920 if (pmap == kernel_pmap || pmap->pm_active == all_cpus) { 921 invltlb(); 922 smp_invltlb(); 923 } else { 924 cpumask = PCPU_GET(cpumask); 925 other_cpus = PCPU_GET(other_cpus); 926 if (pmap->pm_active & cpumask) 927 invltlb(); 928 if (pmap->pm_active & other_cpus) 929 smp_masked_invltlb(pmap->pm_active & other_cpus); 930 } 931 sched_unpin(); 932 } 933 934 void 935 pmap_invalidate_cache(void) 936 { 937 938 sched_pin(); 939 wbinvd(); 940 smp_cache_flush(); 941 sched_unpin(); 942 } 943 #else /* !SMP */ 944 /* 945 * Normal, non-SMP, 486+ invalidation functions. 946 * We inline these within pmap.c for speed. 947 */ 948 PMAP_INLINE void 949 pmap_invalidate_page(pmap_t pmap, vm_offset_t va) 950 { 951 CTR2(KTR_PMAP, "pmap_invalidate_page: pmap=%p va=0x%x", 952 pmap, va); 953 954 if (pmap == kernel_pmap || pmap->pm_active) 955 invlpg(va); 956 PT_UPDATES_FLUSH(); 957 } 958 959 PMAP_INLINE void 960 pmap_invalidate_range(pmap_t pmap, vm_offset_t sva, vm_offset_t eva) 961 { 962 vm_offset_t addr; 963 964 if (eva - sva > PAGE_SIZE) 965 CTR3(KTR_PMAP, "pmap_invalidate_range: pmap=%p sva=0x%x eva=0x%x", 966 pmap, sva, eva); 967 968 if (pmap == kernel_pmap || pmap->pm_active) 969 for (addr = sva; addr < eva; addr += PAGE_SIZE) 970 invlpg(addr); 971 PT_UPDATES_FLUSH(); 972 } 973 974 PMAP_INLINE void 975 pmap_invalidate_all(pmap_t pmap) 976 { 977 978 CTR1(KTR_PMAP, "pmap_invalidate_all: pmap=%p", pmap); 979 980 if (pmap == kernel_pmap || pmap->pm_active) 981 invltlb(); 982 } 983 984 PMAP_INLINE void 985 pmap_invalidate_cache(void) 986 { 987 988 wbinvd(); 989 } 990 #endif /* !SMP */ 991 992 void 993 pmap_invalidate_cache_range(vm_offset_t sva, vm_offset_t eva) 994 { 995 996 KASSERT((sva & PAGE_MASK) == 0, 997 ("pmap_invalidate_cache_range: sva not page-aligned")); 998 KASSERT((eva & PAGE_MASK) == 0, 999 ("pmap_invalidate_cache_range: eva not page-aligned")); 1000 1001 if (cpu_feature & CPUID_SS) 1002 ; /* If "Self Snoop" is supported, do nothing. */ 1003 else if (cpu_feature & CPUID_CLFSH) { 1004 1005 /* 1006 * Otherwise, do per-cache line flush. Use the mfence 1007 * instruction to insure that previous stores are 1008 * included in the write-back. The processor 1009 * propagates flush to other processors in the cache 1010 * coherence domain. 1011 */ 1012 mfence(); 1013 for (; sva < eva; sva += cpu_clflush_line_size) 1014 clflush(sva); 1015 mfence(); 1016 } else { 1017 1018 /* 1019 * No targeted cache flush methods are supported by CPU, 1020 * globally invalidate cache as a last resort. 1021 */ 1022 pmap_invalidate_cache(); 1023 } 1024 } 1025 1026 /* 1027 * Are we current address space or kernel? N.B. We return FALSE when 1028 * a pmap's page table is in use because a kernel thread is borrowing 1029 * it. The borrowed page table can change spontaneously, making any 1030 * dependence on its continued use subject to a race condition. 1031 */ 1032 static __inline int 1033 pmap_is_current(pmap_t pmap) 1034 { 1035 1036 return (pmap == kernel_pmap || 1037 (pmap == vmspace_pmap(curthread->td_proc->p_vmspace) && 1038 (pmap->pm_pdir[PTDPTDI] & PG_FRAME) == (PTDpde[0] & PG_FRAME))); 1039 } 1040 1041 /* 1042 * If the given pmap is not the current or kernel pmap, the returned pte must 1043 * be released by passing it to pmap_pte_release(). 1044 */ 1045 pt_entry_t * 1046 pmap_pte(pmap_t pmap, vm_offset_t va) 1047 { 1048 pd_entry_t newpf; 1049 pd_entry_t *pde; 1050 1051 pde = pmap_pde(pmap, va); 1052 if (*pde & PG_PS) 1053 return (pde); 1054 if (*pde != 0) { 1055 /* are we current address space or kernel? */ 1056 if (pmap_is_current(pmap)) 1057 return (vtopte(va)); 1058 mtx_lock(&PMAP2mutex); 1059 newpf = *pde & PG_FRAME; 1060 if ((*PMAP2 & PG_FRAME) != newpf) { 1061 PT_SET_MA(PADDR2, newpf | PG_V | PG_A | PG_M); 1062 CTR3(KTR_PMAP, "pmap_pte: pmap=%p va=0x%x newpte=0x%08x", 1063 pmap, va, (*PMAP2 & 0xffffffff)); 1064 } 1065 1066 return (PADDR2 + (i386_btop(va) & (NPTEPG - 1))); 1067 } 1068 return (0); 1069 } 1070 1071 /* 1072 * Releases a pte that was obtained from pmap_pte(). Be prepared for the pte 1073 * being NULL. 1074 */ 1075 static __inline void 1076 pmap_pte_release(pt_entry_t *pte) 1077 { 1078 1079 if ((pt_entry_t *)((vm_offset_t)pte & ~PAGE_MASK) == PADDR2) { 1080 CTR1(KTR_PMAP, "pmap_pte_release: pte=0x%jx", 1081 *PMAP2); 1082 PT_SET_VA(PMAP2, 0, TRUE); 1083 mtx_unlock(&PMAP2mutex); 1084 } 1085 } 1086 1087 static __inline void 1088 invlcaddr(void *caddr) 1089 { 1090 1091 invlpg((u_int)caddr); 1092 PT_UPDATES_FLUSH(); 1093 } 1094 1095 /* 1096 * Super fast pmap_pte routine best used when scanning 1097 * the pv lists. This eliminates many coarse-grained 1098 * invltlb calls. Note that many of the pv list 1099 * scans are across different pmaps. It is very wasteful 1100 * to do an entire invltlb for checking a single mapping. 1101 * 1102 * If the given pmap is not the current pmap, vm_page_queue_mtx 1103 * must be held and curthread pinned to a CPU. 1104 */ 1105 static pt_entry_t * 1106 pmap_pte_quick(pmap_t pmap, vm_offset_t va) 1107 { 1108 pd_entry_t newpf; 1109 pd_entry_t *pde; 1110 1111 pde = pmap_pde(pmap, va); 1112 if (*pde & PG_PS) 1113 return (pde); 1114 if (*pde != 0) { 1115 /* are we current address space or kernel? */ 1116 if (pmap_is_current(pmap)) 1117 return (vtopte(va)); 1118 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 1119 KASSERT(curthread->td_pinned > 0, ("curthread not pinned")); 1120 newpf = *pde & PG_FRAME; 1121 if ((*PMAP1 & PG_FRAME) != newpf) { 1122 PT_SET_MA(PADDR1, newpf | PG_V | PG_A | PG_M); 1123 CTR3(KTR_PMAP, "pmap_pte_quick: pmap=%p va=0x%x newpte=0x%08x", 1124 pmap, va, (u_long)*PMAP1); 1125 1126 #ifdef SMP 1127 PMAP1cpu = PCPU_GET(cpuid); 1128 #endif 1129 PMAP1changed++; 1130 } else 1131 #ifdef SMP 1132 if (PMAP1cpu != PCPU_GET(cpuid)) { 1133 PMAP1cpu = PCPU_GET(cpuid); 1134 invlcaddr(PADDR1); 1135 PMAP1changedcpu++; 1136 } else 1137 #endif 1138 PMAP1unchanged++; 1139 return (PADDR1 + (i386_btop(va) & (NPTEPG - 1))); 1140 } 1141 return (0); 1142 } 1143 1144 /* 1145 * Routine: pmap_extract 1146 * Function: 1147 * Extract the physical page address associated 1148 * with the given map/virtual_address pair. 1149 */ 1150 vm_paddr_t 1151 pmap_extract(pmap_t pmap, vm_offset_t va) 1152 { 1153 vm_paddr_t rtval; 1154 pt_entry_t *pte; 1155 pd_entry_t pde; 1156 pt_entry_t pteval; 1157 1158 rtval = 0; 1159 PMAP_LOCK(pmap); 1160 pde = pmap->pm_pdir[va >> PDRSHIFT]; 1161 if (pde != 0) { 1162 if ((pde & PG_PS) != 0) { 1163 rtval = xpmap_mtop(pde & PG_PS_FRAME) | (va & PDRMASK); 1164 PMAP_UNLOCK(pmap); 1165 return rtval; 1166 } 1167 pte = pmap_pte(pmap, va); 1168 pteval = *pte ? xpmap_mtop(*pte) : 0; 1169 rtval = (pteval & PG_FRAME) | (va & PAGE_MASK); 1170 pmap_pte_release(pte); 1171 } 1172 PMAP_UNLOCK(pmap); 1173 return (rtval); 1174 } 1175 1176 /* 1177 * Routine: pmap_extract_ma 1178 * Function: 1179 * Like pmap_extract, but returns machine address 1180 */ 1181 vm_paddr_t 1182 pmap_extract_ma(pmap_t pmap, vm_offset_t va) 1183 { 1184 vm_paddr_t rtval; 1185 pt_entry_t *pte; 1186 pd_entry_t pde; 1187 1188 rtval = 0; 1189 PMAP_LOCK(pmap); 1190 pde = pmap->pm_pdir[va >> PDRSHIFT]; 1191 if (pde != 0) { 1192 if ((pde & PG_PS) != 0) { 1193 rtval = (pde & ~PDRMASK) | (va & PDRMASK); 1194 PMAP_UNLOCK(pmap); 1195 return rtval; 1196 } 1197 pte = pmap_pte(pmap, va); 1198 rtval = (*pte & PG_FRAME) | (va & PAGE_MASK); 1199 pmap_pte_release(pte); 1200 } 1201 PMAP_UNLOCK(pmap); 1202 return (rtval); 1203 } 1204 1205 /* 1206 * Routine: pmap_extract_and_hold 1207 * Function: 1208 * Atomically extract and hold the physical page 1209 * with the given pmap and virtual address pair 1210 * if that mapping permits the given protection. 1211 */ 1212 vm_page_t 1213 pmap_extract_and_hold(pmap_t pmap, vm_offset_t va, vm_prot_t prot) 1214 { 1215 pd_entry_t pde; 1216 pt_entry_t pte; 1217 vm_page_t m; 1218 1219 m = NULL; 1220 vm_page_lock_queues(); 1221 PMAP_LOCK(pmap); 1222 pde = PT_GET(pmap_pde(pmap, va)); 1223 if (pde != 0) { 1224 if (pde & PG_PS) { 1225 if ((pde & PG_RW) || (prot & VM_PROT_WRITE) == 0) { 1226 m = PHYS_TO_VM_PAGE((pde & PG_PS_FRAME) | 1227 (va & PDRMASK)); 1228 vm_page_hold(m); 1229 } 1230 } else { 1231 sched_pin(); 1232 pte = PT_GET(pmap_pte_quick(pmap, va)); 1233 if (*PMAP1) 1234 PT_SET_MA(PADDR1, 0); 1235 if ((pte & PG_V) && 1236 ((pte & PG_RW) || (prot & VM_PROT_WRITE) == 0)) { 1237 m = PHYS_TO_VM_PAGE(pte & PG_FRAME); 1238 vm_page_hold(m); 1239 } 1240 sched_unpin(); 1241 } 1242 } 1243 vm_page_unlock_queues(); 1244 PMAP_UNLOCK(pmap); 1245 return (m); 1246 } 1247 1248 /*************************************************** 1249 * Low level mapping routines..... 1250 ***************************************************/ 1251 1252 /* 1253 * Add a wired page to the kva. 1254 * Note: not SMP coherent. 1255 */ 1256 void 1257 pmap_kenter(vm_offset_t va, vm_paddr_t pa) 1258 { 1259 PT_SET_MA(va, xpmap_ptom(pa)| PG_RW | PG_V | pgeflag); 1260 } 1261 1262 void 1263 pmap_kenter_ma(vm_offset_t va, vm_paddr_t ma) 1264 { 1265 pt_entry_t *pte; 1266 1267 pte = vtopte(va); 1268 pte_store_ma(pte, ma | PG_RW | PG_V | pgeflag); 1269 } 1270 1271 1272 static __inline void 1273 pmap_kenter_attr(vm_offset_t va, vm_paddr_t pa, int mode) 1274 { 1275 PT_SET_MA(va, pa | PG_RW | PG_V | pgeflag | pmap_cache_bits(mode, 0)); 1276 } 1277 1278 /* 1279 * Remove a page from the kernel pagetables. 1280 * Note: not SMP coherent. 1281 */ 1282 PMAP_INLINE void 1283 pmap_kremove(vm_offset_t va) 1284 { 1285 pt_entry_t *pte; 1286 1287 pte = vtopte(va); 1288 PT_CLEAR_VA(pte, FALSE); 1289 } 1290 1291 /* 1292 * Used to map a range of physical addresses into kernel 1293 * virtual address space. 1294 * 1295 * The value passed in '*virt' is a suggested virtual address for 1296 * the mapping. Architectures which can support a direct-mapped 1297 * physical to virtual region can return the appropriate address 1298 * within that region, leaving '*virt' unchanged. Other 1299 * architectures should map the pages starting at '*virt' and 1300 * update '*virt' with the first usable address after the mapped 1301 * region. 1302 */ 1303 vm_offset_t 1304 pmap_map(vm_offset_t *virt, vm_paddr_t start, vm_paddr_t end, int prot) 1305 { 1306 vm_offset_t va, sva; 1307 1308 va = sva = *virt; 1309 CTR4(KTR_PMAP, "pmap_map: va=0x%x start=0x%jx end=0x%jx prot=0x%x", 1310 va, start, end, prot); 1311 while (start < end) { 1312 pmap_kenter(va, start); 1313 va += PAGE_SIZE; 1314 start += PAGE_SIZE; 1315 } 1316 pmap_invalidate_range(kernel_pmap, sva, va); 1317 *virt = va; 1318 return (sva); 1319 } 1320 1321 1322 /* 1323 * Add a list of wired pages to the kva 1324 * this routine is only used for temporary 1325 * kernel mappings that do not need to have 1326 * page modification or references recorded. 1327 * Note that old mappings are simply written 1328 * over. The page *must* be wired. 1329 * Note: SMP coherent. Uses a ranged shootdown IPI. 1330 */ 1331 void 1332 pmap_qenter(vm_offset_t sva, vm_page_t *ma, int count) 1333 { 1334 pt_entry_t *endpte, *pte; 1335 vm_paddr_t pa; 1336 vm_offset_t va = sva; 1337 int mclcount = 0; 1338 multicall_entry_t mcl[16]; 1339 multicall_entry_t *mclp = mcl; 1340 int error; 1341 1342 CTR2(KTR_PMAP, "pmap_qenter:sva=0x%x count=%d", va, count); 1343 pte = vtopte(sva); 1344 endpte = pte + count; 1345 while (pte < endpte) { 1346 pa = xpmap_ptom(VM_PAGE_TO_PHYS(*ma)) | pgeflag | PG_RW | PG_V | PG_M | PG_A; 1347 1348 mclp->op = __HYPERVISOR_update_va_mapping; 1349 mclp->args[0] = va; 1350 mclp->args[1] = (uint32_t)(pa & 0xffffffff); 1351 mclp->args[2] = (uint32_t)(pa >> 32); 1352 mclp->args[3] = (*pte & PG_V) ? UVMF_INVLPG|UVMF_ALL : 0; 1353 1354 va += PAGE_SIZE; 1355 pte++; 1356 ma++; 1357 mclp++; 1358 mclcount++; 1359 if (mclcount == 16) { 1360 error = HYPERVISOR_multicall(mcl, mclcount); 1361 mclp = mcl; 1362 mclcount = 0; 1363 KASSERT(error == 0, ("bad multicall %d", error)); 1364 } 1365 } 1366 if (mclcount) { 1367 error = HYPERVISOR_multicall(mcl, mclcount); 1368 KASSERT(error == 0, ("bad multicall %d", error)); 1369 } 1370 1371 #ifdef INVARIANTS 1372 for (pte = vtopte(sva), mclcount = 0; mclcount < count; mclcount++, pte++) 1373 KASSERT(*pte, ("pte not set for va=0x%x", sva + mclcount*PAGE_SIZE)); 1374 #endif 1375 } 1376 1377 1378 /* 1379 * This routine tears out page mappings from the 1380 * kernel -- it is meant only for temporary mappings. 1381 * Note: SMP coherent. Uses a ranged shootdown IPI. 1382 */ 1383 void 1384 pmap_qremove(vm_offset_t sva, int count) 1385 { 1386 vm_offset_t va; 1387 1388 CTR2(KTR_PMAP, "pmap_qremove: sva=0x%x count=%d", sva, count); 1389 va = sva; 1390 vm_page_lock_queues(); 1391 critical_enter(); 1392 while (count-- > 0) { 1393 pmap_kremove(va); 1394 va += PAGE_SIZE; 1395 } 1396 pmap_invalidate_range(kernel_pmap, sva, va); 1397 critical_exit(); 1398 vm_page_unlock_queues(); 1399 } 1400 1401 /*************************************************** 1402 * Page table page management routines..... 1403 ***************************************************/ 1404 static __inline void 1405 pmap_free_zero_pages(vm_page_t free) 1406 { 1407 vm_page_t m; 1408 1409 while (free != NULL) { 1410 m = free; 1411 free = m->right; 1412 vm_page_free_zero(m); 1413 } 1414 } 1415 1416 /* 1417 * This routine unholds page table pages, and if the hold count 1418 * drops to zero, then it decrements the wire count. 1419 */ 1420 static __inline int 1421 pmap_unwire_pte_hold(pmap_t pmap, vm_page_t m, vm_page_t *free) 1422 { 1423 1424 --m->wire_count; 1425 if (m->wire_count == 0) 1426 return _pmap_unwire_pte_hold(pmap, m, free); 1427 else 1428 return 0; 1429 } 1430 1431 static int 1432 _pmap_unwire_pte_hold(pmap_t pmap, vm_page_t m, vm_page_t *free) 1433 { 1434 vm_offset_t pteva; 1435 1436 PT_UPDATES_FLUSH(); 1437 /* 1438 * unmap the page table page 1439 */ 1440 xen_pt_unpin(pmap->pm_pdir[m->pindex]); 1441 /* 1442 * page *might* contain residual mapping :-/ 1443 */ 1444 PD_CLEAR_VA(pmap, m->pindex, TRUE); 1445 pmap_zero_page(m); 1446 --pmap->pm_stats.resident_count; 1447 1448 /* 1449 * This is a release store so that the ordinary store unmapping 1450 * the page table page is globally performed before TLB shoot- 1451 * down is begun. 1452 */ 1453 atomic_subtract_rel_int(&cnt.v_wire_count, 1); 1454 1455 /* 1456 * Do an invltlb to make the invalidated mapping 1457 * take effect immediately. 1458 */ 1459 pteva = VM_MAXUSER_ADDRESS + i386_ptob(m->pindex); 1460 pmap_invalidate_page(pmap, pteva); 1461 1462 /* 1463 * Put page on a list so that it is released after 1464 * *ALL* TLB shootdown is done 1465 */ 1466 m->right = *free; 1467 *free = m; 1468 1469 return 1; 1470 } 1471 1472 /* 1473 * After removing a page table entry, this routine is used to 1474 * conditionally free the page, and manage the hold/wire counts. 1475 */ 1476 static int 1477 pmap_unuse_pt(pmap_t pmap, vm_offset_t va, vm_page_t *free) 1478 { 1479 pd_entry_t ptepde; 1480 vm_page_t mpte; 1481 1482 if (va >= VM_MAXUSER_ADDRESS) 1483 return 0; 1484 ptepde = PT_GET(pmap_pde(pmap, va)); 1485 mpte = PHYS_TO_VM_PAGE(ptepde & PG_FRAME); 1486 return pmap_unwire_pte_hold(pmap, mpte, free); 1487 } 1488 1489 void 1490 pmap_pinit0(pmap_t pmap) 1491 { 1492 1493 PMAP_LOCK_INIT(pmap); 1494 pmap->pm_pdir = (pd_entry_t *)(KERNBASE + (vm_offset_t)IdlePTD); 1495 #ifdef PAE 1496 pmap->pm_pdpt = (pdpt_entry_t *)(KERNBASE + (vm_offset_t)IdlePDPT); 1497 #endif 1498 pmap->pm_active = 0; 1499 PCPU_SET(curpmap, pmap); 1500 TAILQ_INIT(&pmap->pm_pvchunk); 1501 bzero(&pmap->pm_stats, sizeof pmap->pm_stats); 1502 mtx_lock_spin(&allpmaps_lock); 1503 LIST_INSERT_HEAD(&allpmaps, pmap, pm_list); 1504 mtx_unlock_spin(&allpmaps_lock); 1505 } 1506 1507 /* 1508 * Initialize a preallocated and zeroed pmap structure, 1509 * such as one in a vmspace structure. 1510 */ 1511 int 1512 pmap_pinit(pmap_t pmap) 1513 { 1514 vm_page_t m, ptdpg[NPGPTD + 1]; 1515 int npgptd = NPGPTD + 1; 1516 static int color; 1517 int i; 1518 1519 PMAP_LOCK_INIT(pmap); 1520 1521 /* 1522 * No need to allocate page table space yet but we do need a valid 1523 * page directory table. 1524 */ 1525 if (pmap->pm_pdir == NULL) { 1526 pmap->pm_pdir = (pd_entry_t *)kmem_alloc_nofault(kernel_map, 1527 NBPTD); 1528 if (pmap->pm_pdir == NULL) { 1529 PMAP_LOCK_DESTROY(pmap); 1530 return (0); 1531 } 1532 #if defined(XEN) && defined(PAE) 1533 pmap->pm_pdpt = (pd_entry_t *)kmem_alloc_nofault(kernel_map, 1); 1534 #endif 1535 1536 #if defined(PAE) && !defined(XEN) 1537 pmap->pm_pdpt = uma_zalloc(pdptzone, M_WAITOK | M_ZERO); 1538 KASSERT(((vm_offset_t)pmap->pm_pdpt & 1539 ((NPGPTD * sizeof(pdpt_entry_t)) - 1)) == 0, 1540 ("pmap_pinit: pdpt misaligned")); 1541 KASSERT(pmap_kextract((vm_offset_t)pmap->pm_pdpt) < (4ULL<<30), 1542 ("pmap_pinit: pdpt above 4g")); 1543 #endif 1544 } 1545 1546 /* 1547 * allocate the page directory page(s) 1548 */ 1549 for (i = 0; i < npgptd;) { 1550 m = vm_page_alloc(NULL, color++, 1551 VM_ALLOC_NORMAL | VM_ALLOC_NOOBJ | VM_ALLOC_WIRED | 1552 VM_ALLOC_ZERO); 1553 if (m == NULL) 1554 VM_WAIT; 1555 else { 1556 ptdpg[i++] = m; 1557 } 1558 } 1559 pmap_qenter((vm_offset_t)pmap->pm_pdir, ptdpg, NPGPTD); 1560 for (i = 0; i < NPGPTD; i++) { 1561 if ((ptdpg[i]->flags & PG_ZERO) == 0) 1562 pagezero(&pmap->pm_pdir[i*NPTEPG]); 1563 } 1564 1565 mtx_lock_spin(&allpmaps_lock); 1566 LIST_INSERT_HEAD(&allpmaps, pmap, pm_list); 1567 mtx_unlock_spin(&allpmaps_lock); 1568 /* Wire in kernel global address entries. */ 1569 1570 bcopy(PTD + KPTDI, pmap->pm_pdir + KPTDI, nkpt * sizeof(pd_entry_t)); 1571 #ifdef PAE 1572 #ifdef XEN 1573 pmap_qenter((vm_offset_t)pmap->pm_pdpt, &ptdpg[NPGPTD], 1); 1574 if ((ptdpg[NPGPTD]->flags & PG_ZERO) == 0) 1575 bzero(pmap->pm_pdpt, PAGE_SIZE); 1576 #endif 1577 for (i = 0; i < NPGPTD; i++) { 1578 vm_paddr_t ma; 1579 1580 ma = xpmap_ptom(VM_PAGE_TO_PHYS(ptdpg[i])); 1581 pmap->pm_pdpt[i] = ma | PG_V; 1582 1583 } 1584 #endif 1585 #ifdef XEN 1586 for (i = 0; i < NPGPTD; i++) { 1587 pt_entry_t *pd; 1588 vm_paddr_t ma; 1589 1590 ma = xpmap_ptom(VM_PAGE_TO_PHYS(ptdpg[i])); 1591 pd = pmap->pm_pdir + (i * NPDEPG); 1592 PT_SET_MA(pd, *vtopte((vm_offset_t)pd) & ~(PG_M|PG_A|PG_U|PG_RW)); 1593 #if 0 1594 xen_pgd_pin(ma); 1595 #endif 1596 } 1597 1598 #ifdef PAE 1599 PT_SET_MA(pmap->pm_pdpt, *vtopte((vm_offset_t)pmap->pm_pdpt) & ~PG_RW); 1600 #endif 1601 vm_page_lock_queues(); 1602 xen_flush_queue(); 1603 xen_pgdpt_pin(xpmap_ptom(VM_PAGE_TO_PHYS(ptdpg[NPGPTD]))); 1604 for (i = 0; i < NPGPTD; i++) { 1605 vm_paddr_t ma = xpmap_ptom(VM_PAGE_TO_PHYS(ptdpg[i])); 1606 PT_SET_VA_MA(&pmap->pm_pdir[PTDPTDI + i], ma | PG_V | PG_A, FALSE); 1607 } 1608 xen_flush_queue(); 1609 vm_page_unlock_queues(); 1610 #endif 1611 pmap->pm_active = 0; 1612 TAILQ_INIT(&pmap->pm_pvchunk); 1613 bzero(&pmap->pm_stats, sizeof pmap->pm_stats); 1614 1615 return (1); 1616 } 1617 1618 /* 1619 * this routine is called if the page table page is not 1620 * mapped correctly. 1621 */ 1622 static vm_page_t 1623 _pmap_allocpte(pmap_t pmap, unsigned int ptepindex, int flags) 1624 { 1625 vm_paddr_t ptema; 1626 vm_page_t m; 1627 1628 KASSERT((flags & (M_NOWAIT | M_WAITOK)) == M_NOWAIT || 1629 (flags & (M_NOWAIT | M_WAITOK)) == M_WAITOK, 1630 ("_pmap_allocpte: flags is neither M_NOWAIT nor M_WAITOK")); 1631 1632 /* 1633 * Allocate a page table page. 1634 */ 1635 if ((m = vm_page_alloc(NULL, ptepindex, VM_ALLOC_NOOBJ | 1636 VM_ALLOC_WIRED | VM_ALLOC_ZERO)) == NULL) { 1637 if (flags & M_WAITOK) { 1638 PMAP_UNLOCK(pmap); 1639 vm_page_unlock_queues(); 1640 VM_WAIT; 1641 vm_page_lock_queues(); 1642 PMAP_LOCK(pmap); 1643 } 1644 1645 /* 1646 * Indicate the need to retry. While waiting, the page table 1647 * page may have been allocated. 1648 */ 1649 return (NULL); 1650 } 1651 if ((m->flags & PG_ZERO) == 0) 1652 pmap_zero_page(m); 1653 1654 /* 1655 * Map the pagetable page into the process address space, if 1656 * it isn't already there. 1657 */ 1658 pmap->pm_stats.resident_count++; 1659 1660 ptema = xpmap_ptom(VM_PAGE_TO_PHYS(m)); 1661 xen_pt_pin(ptema); 1662 PT_SET_VA_MA(&pmap->pm_pdir[ptepindex], 1663 (ptema | PG_U | PG_RW | PG_V | PG_A | PG_M), TRUE); 1664 1665 KASSERT(pmap->pm_pdir[ptepindex], 1666 ("_pmap_allocpte: ptepindex=%d did not get mapped", ptepindex)); 1667 return (m); 1668 } 1669 1670 static vm_page_t 1671 pmap_allocpte(pmap_t pmap, vm_offset_t va, int flags) 1672 { 1673 unsigned ptepindex; 1674 pd_entry_t ptema; 1675 vm_page_t m; 1676 1677 KASSERT((flags & (M_NOWAIT | M_WAITOK)) == M_NOWAIT || 1678 (flags & (M_NOWAIT | M_WAITOK)) == M_WAITOK, 1679 ("pmap_allocpte: flags is neither M_NOWAIT nor M_WAITOK")); 1680 1681 /* 1682 * Calculate pagetable page index 1683 */ 1684 ptepindex = va >> PDRSHIFT; 1685 retry: 1686 /* 1687 * Get the page directory entry 1688 */ 1689 ptema = pmap->pm_pdir[ptepindex]; 1690 1691 /* 1692 * This supports switching from a 4MB page to a 1693 * normal 4K page. 1694 */ 1695 if (ptema & PG_PS) { 1696 /* 1697 * XXX 1698 */ 1699 pmap->pm_pdir[ptepindex] = 0; 1700 ptema = 0; 1701 pmap->pm_stats.resident_count -= NBPDR / PAGE_SIZE; 1702 pmap_invalidate_all(kernel_pmap); 1703 } 1704 1705 /* 1706 * If the page table page is mapped, we just increment the 1707 * hold count, and activate it. 1708 */ 1709 if (ptema & PG_V) { 1710 m = PHYS_TO_VM_PAGE(xpmap_mtop(ptema) & PG_FRAME); 1711 m->wire_count++; 1712 } else { 1713 /* 1714 * Here if the pte page isn't mapped, or if it has 1715 * been deallocated. 1716 */ 1717 CTR3(KTR_PMAP, "pmap_allocpte: pmap=%p va=0x%08x flags=0x%x", 1718 pmap, va, flags); 1719 m = _pmap_allocpte(pmap, ptepindex, flags); 1720 if (m == NULL && (flags & M_WAITOK)) 1721 goto retry; 1722 1723 KASSERT(pmap->pm_pdir[ptepindex], ("ptepindex=%d did not get mapped", ptepindex)); 1724 } 1725 return (m); 1726 } 1727 1728 1729 /*************************************************** 1730 * Pmap allocation/deallocation routines. 1731 ***************************************************/ 1732 1733 #ifdef SMP 1734 /* 1735 * Deal with a SMP shootdown of other users of the pmap that we are 1736 * trying to dispose of. This can be a bit hairy. 1737 */ 1738 static u_int *lazymask; 1739 static u_int lazyptd; 1740 static volatile u_int lazywait; 1741 1742 void pmap_lazyfix_action(void); 1743 1744 void 1745 pmap_lazyfix_action(void) 1746 { 1747 u_int mymask = PCPU_GET(cpumask); 1748 1749 #ifdef COUNT_IPIS 1750 (*ipi_lazypmap_counts[PCPU_GET(cpuid)])++; 1751 #endif 1752 if (rcr3() == lazyptd) 1753 load_cr3(PCPU_GET(curpcb)->pcb_cr3); 1754 atomic_clear_int(lazymask, mymask); 1755 atomic_store_rel_int(&lazywait, 1); 1756 } 1757 1758 static void 1759 pmap_lazyfix_self(u_int mymask) 1760 { 1761 1762 if (rcr3() == lazyptd) 1763 load_cr3(PCPU_GET(curpcb)->pcb_cr3); 1764 atomic_clear_int(lazymask, mymask); 1765 } 1766 1767 1768 static void 1769 pmap_lazyfix(pmap_t pmap) 1770 { 1771 u_int mymask; 1772 u_int mask; 1773 u_int spins; 1774 1775 while ((mask = pmap->pm_active) != 0) { 1776 spins = 50000000; 1777 mask = mask & -mask; /* Find least significant set bit */ 1778 mtx_lock_spin(&smp_ipi_mtx); 1779 #ifdef PAE 1780 lazyptd = vtophys(pmap->pm_pdpt); 1781 #else 1782 lazyptd = vtophys(pmap->pm_pdir); 1783 #endif 1784 mymask = PCPU_GET(cpumask); 1785 if (mask == mymask) { 1786 lazymask = &pmap->pm_active; 1787 pmap_lazyfix_self(mymask); 1788 } else { 1789 atomic_store_rel_int((u_int *)&lazymask, 1790 (u_int)&pmap->pm_active); 1791 atomic_store_rel_int(&lazywait, 0); 1792 ipi_selected(mask, IPI_LAZYPMAP); 1793 while (lazywait == 0) { 1794 ia32_pause(); 1795 if (--spins == 0) 1796 break; 1797 } 1798 } 1799 mtx_unlock_spin(&smp_ipi_mtx); 1800 if (spins == 0) 1801 printf("pmap_lazyfix: spun for 50000000\n"); 1802 } 1803 } 1804 1805 #else /* SMP */ 1806 1807 /* 1808 * Cleaning up on uniprocessor is easy. For various reasons, we're 1809 * unlikely to have to even execute this code, including the fact 1810 * that the cleanup is deferred until the parent does a wait(2), which 1811 * means that another userland process has run. 1812 */ 1813 static void 1814 pmap_lazyfix(pmap_t pmap) 1815 { 1816 u_int cr3; 1817 1818 cr3 = vtophys(pmap->pm_pdir); 1819 if (cr3 == rcr3()) { 1820 load_cr3(PCPU_GET(curpcb)->pcb_cr3); 1821 pmap->pm_active &= ~(PCPU_GET(cpumask)); 1822 } 1823 } 1824 #endif /* SMP */ 1825 1826 /* 1827 * Release any resources held by the given physical map. 1828 * Called when a pmap initialized by pmap_pinit is being released. 1829 * Should only be called if the map contains no valid mappings. 1830 */ 1831 void 1832 pmap_release(pmap_t pmap) 1833 { 1834 vm_page_t m, ptdpg[2*NPGPTD+1]; 1835 vm_paddr_t ma; 1836 int i; 1837 #ifdef XEN 1838 #ifdef PAE 1839 int npgptd = NPGPTD + 1; 1840 #else 1841 int npgptd = NPGPTD; 1842 #endif 1843 #else 1844 int npgptd = NPGPTD; 1845 #endif 1846 KASSERT(pmap->pm_stats.resident_count == 0, 1847 ("pmap_release: pmap resident count %ld != 0", 1848 pmap->pm_stats.resident_count)); 1849 PT_UPDATES_FLUSH(); 1850 1851 pmap_lazyfix(pmap); 1852 mtx_lock_spin(&allpmaps_lock); 1853 LIST_REMOVE(pmap, pm_list); 1854 mtx_unlock_spin(&allpmaps_lock); 1855 1856 for (i = 0; i < NPGPTD; i++) 1857 ptdpg[i] = PHYS_TO_VM_PAGE(vtophys(pmap->pm_pdir + (i*NPDEPG)) & PG_FRAME); 1858 pmap_qremove((vm_offset_t)pmap->pm_pdir, NPGPTD); 1859 #if defined(PAE) && defined(XEN) 1860 ptdpg[NPGPTD] = PHYS_TO_VM_PAGE(vtophys(pmap->pm_pdpt)); 1861 #endif 1862 1863 for (i = 0; i < npgptd; i++) { 1864 m = ptdpg[i]; 1865 ma = xpmap_ptom(VM_PAGE_TO_PHYS(m)); 1866 /* unpinning L1 and L2 treated the same */ 1867 xen_pgd_unpin(ma); 1868 #ifdef PAE 1869 KASSERT(xpmap_ptom(VM_PAGE_TO_PHYS(m)) == (pmap->pm_pdpt[i] & PG_FRAME), 1870 ("pmap_release: got wrong ptd page")); 1871 #endif 1872 m->wire_count--; 1873 atomic_subtract_int(&cnt.v_wire_count, 1); 1874 vm_page_free(m); 1875 } 1876 PMAP_LOCK_DESTROY(pmap); 1877 } 1878 1879 static int 1880 kvm_size(SYSCTL_HANDLER_ARGS) 1881 { 1882 unsigned long ksize = VM_MAX_KERNEL_ADDRESS - KERNBASE; 1883 1884 return sysctl_handle_long(oidp, &ksize, 0, req); 1885 } 1886 SYSCTL_PROC(_vm, OID_AUTO, kvm_size, CTLTYPE_LONG|CTLFLAG_RD, 1887 0, 0, kvm_size, "IU", "Size of KVM"); 1888 1889 static int 1890 kvm_free(SYSCTL_HANDLER_ARGS) 1891 { 1892 unsigned long kfree = VM_MAX_KERNEL_ADDRESS - kernel_vm_end; 1893 1894 return sysctl_handle_long(oidp, &kfree, 0, req); 1895 } 1896 SYSCTL_PROC(_vm, OID_AUTO, kvm_free, CTLTYPE_LONG|CTLFLAG_RD, 1897 0, 0, kvm_free, "IU", "Amount of KVM free"); 1898 1899 /* 1900 * grow the number of kernel page table entries, if needed 1901 */ 1902 void 1903 pmap_growkernel(vm_offset_t addr) 1904 { 1905 struct pmap *pmap; 1906 vm_paddr_t ptppaddr; 1907 vm_page_t nkpg; 1908 pd_entry_t newpdir; 1909 1910 mtx_assert(&kernel_map->system_mtx, MA_OWNED); 1911 if (kernel_vm_end == 0) { 1912 kernel_vm_end = KERNBASE; 1913 nkpt = 0; 1914 while (pdir_pde(PTD, kernel_vm_end)) { 1915 kernel_vm_end = (kernel_vm_end + PAGE_SIZE * NPTEPG) & ~(PAGE_SIZE * NPTEPG - 1); 1916 nkpt++; 1917 if (kernel_vm_end - 1 >= kernel_map->max_offset) { 1918 kernel_vm_end = kernel_map->max_offset; 1919 break; 1920 } 1921 } 1922 } 1923 addr = roundup2(addr, PAGE_SIZE * NPTEPG); 1924 if (addr - 1 >= kernel_map->max_offset) 1925 addr = kernel_map->max_offset; 1926 while (kernel_vm_end < addr) { 1927 if (pdir_pde(PTD, kernel_vm_end)) { 1928 kernel_vm_end = (kernel_vm_end + PAGE_SIZE * NPTEPG) & ~(PAGE_SIZE * NPTEPG - 1); 1929 if (kernel_vm_end - 1 >= kernel_map->max_offset) { 1930 kernel_vm_end = kernel_map->max_offset; 1931 break; 1932 } 1933 continue; 1934 } 1935 1936 /* 1937 * This index is bogus, but out of the way 1938 */ 1939 nkpg = vm_page_alloc(NULL, nkpt, 1940 VM_ALLOC_NOOBJ | VM_ALLOC_SYSTEM | VM_ALLOC_WIRED); 1941 if (!nkpg) 1942 panic("pmap_growkernel: no memory to grow kernel"); 1943 1944 nkpt++; 1945 1946 pmap_zero_page(nkpg); 1947 ptppaddr = VM_PAGE_TO_PHYS(nkpg); 1948 newpdir = (pd_entry_t) (ptppaddr | PG_V | PG_RW | PG_A | PG_M); 1949 vm_page_lock_queues(); 1950 PD_SET_VA(kernel_pmap, (kernel_vm_end >> PDRSHIFT), newpdir, TRUE); 1951 mtx_lock_spin(&allpmaps_lock); 1952 LIST_FOREACH(pmap, &allpmaps, pm_list) 1953 PD_SET_VA(pmap, (kernel_vm_end >> PDRSHIFT), newpdir, TRUE); 1954 1955 mtx_unlock_spin(&allpmaps_lock); 1956 vm_page_unlock_queues(); 1957 1958 kernel_vm_end = (kernel_vm_end + PAGE_SIZE * NPTEPG) & ~(PAGE_SIZE * NPTEPG - 1); 1959 if (kernel_vm_end - 1 >= kernel_map->max_offset) { 1960 kernel_vm_end = kernel_map->max_offset; 1961 break; 1962 } 1963 } 1964 } 1965 1966 1967 /*************************************************** 1968 * page management routines. 1969 ***************************************************/ 1970 1971 CTASSERT(sizeof(struct pv_chunk) == PAGE_SIZE); 1972 CTASSERT(_NPCM == 11); 1973 1974 static __inline struct pv_chunk * 1975 pv_to_chunk(pv_entry_t pv) 1976 { 1977 1978 return (struct pv_chunk *)((uintptr_t)pv & ~(uintptr_t)PAGE_MASK); 1979 } 1980 1981 #define PV_PMAP(pv) (pv_to_chunk(pv)->pc_pmap) 1982 1983 #define PC_FREE0_9 0xfffffffful /* Free values for index 0 through 9 */ 1984 #define PC_FREE10 0x0000fffful /* Free values for index 10 */ 1985 1986 static uint32_t pc_freemask[11] = { 1987 PC_FREE0_9, PC_FREE0_9, PC_FREE0_9, 1988 PC_FREE0_9, PC_FREE0_9, PC_FREE0_9, 1989 PC_FREE0_9, PC_FREE0_9, PC_FREE0_9, 1990 PC_FREE0_9, PC_FREE10 1991 }; 1992 1993 SYSCTL_INT(_vm_pmap, OID_AUTO, pv_entry_count, CTLFLAG_RD, &pv_entry_count, 0, 1994 "Current number of pv entries"); 1995 1996 #ifdef PV_STATS 1997 static int pc_chunk_count, pc_chunk_allocs, pc_chunk_frees, pc_chunk_tryfail; 1998 1999 SYSCTL_INT(_vm_pmap, OID_AUTO, pc_chunk_count, CTLFLAG_RD, &pc_chunk_count, 0, 2000 "Current number of pv entry chunks"); 2001 SYSCTL_INT(_vm_pmap, OID_AUTO, pc_chunk_allocs, CTLFLAG_RD, &pc_chunk_allocs, 0, 2002 "Current number of pv entry chunks allocated"); 2003 SYSCTL_INT(_vm_pmap, OID_AUTO, pc_chunk_frees, CTLFLAG_RD, &pc_chunk_frees, 0, 2004 "Current number of pv entry chunks frees"); 2005 SYSCTL_INT(_vm_pmap, OID_AUTO, pc_chunk_tryfail, CTLFLAG_RD, &pc_chunk_tryfail, 0, 2006 "Number of times tried to get a chunk page but failed."); 2007 2008 static long pv_entry_frees, pv_entry_allocs; 2009 static int pv_entry_spare; 2010 2011 SYSCTL_LONG(_vm_pmap, OID_AUTO, pv_entry_frees, CTLFLAG_RD, &pv_entry_frees, 0, 2012 "Current number of pv entry frees"); 2013 SYSCTL_LONG(_vm_pmap, OID_AUTO, pv_entry_allocs, CTLFLAG_RD, &pv_entry_allocs, 0, 2014 "Current number of pv entry allocs"); 2015 SYSCTL_INT(_vm_pmap, OID_AUTO, pv_entry_spare, CTLFLAG_RD, &pv_entry_spare, 0, 2016 "Current number of spare pv entries"); 2017 2018 static int pmap_collect_inactive, pmap_collect_active; 2019 2020 SYSCTL_INT(_vm_pmap, OID_AUTO, pmap_collect_inactive, CTLFLAG_RD, &pmap_collect_inactive, 0, 2021 "Current number times pmap_collect called on inactive queue"); 2022 SYSCTL_INT(_vm_pmap, OID_AUTO, pmap_collect_active, CTLFLAG_RD, &pmap_collect_active, 0, 2023 "Current number times pmap_collect called on active queue"); 2024 #endif 2025 2026 /* 2027 * We are in a serious low memory condition. Resort to 2028 * drastic measures to free some pages so we can allocate 2029 * another pv entry chunk. This is normally called to 2030 * unmap inactive pages, and if necessary, active pages. 2031 */ 2032 static void 2033 pmap_collect(pmap_t locked_pmap, struct vpgqueues *vpq) 2034 { 2035 pmap_t pmap; 2036 pt_entry_t *pte, tpte; 2037 pv_entry_t next_pv, pv; 2038 vm_offset_t va; 2039 vm_page_t m, free; 2040 2041 sched_pin(); 2042 TAILQ_FOREACH(m, &vpq->pl, pageq) { 2043 if (m->hold_count || m->busy) 2044 continue; 2045 TAILQ_FOREACH_SAFE(pv, &m->md.pv_list, pv_list, next_pv) { 2046 va = pv->pv_va; 2047 pmap = PV_PMAP(pv); 2048 /* Avoid deadlock and lock recursion. */ 2049 if (pmap > locked_pmap) 2050 PMAP_LOCK(pmap); 2051 else if (pmap != locked_pmap && !PMAP_TRYLOCK(pmap)) 2052 continue; 2053 pmap->pm_stats.resident_count--; 2054 pte = pmap_pte_quick(pmap, va); 2055 tpte = pte_load_clear(pte); 2056 KASSERT((tpte & PG_W) == 0, 2057 ("pmap_collect: wired pte %#jx", (uintmax_t)tpte)); 2058 if (tpte & PG_A) 2059 vm_page_flag_set(m, PG_REFERENCED); 2060 if (tpte & PG_M) { 2061 KASSERT((tpte & PG_RW), 2062 ("pmap_collect: modified page not writable: va: %#x, pte: %#jx", 2063 va, (uintmax_t)tpte)); 2064 vm_page_dirty(m); 2065 } 2066 free = NULL; 2067 pmap_unuse_pt(pmap, va, &free); 2068 pmap_invalidate_page(pmap, va); 2069 pmap_free_zero_pages(free); 2070 TAILQ_REMOVE(&m->md.pv_list, pv, pv_list); 2071 if (TAILQ_EMPTY(&m->md.pv_list)) 2072 vm_page_flag_clear(m, PG_WRITEABLE); 2073 free_pv_entry(pmap, pv); 2074 if (pmap != locked_pmap) 2075 PMAP_UNLOCK(pmap); 2076 } 2077 } 2078 sched_unpin(); 2079 } 2080 2081 2082 /* 2083 * free the pv_entry back to the free list 2084 */ 2085 static void 2086 free_pv_entry(pmap_t pmap, pv_entry_t pv) 2087 { 2088 vm_page_t m; 2089 struct pv_chunk *pc; 2090 int idx, field, bit; 2091 2092 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 2093 PMAP_LOCK_ASSERT(pmap, MA_OWNED); 2094 PV_STAT(pv_entry_frees++); 2095 PV_STAT(pv_entry_spare++); 2096 pv_entry_count--; 2097 pc = pv_to_chunk(pv); 2098 idx = pv - &pc->pc_pventry[0]; 2099 field = idx / 32; 2100 bit = idx % 32; 2101 pc->pc_map[field] |= 1ul << bit; 2102 /* move to head of list */ 2103 TAILQ_REMOVE(&pmap->pm_pvchunk, pc, pc_list); 2104 TAILQ_INSERT_HEAD(&pmap->pm_pvchunk, pc, pc_list); 2105 for (idx = 0; idx < _NPCM; idx++) 2106 if (pc->pc_map[idx] != pc_freemask[idx]) 2107 return; 2108 PV_STAT(pv_entry_spare -= _NPCPV); 2109 PV_STAT(pc_chunk_count--); 2110 PV_STAT(pc_chunk_frees++); 2111 /* entire chunk is free, return it */ 2112 TAILQ_REMOVE(&pmap->pm_pvchunk, pc, pc_list); 2113 m = PHYS_TO_VM_PAGE(pmap_kextract((vm_offset_t)pc)); 2114 pmap_qremove((vm_offset_t)pc, 1); 2115 vm_page_unwire(m, 0); 2116 vm_page_free(m); 2117 pmap_ptelist_free(&pv_vafree, (vm_offset_t)pc); 2118 } 2119 2120 /* 2121 * get a new pv_entry, allocating a block from the system 2122 * when needed. 2123 */ 2124 static pv_entry_t 2125 get_pv_entry(pmap_t pmap, int try) 2126 { 2127 static const struct timeval printinterval = { 60, 0 }; 2128 static struct timeval lastprint; 2129 static vm_pindex_t colour; 2130 struct vpgqueues *pq; 2131 int bit, field; 2132 pv_entry_t pv; 2133 struct pv_chunk *pc; 2134 vm_page_t m; 2135 2136 PMAP_LOCK_ASSERT(pmap, MA_OWNED); 2137 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 2138 PV_STAT(pv_entry_allocs++); 2139 pv_entry_count++; 2140 if (pv_entry_count > pv_entry_high_water) 2141 if (ratecheck(&lastprint, &printinterval)) 2142 printf("Approaching the limit on PV entries, consider " 2143 "increasing either the vm.pmap.shpgperproc or the " 2144 "vm.pmap.pv_entry_max tunable.\n"); 2145 pq = NULL; 2146 retry: 2147 pc = TAILQ_FIRST(&pmap->pm_pvchunk); 2148 if (pc != NULL) { 2149 for (field = 0; field < _NPCM; field++) { 2150 if (pc->pc_map[field]) { 2151 bit = bsfl(pc->pc_map[field]); 2152 break; 2153 } 2154 } 2155 if (field < _NPCM) { 2156 pv = &pc->pc_pventry[field * 32 + bit]; 2157 pc->pc_map[field] &= ~(1ul << bit); 2158 /* If this was the last item, move it to tail */ 2159 for (field = 0; field < _NPCM; field++) 2160 if (pc->pc_map[field] != 0) { 2161 PV_STAT(pv_entry_spare--); 2162 return (pv); /* not full, return */ 2163 } 2164 TAILQ_REMOVE(&pmap->pm_pvchunk, pc, pc_list); 2165 TAILQ_INSERT_TAIL(&pmap->pm_pvchunk, pc, pc_list); 2166 PV_STAT(pv_entry_spare--); 2167 return (pv); 2168 } 2169 } 2170 /* 2171 * Access to the ptelist "pv_vafree" is synchronized by the page 2172 * queues lock. If "pv_vafree" is currently non-empty, it will 2173 * remain non-empty until pmap_ptelist_alloc() completes. 2174 */ 2175 if (pv_vafree == 0 || (m = vm_page_alloc(NULL, colour, (pq == 2176 &vm_page_queues[PQ_ACTIVE] ? VM_ALLOC_SYSTEM : VM_ALLOC_NORMAL) | 2177 VM_ALLOC_NOOBJ | VM_ALLOC_WIRED)) == NULL) { 2178 if (try) { 2179 pv_entry_count--; 2180 PV_STAT(pc_chunk_tryfail++); 2181 return (NULL); 2182 } 2183 /* 2184 * Reclaim pv entries: At first, destroy mappings to 2185 * inactive pages. After that, if a pv chunk entry 2186 * is still needed, destroy mappings to active pages. 2187 */ 2188 if (pq == NULL) { 2189 PV_STAT(pmap_collect_inactive++); 2190 pq = &vm_page_queues[PQ_INACTIVE]; 2191 } else if (pq == &vm_page_queues[PQ_INACTIVE]) { 2192 PV_STAT(pmap_collect_active++); 2193 pq = &vm_page_queues[PQ_ACTIVE]; 2194 } else 2195 panic("get_pv_entry: increase vm.pmap.shpgperproc"); 2196 pmap_collect(pmap, pq); 2197 goto retry; 2198 } 2199 PV_STAT(pc_chunk_count++); 2200 PV_STAT(pc_chunk_allocs++); 2201 colour++; 2202 pc = (struct pv_chunk *)pmap_ptelist_alloc(&pv_vafree); 2203 pmap_qenter((vm_offset_t)pc, &m, 1); 2204 if ((m->flags & PG_ZERO) == 0) 2205 pagezero(pc); 2206 pc->pc_pmap = pmap; 2207 pc->pc_map[0] = pc_freemask[0] & ~1ul; /* preallocated bit 0 */ 2208 for (field = 1; field < _NPCM; field++) 2209 pc->pc_map[field] = pc_freemask[field]; 2210 pv = &pc->pc_pventry[0]; 2211 TAILQ_INSERT_HEAD(&pmap->pm_pvchunk, pc, pc_list); 2212 PV_STAT(pv_entry_spare += _NPCPV - 1); 2213 return (pv); 2214 } 2215 2216 static void 2217 pmap_remove_entry(pmap_t pmap, vm_page_t m, vm_offset_t va) 2218 { 2219 pv_entry_t pv; 2220 2221 PMAP_LOCK_ASSERT(pmap, MA_OWNED); 2222 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 2223 TAILQ_FOREACH(pv, &m->md.pv_list, pv_list) { 2224 if (pmap == PV_PMAP(pv) && va == pv->pv_va) 2225 break; 2226 } 2227 KASSERT(pv != NULL, ("pmap_remove_entry: pv not found")); 2228 TAILQ_REMOVE(&m->md.pv_list, pv, pv_list); 2229 if (TAILQ_EMPTY(&m->md.pv_list)) 2230 vm_page_flag_clear(m, PG_WRITEABLE); 2231 free_pv_entry(pmap, pv); 2232 } 2233 2234 /* 2235 * Create a pv entry for page at pa for 2236 * (pmap, va). 2237 */ 2238 static void 2239 pmap_insert_entry(pmap_t pmap, vm_offset_t va, vm_page_t m) 2240 { 2241 pv_entry_t pv; 2242 2243 PMAP_LOCK_ASSERT(pmap, MA_OWNED); 2244 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 2245 pv = get_pv_entry(pmap, FALSE); 2246 pv->pv_va = va; 2247 TAILQ_INSERT_TAIL(&m->md.pv_list, pv, pv_list); 2248 } 2249 2250 /* 2251 * Conditionally create a pv entry. 2252 */ 2253 static boolean_t 2254 pmap_try_insert_pv_entry(pmap_t pmap, vm_offset_t va, vm_page_t m) 2255 { 2256 pv_entry_t pv; 2257 2258 PMAP_LOCK_ASSERT(pmap, MA_OWNED); 2259 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 2260 if (pv_entry_count < pv_entry_high_water && 2261 (pv = get_pv_entry(pmap, TRUE)) != NULL) { 2262 pv->pv_va = va; 2263 TAILQ_INSERT_TAIL(&m->md.pv_list, pv, pv_list); 2264 return (TRUE); 2265 } else 2266 return (FALSE); 2267 } 2268 2269 /* 2270 * pmap_remove_pte: do the things to unmap a page in a process 2271 */ 2272 static int 2273 pmap_remove_pte(pmap_t pmap, pt_entry_t *ptq, vm_offset_t va, vm_page_t *free) 2274 { 2275 pt_entry_t oldpte; 2276 vm_page_t m; 2277 2278 CTR3(KTR_PMAP, "pmap_remove_pte: pmap=%p *ptq=0x%x va=0x%x", 2279 pmap, (u_long)*ptq, va); 2280 2281 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 2282 PMAP_LOCK_ASSERT(pmap, MA_OWNED); 2283 oldpte = *ptq; 2284 PT_SET_VA_MA(ptq, 0, TRUE); 2285 if (oldpte & PG_W) 2286 pmap->pm_stats.wired_count -= 1; 2287 /* 2288 * Machines that don't support invlpg, also don't support 2289 * PG_G. 2290 */ 2291 if (oldpte & PG_G) 2292 pmap_invalidate_page(kernel_pmap, va); 2293 pmap->pm_stats.resident_count -= 1; 2294 /* 2295 * XXX This is not strictly correctly, but somewhere along the line 2296 * we are losing the managed bit on some pages. It is unclear to me 2297 * why, but I think the most likely explanation is that xen's writable 2298 * page table implementation doesn't respect the unused bits. 2299 */ 2300 if ((oldpte & PG_MANAGED) || ((oldpte & PG_V) && (va < VM_MAXUSER_ADDRESS)) 2301 ) { 2302 m = PHYS_TO_VM_PAGE(xpmap_mtop(oldpte) & PG_FRAME); 2303 2304 if (!(oldpte & PG_MANAGED)) 2305 printf("va=0x%x is unmanaged :-( pte=0x%llx\n", va, oldpte); 2306 2307 if (oldpte & PG_M) { 2308 KASSERT((oldpte & PG_RW), 2309 ("pmap_remove_pte: modified page not writable: va: %#x, pte: %#jx", 2310 va, (uintmax_t)oldpte)); 2311 vm_page_dirty(m); 2312 } 2313 if (oldpte & PG_A) 2314 vm_page_flag_set(m, PG_REFERENCED); 2315 pmap_remove_entry(pmap, m, va); 2316 } else if ((va < VM_MAXUSER_ADDRESS) && (oldpte & PG_V)) 2317 printf("va=0x%x is unmanaged :-( pte=0x%llx\n", va, oldpte); 2318 2319 return (pmap_unuse_pt(pmap, va, free)); 2320 } 2321 2322 /* 2323 * Remove a single page from a process address space 2324 */ 2325 static void 2326 pmap_remove_page(pmap_t pmap, vm_offset_t va, vm_page_t *free) 2327 { 2328 pt_entry_t *pte; 2329 2330 CTR2(KTR_PMAP, "pmap_remove_page: pmap=%p va=0x%x", 2331 pmap, va); 2332 2333 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 2334 KASSERT(curthread->td_pinned > 0, ("curthread not pinned")); 2335 PMAP_LOCK_ASSERT(pmap, MA_OWNED); 2336 if ((pte = pmap_pte_quick(pmap, va)) == NULL || (*pte & PG_V) == 0) 2337 return; 2338 pmap_remove_pte(pmap, pte, va, free); 2339 pmap_invalidate_page(pmap, va); 2340 if (*PMAP1) 2341 PT_SET_MA(PADDR1, 0); 2342 2343 } 2344 2345 /* 2346 * Remove the given range of addresses from the specified map. 2347 * 2348 * It is assumed that the start and end are properly 2349 * rounded to the page size. 2350 */ 2351 void 2352 pmap_remove(pmap_t pmap, vm_offset_t sva, vm_offset_t eva) 2353 { 2354 vm_offset_t pdnxt; 2355 pd_entry_t ptpaddr; 2356 pt_entry_t *pte; 2357 vm_page_t free = NULL; 2358 int anyvalid; 2359 2360 CTR3(KTR_PMAP, "pmap_remove: pmap=%p sva=0x%x eva=0x%x", 2361 pmap, sva, eva); 2362 2363 /* 2364 * Perform an unsynchronized read. This is, however, safe. 2365 */ 2366 if (pmap->pm_stats.resident_count == 0) 2367 return; 2368 2369 anyvalid = 0; 2370 2371 vm_page_lock_queues(); 2372 sched_pin(); 2373 PMAP_LOCK(pmap); 2374 2375 /* 2376 * special handling of removing one page. a very 2377 * common operation and easy to short circuit some 2378 * code. 2379 */ 2380 if ((sva + PAGE_SIZE == eva) && 2381 ((pmap->pm_pdir[(sva >> PDRSHIFT)] & PG_PS) == 0)) { 2382 pmap_remove_page(pmap, sva, &free); 2383 goto out; 2384 } 2385 2386 for (; sva < eva; sva = pdnxt) { 2387 unsigned pdirindex; 2388 2389 /* 2390 * Calculate index for next page table. 2391 */ 2392 pdnxt = (sva + NBPDR) & ~PDRMASK; 2393 if (pmap->pm_stats.resident_count == 0) 2394 break; 2395 2396 pdirindex = sva >> PDRSHIFT; 2397 ptpaddr = pmap->pm_pdir[pdirindex]; 2398 2399 /* 2400 * Weed out invalid mappings. Note: we assume that the page 2401 * directory table is always allocated, and in kernel virtual. 2402 */ 2403 if (ptpaddr == 0) 2404 continue; 2405 2406 /* 2407 * Check for large page. 2408 */ 2409 if ((ptpaddr & PG_PS) != 0) { 2410 PD_CLEAR_VA(pmap, pdirindex, TRUE); 2411 pmap->pm_stats.resident_count -= NBPDR / PAGE_SIZE; 2412 anyvalid = 1; 2413 continue; 2414 } 2415 2416 /* 2417 * Limit our scan to either the end of the va represented 2418 * by the current page table page, or to the end of the 2419 * range being removed. 2420 */ 2421 if (pdnxt > eva) 2422 pdnxt = eva; 2423 2424 for (pte = pmap_pte_quick(pmap, sva); sva != pdnxt; pte++, 2425 sva += PAGE_SIZE) { 2426 if ((*pte & PG_V) == 0) 2427 continue; 2428 2429 /* 2430 * The TLB entry for a PG_G mapping is invalidated 2431 * by pmap_remove_pte(). 2432 */ 2433 if ((*pte & PG_G) == 0) 2434 anyvalid = 1; 2435 if (pmap_remove_pte(pmap, pte, sva, &free)) 2436 break; 2437 } 2438 } 2439 PT_UPDATES_FLUSH(); 2440 if (*PMAP1) 2441 PT_SET_VA_MA(PMAP1, 0, TRUE); 2442 out: 2443 if (anyvalid) 2444 pmap_invalidate_all(pmap); 2445 sched_unpin(); 2446 vm_page_unlock_queues(); 2447 PMAP_UNLOCK(pmap); 2448 pmap_free_zero_pages(free); 2449 } 2450 2451 /* 2452 * Routine: pmap_remove_all 2453 * Function: 2454 * Removes this physical page from 2455 * all physical maps in which it resides. 2456 * Reflects back modify bits to the pager. 2457 * 2458 * Notes: 2459 * Original versions of this routine were very 2460 * inefficient because they iteratively called 2461 * pmap_remove (slow...) 2462 */ 2463 2464 void 2465 pmap_remove_all(vm_page_t m) 2466 { 2467 pv_entry_t pv; 2468 pmap_t pmap; 2469 pt_entry_t *pte, tpte; 2470 vm_page_t free; 2471 2472 #if defined(PMAP_DIAGNOSTIC) 2473 /* 2474 * XXX This makes pmap_remove_all() illegal for non-managed pages! 2475 */ 2476 if (m->flags & PG_FICTITIOUS) { 2477 panic("pmap_remove_all: illegal for unmanaged page, va: 0x%jx", 2478 VM_PAGE_TO_PHYS(m) & 0xffffffff); 2479 } 2480 #endif 2481 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 2482 sched_pin(); 2483 while ((pv = TAILQ_FIRST(&m->md.pv_list)) != NULL) { 2484 pmap = PV_PMAP(pv); 2485 PMAP_LOCK(pmap); 2486 pmap->pm_stats.resident_count--; 2487 pte = pmap_pte_quick(pmap, pv->pv_va); 2488 2489 tpte = *pte; 2490 PT_SET_VA_MA(pte, 0, TRUE); 2491 if (tpte & PG_W) 2492 pmap->pm_stats.wired_count--; 2493 if (tpte & PG_A) 2494 vm_page_flag_set(m, PG_REFERENCED); 2495 2496 /* 2497 * Update the vm_page_t clean and reference bits. 2498 */ 2499 if (tpte & PG_M) { 2500 KASSERT((tpte & PG_RW), 2501 ("pmap_remove_all: modified page not writable: va: %#x, pte: %#jx", 2502 pv->pv_va, (uintmax_t)tpte)); 2503 vm_page_dirty(m); 2504 } 2505 free = NULL; 2506 pmap_unuse_pt(pmap, pv->pv_va, &free); 2507 pmap_invalidate_page(pmap, pv->pv_va); 2508 pmap_free_zero_pages(free); 2509 TAILQ_REMOVE(&m->md.pv_list, pv, pv_list); 2510 free_pv_entry(pmap, pv); 2511 PMAP_UNLOCK(pmap); 2512 } 2513 vm_page_flag_clear(m, PG_WRITEABLE); 2514 PT_UPDATES_FLUSH(); 2515 if (*PMAP1) 2516 PT_SET_MA(PADDR1, 0); 2517 sched_unpin(); 2518 } 2519 2520 /* 2521 * Set the physical protection on the 2522 * specified range of this map as requested. 2523 */ 2524 void 2525 pmap_protect(pmap_t pmap, vm_offset_t sva, vm_offset_t eva, vm_prot_t prot) 2526 { 2527 vm_offset_t pdnxt; 2528 pd_entry_t ptpaddr; 2529 pt_entry_t *pte; 2530 int anychanged; 2531 2532 CTR4(KTR_PMAP, "pmap_protect: pmap=%p sva=0x%x eva=0x%x prot=0x%x", 2533 pmap, sva, eva, prot); 2534 2535 if ((prot & VM_PROT_READ) == VM_PROT_NONE) { 2536 pmap_remove(pmap, sva, eva); 2537 return; 2538 } 2539 2540 #ifdef PAE 2541 if ((prot & (VM_PROT_WRITE|VM_PROT_EXECUTE)) == 2542 (VM_PROT_WRITE|VM_PROT_EXECUTE)) 2543 return; 2544 #else 2545 if (prot & VM_PROT_WRITE) 2546 return; 2547 #endif 2548 2549 anychanged = 0; 2550 2551 vm_page_lock_queues(); 2552 sched_pin(); 2553 PMAP_LOCK(pmap); 2554 for (; sva < eva; sva = pdnxt) { 2555 pt_entry_t obits, pbits; 2556 unsigned pdirindex; 2557 2558 pdnxt = (sva + NBPDR) & ~PDRMASK; 2559 2560 pdirindex = sva >> PDRSHIFT; 2561 ptpaddr = pmap->pm_pdir[pdirindex]; 2562 2563 /* 2564 * Weed out invalid mappings. Note: we assume that the page 2565 * directory table is always allocated, and in kernel virtual. 2566 */ 2567 if (ptpaddr == 0) 2568 continue; 2569 2570 /* 2571 * Check for large page. 2572 */ 2573 if ((ptpaddr & PG_PS) != 0) { 2574 if ((prot & VM_PROT_WRITE) == 0) 2575 pmap->pm_pdir[pdirindex] &= ~(PG_M|PG_RW); 2576 #ifdef PAE 2577 if ((prot & VM_PROT_EXECUTE) == 0) 2578 pmap->pm_pdir[pdirindex] |= pg_nx; 2579 #endif 2580 anychanged = 1; 2581 continue; 2582 } 2583 2584 if (pdnxt > eva) 2585 pdnxt = eva; 2586 2587 for (pte = pmap_pte_quick(pmap, sva); sva != pdnxt; pte++, 2588 sva += PAGE_SIZE) { 2589 vm_page_t m; 2590 2591 retry: 2592 /* 2593 * Regardless of whether a pte is 32 or 64 bits in 2594 * size, PG_RW, PG_A, and PG_M are among the least 2595 * significant 32 bits. 2596 */ 2597 obits = pbits = *pte; 2598 if ((pbits & PG_V) == 0) 2599 continue; 2600 if (pbits & PG_MANAGED) { 2601 m = NULL; 2602 if (pbits & PG_A) { 2603 m = PHYS_TO_VM_PAGE(xpmap_mtop(pbits) & PG_FRAME); 2604 vm_page_flag_set(m, PG_REFERENCED); 2605 pbits &= ~PG_A; 2606 } 2607 if ((pbits & PG_M) != 0) { 2608 if (m == NULL) 2609 m = PHYS_TO_VM_PAGE(xpmap_mtop(pbits) & PG_FRAME); 2610 vm_page_dirty(m); 2611 } 2612 } 2613 2614 if ((prot & VM_PROT_WRITE) == 0) 2615 pbits &= ~(PG_RW | PG_M); 2616 #ifdef PAE 2617 if ((prot & VM_PROT_EXECUTE) == 0) 2618 pbits |= pg_nx; 2619 #endif 2620 2621 if (pbits != obits) { 2622 #ifdef XEN 2623 obits = *pte; 2624 PT_SET_VA_MA(pte, pbits, TRUE); 2625 if (*pte != pbits) 2626 goto retry; 2627 #else 2628 #ifdef PAE 2629 if (!atomic_cmpset_64(pte, obits, pbits)) 2630 goto retry; 2631 #else 2632 if (!atomic_cmpset_int((u_int *)pte, obits, 2633 pbits)) 2634 goto retry; 2635 #endif 2636 #endif 2637 if (obits & PG_G) 2638 pmap_invalidate_page(pmap, sva); 2639 else 2640 anychanged = 1; 2641 } 2642 } 2643 } 2644 PT_UPDATES_FLUSH(); 2645 if (*PMAP1) 2646 PT_SET_VA_MA(PMAP1, 0, TRUE); 2647 if (anychanged) 2648 pmap_invalidate_all(pmap); 2649 sched_unpin(); 2650 vm_page_unlock_queues(); 2651 PMAP_UNLOCK(pmap); 2652 } 2653 2654 /* 2655 * Insert the given physical page (p) at 2656 * the specified virtual address (v) in the 2657 * target physical map with the protection requested. 2658 * 2659 * If specified, the page will be wired down, meaning 2660 * that the related pte can not be reclaimed. 2661 * 2662 * NB: This is the only routine which MAY NOT lazy-evaluate 2663 * or lose information. That is, this routine must actually 2664 * insert this page into the given map NOW. 2665 */ 2666 void 2667 pmap_enter(pmap_t pmap, vm_offset_t va, vm_prot_t access, vm_page_t m, 2668 vm_prot_t prot, boolean_t wired) 2669 { 2670 vm_paddr_t pa; 2671 pd_entry_t *pde; 2672 pt_entry_t *pte; 2673 vm_paddr_t opa; 2674 pt_entry_t origpte, newpte; 2675 vm_page_t mpte, om; 2676 boolean_t invlva; 2677 2678 CTR6(KTR_PMAP, "pmap_enter: pmap=%08p va=0x%08x access=0x%x ma=0x%08x prot=0x%x wired=%d", 2679 pmap, va, access, xpmap_ptom(VM_PAGE_TO_PHYS(m)), prot, wired); 2680 va = trunc_page(va); 2681 #ifdef PMAP_DIAGNOSTIC 2682 if (va > VM_MAX_KERNEL_ADDRESS) 2683 panic("pmap_enter: toobig"); 2684 if ((va >= UPT_MIN_ADDRESS) && (va < UPT_MAX_ADDRESS)) 2685 panic("pmap_enter: invalid to pmap_enter page table pages (va: 0x%x)", va); 2686 #endif 2687 2688 mpte = NULL; 2689 2690 vm_page_lock_queues(); 2691 PMAP_LOCK(pmap); 2692 sched_pin(); 2693 2694 /* 2695 * In the case that a page table page is not 2696 * resident, we are creating it here. 2697 */ 2698 if (va < VM_MAXUSER_ADDRESS) { 2699 mpte = pmap_allocpte(pmap, va, M_WAITOK); 2700 } 2701 #if 0 && defined(PMAP_DIAGNOSTIC) 2702 else { 2703 pd_entry_t *pdeaddr = pmap_pde(pmap, va); 2704 origpte = *pdeaddr; 2705 if ((origpte & PG_V) == 0) { 2706 panic("pmap_enter: invalid kernel page table page, pdir=%p, pde=%p, va=%p\n", 2707 pmap->pm_pdir[PTDPTDI], origpte, va); 2708 } 2709 } 2710 #endif 2711 2712 pde = pmap_pde(pmap, va); 2713 if ((*pde & PG_PS) != 0) 2714 panic("pmap_enter: attempted pmap_enter on 4MB page"); 2715 pte = pmap_pte_quick(pmap, va); 2716 2717 /* 2718 * Page Directory table entry not valid, we need a new PT page 2719 */ 2720 if (pte == NULL) { 2721 panic("pmap_enter: invalid page directory pdir=%#jx, va=%#x\n", 2722 (uintmax_t)pmap->pm_pdir[va >> PDRSHIFT], va); 2723 } 2724 2725 pa = VM_PAGE_TO_PHYS(m); 2726 om = NULL; 2727 opa = origpte = 0; 2728 2729 #if 0 2730 KASSERT((*pte & PG_V) || (*pte == 0), ("address set but not valid pte=%p *pte=0x%016jx", 2731 pte, *pte)); 2732 #endif 2733 origpte = *pte; 2734 if (origpte) 2735 origpte = xpmap_mtop(origpte); 2736 opa = origpte & PG_FRAME; 2737 2738 /* 2739 * Mapping has not changed, must be protection or wiring change. 2740 */ 2741 if (origpte && (opa == pa)) { 2742 /* 2743 * Wiring change, just update stats. We don't worry about 2744 * wiring PT pages as they remain resident as long as there 2745 * are valid mappings in them. Hence, if a user page is wired, 2746 * the PT page will be also. 2747 */ 2748 if (wired && ((origpte & PG_W) == 0)) 2749 pmap->pm_stats.wired_count++; 2750 else if (!wired && (origpte & PG_W)) 2751 pmap->pm_stats.wired_count--; 2752 2753 /* 2754 * Remove extra pte reference 2755 */ 2756 if (mpte) 2757 mpte->wire_count--; 2758 2759 /* 2760 * We might be turning off write access to the page, 2761 * so we go ahead and sense modify status. 2762 */ 2763 if (origpte & PG_MANAGED) { 2764 om = m; 2765 pa |= PG_MANAGED; 2766 } 2767 goto validate; 2768 } 2769 /* 2770 * Mapping has changed, invalidate old range and fall through to 2771 * handle validating new mapping. 2772 */ 2773 if (opa) { 2774 if (origpte & PG_W) 2775 pmap->pm_stats.wired_count--; 2776 if (origpte & PG_MANAGED) { 2777 om = PHYS_TO_VM_PAGE(opa); 2778 pmap_remove_entry(pmap, om, va); 2779 } else if (va < VM_MAXUSER_ADDRESS) 2780 printf("va=0x%x is unmanaged :-( \n", va); 2781 2782 if (mpte != NULL) { 2783 mpte->wire_count--; 2784 KASSERT(mpte->wire_count > 0, 2785 ("pmap_enter: missing reference to page table page," 2786 " va: 0x%x", va)); 2787 } 2788 } else 2789 pmap->pm_stats.resident_count++; 2790 2791 /* 2792 * Enter on the PV list if part of our managed memory. 2793 */ 2794 if ((m->flags & (PG_FICTITIOUS | PG_UNMANAGED)) == 0) { 2795 KASSERT(va < kmi.clean_sva || va >= kmi.clean_eva, 2796 ("pmap_enter: managed mapping within the clean submap")); 2797 pmap_insert_entry(pmap, va, m); 2798 pa |= PG_MANAGED; 2799 } 2800 2801 /* 2802 * Increment counters 2803 */ 2804 if (wired) 2805 pmap->pm_stats.wired_count++; 2806 2807 validate: 2808 /* 2809 * Now validate mapping with desired protection/wiring. 2810 */ 2811 newpte = (pt_entry_t)(pa | PG_V); 2812 if ((prot & VM_PROT_WRITE) != 0) { 2813 newpte |= PG_RW; 2814 vm_page_flag_set(m, PG_WRITEABLE); 2815 } 2816 #ifdef PAE 2817 if ((prot & VM_PROT_EXECUTE) == 0) 2818 newpte |= pg_nx; 2819 #endif 2820 if (wired) 2821 newpte |= PG_W; 2822 if (va < VM_MAXUSER_ADDRESS) 2823 newpte |= PG_U; 2824 if (pmap == kernel_pmap) 2825 newpte |= pgeflag; 2826 2827 critical_enter(); 2828 /* 2829 * if the mapping or permission bits are different, we need 2830 * to update the pte. 2831 */ 2832 if ((origpte & ~(PG_M|PG_A)) != newpte) { 2833 if (origpte) { 2834 invlva = FALSE; 2835 origpte = *pte; 2836 PT_SET_VA(pte, newpte | PG_A, FALSE); 2837 if (origpte & PG_A) { 2838 if (origpte & PG_MANAGED) 2839 vm_page_flag_set(om, PG_REFERENCED); 2840 if (opa != VM_PAGE_TO_PHYS(m)) 2841 invlva = TRUE; 2842 #ifdef PAE 2843 if ((origpte & PG_NX) == 0 && 2844 (newpte & PG_NX) != 0) 2845 invlva = TRUE; 2846 #endif 2847 } 2848 if (origpte & PG_M) { 2849 KASSERT((origpte & PG_RW), 2850 ("pmap_enter: modified page not writable: va: %#x, pte: %#jx", 2851 va, (uintmax_t)origpte)); 2852 if ((origpte & PG_MANAGED) != 0) 2853 vm_page_dirty(om); 2854 if ((prot & VM_PROT_WRITE) == 0) 2855 invlva = TRUE; 2856 } 2857 if (invlva) 2858 pmap_invalidate_page(pmap, va); 2859 } else{ 2860 PT_SET_VA(pte, newpte | PG_A, FALSE); 2861 } 2862 2863 } 2864 PT_UPDATES_FLUSH(); 2865 critical_exit(); 2866 if (*PMAP1) 2867 PT_SET_VA_MA(PMAP1, 0, TRUE); 2868 sched_unpin(); 2869 vm_page_unlock_queues(); 2870 PMAP_UNLOCK(pmap); 2871 } 2872 2873 /* 2874 * Maps a sequence of resident pages belonging to the same object. 2875 * The sequence begins with the given page m_start. This page is 2876 * mapped at the given virtual address start. Each subsequent page is 2877 * mapped at a virtual address that is offset from start by the same 2878 * amount as the page is offset from m_start within the object. The 2879 * last page in the sequence is the page with the largest offset from 2880 * m_start that can be mapped at a virtual address less than the given 2881 * virtual address end. Not every virtual page between start and end 2882 * is mapped; only those for which a resident page exists with the 2883 * corresponding offset from m_start are mapped. 2884 */ 2885 void 2886 pmap_enter_object(pmap_t pmap, vm_offset_t start, vm_offset_t end, 2887 vm_page_t m_start, vm_prot_t prot) 2888 { 2889 vm_page_t m, mpte; 2890 vm_pindex_t diff, psize; 2891 multicall_entry_t mcl[16]; 2892 multicall_entry_t *mclp = mcl; 2893 int error, count = 0; 2894 2895 VM_OBJECT_LOCK_ASSERT(m_start->object, MA_OWNED); 2896 psize = atop(end - start); 2897 2898 mpte = NULL; 2899 m = m_start; 2900 PMAP_LOCK(pmap); 2901 while (m != NULL && (diff = m->pindex - m_start->pindex) < psize) { 2902 mpte = pmap_enter_quick_locked(&mclp, &count, pmap, start + ptoa(diff), m, 2903 prot, mpte); 2904 m = TAILQ_NEXT(m, listq); 2905 if (count == 16) { 2906 error = HYPERVISOR_multicall(mcl, count); 2907 KASSERT(error == 0, ("bad multicall %d", error)); 2908 mclp = mcl; 2909 count = 0; 2910 } 2911 } 2912 if (count) { 2913 error = HYPERVISOR_multicall(mcl, count); 2914 KASSERT(error == 0, ("bad multicall %d", error)); 2915 } 2916 2917 PMAP_UNLOCK(pmap); 2918 } 2919 2920 /* 2921 * this code makes some *MAJOR* assumptions: 2922 * 1. Current pmap & pmap exists. 2923 * 2. Not wired. 2924 * 3. Read access. 2925 * 4. No page table pages. 2926 * but is *MUCH* faster than pmap_enter... 2927 */ 2928 2929 void 2930 pmap_enter_quick(pmap_t pmap, vm_offset_t va, vm_page_t m, vm_prot_t prot) 2931 { 2932 multicall_entry_t mcl, *mclp; 2933 int count = 0; 2934 mclp = &mcl; 2935 2936 CTR4(KTR_PMAP, "pmap_enter_quick: pmap=%p va=0x%x m=%p prot=0x%x", 2937 pmap, va, m, prot); 2938 2939 PMAP_LOCK(pmap); 2940 (void) pmap_enter_quick_locked(&mclp, &count, pmap, va, m, prot, NULL); 2941 if (count) 2942 HYPERVISOR_multicall(&mcl, count); 2943 PMAP_UNLOCK(pmap); 2944 } 2945 2946 #ifdef notyet 2947 void 2948 pmap_enter_quick_range(pmap_t pmap, vm_offset_t *addrs, vm_page_t *pages, vm_prot_t *prots, int count) 2949 { 2950 int i, error, index = 0; 2951 multicall_entry_t mcl[16]; 2952 multicall_entry_t *mclp = mcl; 2953 2954 PMAP_LOCK(pmap); 2955 for (i = 0; i < count; i++, addrs++, pages++, prots++) { 2956 if (!pmap_is_prefaultable_locked(pmap, *addrs)) 2957 continue; 2958 2959 (void) pmap_enter_quick_locked(&mclp, &index, pmap, *addrs, *pages, *prots, NULL); 2960 if (index == 16) { 2961 error = HYPERVISOR_multicall(mcl, index); 2962 mclp = mcl; 2963 index = 0; 2964 KASSERT(error == 0, ("bad multicall %d", error)); 2965 } 2966 } 2967 if (index) { 2968 error = HYPERVISOR_multicall(mcl, index); 2969 KASSERT(error == 0, ("bad multicall %d", error)); 2970 } 2971 2972 PMAP_UNLOCK(pmap); 2973 } 2974 #endif 2975 2976 static vm_page_t 2977 pmap_enter_quick_locked(multicall_entry_t **mclpp, int *count, pmap_t pmap, vm_offset_t va, vm_page_t m, 2978 vm_prot_t prot, vm_page_t mpte) 2979 { 2980 pt_entry_t *pte; 2981 vm_paddr_t pa; 2982 vm_page_t free; 2983 multicall_entry_t *mcl = *mclpp; 2984 2985 KASSERT(va < kmi.clean_sva || va >= kmi.clean_eva || 2986 (m->flags & (PG_FICTITIOUS | PG_UNMANAGED)) != 0, 2987 ("pmap_enter_quick_locked: managed mapping within the clean submap")); 2988 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 2989 PMAP_LOCK_ASSERT(pmap, MA_OWNED); 2990 2991 /* 2992 * In the case that a page table page is not 2993 * resident, we are creating it here. 2994 */ 2995 if (va < VM_MAXUSER_ADDRESS) { 2996 unsigned ptepindex; 2997 pd_entry_t ptema; 2998 2999 /* 3000 * Calculate pagetable page index 3001 */ 3002 ptepindex = va >> PDRSHIFT; 3003 if (mpte && (mpte->pindex == ptepindex)) { 3004 mpte->wire_count++; 3005 } else { 3006 /* 3007 * Get the page directory entry 3008 */ 3009 ptema = pmap->pm_pdir[ptepindex]; 3010 3011 /* 3012 * If the page table page is mapped, we just increment 3013 * the hold count, and activate it. 3014 */ 3015 if (ptema & PG_V) { 3016 if (ptema & PG_PS) 3017 panic("pmap_enter_quick: unexpected mapping into 4MB page"); 3018 mpte = PHYS_TO_VM_PAGE(xpmap_mtop(ptema) & PG_FRAME); 3019 mpte->wire_count++; 3020 } else { 3021 mpte = _pmap_allocpte(pmap, ptepindex, 3022 M_NOWAIT); 3023 if (mpte == NULL) 3024 return (mpte); 3025 } 3026 } 3027 } else { 3028 mpte = NULL; 3029 } 3030 3031 /* 3032 * This call to vtopte makes the assumption that we are 3033 * entering the page into the current pmap. In order to support 3034 * quick entry into any pmap, one would likely use pmap_pte_quick. 3035 * But that isn't as quick as vtopte. 3036 */ 3037 KASSERT(pmap_is_current(pmap), ("entering pages in non-current pmap")); 3038 pte = vtopte(va); 3039 if (*pte & PG_V) { 3040 if (mpte != NULL) { 3041 mpte->wire_count--; 3042 mpte = NULL; 3043 } 3044 return (mpte); 3045 } 3046 3047 /* 3048 * Enter on the PV list if part of our managed memory. 3049 */ 3050 if ((m->flags & (PG_FICTITIOUS | PG_UNMANAGED)) == 0 && 3051 !pmap_try_insert_pv_entry(pmap, va, m)) { 3052 if (mpte != NULL) { 3053 free = NULL; 3054 if (pmap_unwire_pte_hold(pmap, mpte, &free)) { 3055 pmap_invalidate_page(pmap, va); 3056 pmap_free_zero_pages(free); 3057 } 3058 3059 mpte = NULL; 3060 } 3061 return (mpte); 3062 } 3063 3064 /* 3065 * Increment counters 3066 */ 3067 pmap->pm_stats.resident_count++; 3068 3069 pa = VM_PAGE_TO_PHYS(m); 3070 #ifdef PAE 3071 if ((prot & VM_PROT_EXECUTE) == 0) 3072 pa |= pg_nx; 3073 #endif 3074 3075 #if 0 3076 /* 3077 * Now validate mapping with RO protection 3078 */ 3079 if (m->flags & (PG_FICTITIOUS|PG_UNMANAGED)) 3080 pte_store(pte, pa | PG_V | PG_U); 3081 else 3082 pte_store(pte, pa | PG_V | PG_U | PG_MANAGED); 3083 #else 3084 /* 3085 * Now validate mapping with RO protection 3086 */ 3087 if (m->flags & (PG_FICTITIOUS|PG_UNMANAGED)) 3088 pa = xpmap_ptom(pa | PG_V | PG_U); 3089 else 3090 pa = xpmap_ptom(pa | PG_V | PG_U | PG_MANAGED); 3091 3092 mcl->op = __HYPERVISOR_update_va_mapping; 3093 mcl->args[0] = va; 3094 mcl->args[1] = (uint32_t)(pa & 0xffffffff); 3095 mcl->args[2] = (uint32_t)(pa >> 32); 3096 mcl->args[3] = 0; 3097 *mclpp = mcl + 1; 3098 *count = *count + 1; 3099 #endif 3100 return mpte; 3101 } 3102 3103 /* 3104 * Make a temporary mapping for a physical address. This is only intended 3105 * to be used for panic dumps. 3106 */ 3107 void * 3108 pmap_kenter_temporary(vm_paddr_t pa, int i) 3109 { 3110 vm_offset_t va; 3111 3112 va = (vm_offset_t)crashdumpmap + (i * PAGE_SIZE); 3113 pmap_kenter(va, pa); 3114 invlpg(va); 3115 return ((void *)crashdumpmap); 3116 } 3117 3118 /* 3119 * This code maps large physical mmap regions into the 3120 * processor address space. Note that some shortcuts 3121 * are taken, but the code works. 3122 */ 3123 void 3124 pmap_object_init_pt(pmap_t pmap, vm_offset_t addr, 3125 vm_object_t object, vm_pindex_t pindex, 3126 vm_size_t size) 3127 { 3128 vm_page_t p; 3129 3130 VM_OBJECT_LOCK_ASSERT(object, MA_OWNED); 3131 KASSERT(object->type == OBJT_DEVICE || object->type == OBJT_SG, 3132 ("pmap_object_init_pt: non-device object")); 3133 if (pseflag && 3134 ((addr & (NBPDR - 1)) == 0) && ((size & (NBPDR - 1)) == 0)) { 3135 int i; 3136 vm_page_t m[1]; 3137 unsigned int ptepindex; 3138 int npdes; 3139 pd_entry_t ptepa; 3140 3141 PMAP_LOCK(pmap); 3142 if (pmap->pm_pdir[ptepindex = (addr >> PDRSHIFT)]) 3143 goto out; 3144 PMAP_UNLOCK(pmap); 3145 retry: 3146 p = vm_page_lookup(object, pindex); 3147 if (p != NULL) { 3148 if (vm_page_sleep_if_busy(p, FALSE, "init4p")) 3149 goto retry; 3150 } else { 3151 p = vm_page_alloc(object, pindex, VM_ALLOC_NORMAL); 3152 if (p == NULL) 3153 return; 3154 m[0] = p; 3155 3156 if (vm_pager_get_pages(object, m, 1, 0) != VM_PAGER_OK) { 3157 vm_page_lock_queues(); 3158 vm_page_free(p); 3159 vm_page_unlock_queues(); 3160 return; 3161 } 3162 3163 p = vm_page_lookup(object, pindex); 3164 vm_page_wakeup(p); 3165 } 3166 3167 ptepa = VM_PAGE_TO_PHYS(p); 3168 if (ptepa & (NBPDR - 1)) 3169 return; 3170 3171 p->valid = VM_PAGE_BITS_ALL; 3172 3173 PMAP_LOCK(pmap); 3174 pmap->pm_stats.resident_count += size >> PAGE_SHIFT; 3175 npdes = size >> PDRSHIFT; 3176 critical_enter(); 3177 for(i = 0; i < npdes; i++) { 3178 PD_SET_VA(pmap, ptepindex, 3179 ptepa | PG_U | PG_M | PG_RW | PG_V | PG_PS, FALSE); 3180 ptepa += NBPDR; 3181 ptepindex += 1; 3182 } 3183 pmap_invalidate_all(pmap); 3184 critical_exit(); 3185 out: 3186 PMAP_UNLOCK(pmap); 3187 } 3188 } 3189 3190 /* 3191 * Routine: pmap_change_wiring 3192 * Function: Change the wiring attribute for a map/virtual-address 3193 * pair. 3194 * In/out conditions: 3195 * The mapping must already exist in the pmap. 3196 */ 3197 void 3198 pmap_change_wiring(pmap_t pmap, vm_offset_t va, boolean_t wired) 3199 { 3200 pt_entry_t *pte; 3201 3202 vm_page_lock_queues(); 3203 PMAP_LOCK(pmap); 3204 pte = pmap_pte(pmap, va); 3205 3206 if (wired && !pmap_pte_w(pte)) { 3207 PT_SET_VA_MA((pte), *(pte) | PG_W, TRUE); 3208 pmap->pm_stats.wired_count++; 3209 } else if (!wired && pmap_pte_w(pte)) { 3210 PT_SET_VA_MA((pte), *(pte) & ~PG_W, TRUE); 3211 pmap->pm_stats.wired_count--; 3212 } 3213 3214 /* 3215 * Wiring is not a hardware characteristic so there is no need to 3216 * invalidate TLB. 3217 */ 3218 pmap_pte_release(pte); 3219 PMAP_UNLOCK(pmap); 3220 vm_page_unlock_queues(); 3221 } 3222 3223 3224 3225 /* 3226 * Copy the range specified by src_addr/len 3227 * from the source map to the range dst_addr/len 3228 * in the destination map. 3229 * 3230 * This routine is only advisory and need not do anything. 3231 */ 3232 3233 void 3234 pmap_copy(pmap_t dst_pmap, pmap_t src_pmap, vm_offset_t dst_addr, vm_size_t len, 3235 vm_offset_t src_addr) 3236 { 3237 vm_page_t free; 3238 vm_offset_t addr; 3239 vm_offset_t end_addr = src_addr + len; 3240 vm_offset_t pdnxt; 3241 3242 if (dst_addr != src_addr) 3243 return; 3244 3245 if (!pmap_is_current(src_pmap)) { 3246 CTR2(KTR_PMAP, 3247 "pmap_copy, skipping: pdir[PTDPTDI]=0x%jx PTDpde[0]=0x%jx", 3248 (src_pmap->pm_pdir[PTDPTDI] & PG_FRAME), (PTDpde[0] & PG_FRAME)); 3249 3250 return; 3251 } 3252 CTR5(KTR_PMAP, "pmap_copy: dst_pmap=%p src_pmap=%p dst_addr=0x%x len=%d src_addr=0x%x", 3253 dst_pmap, src_pmap, dst_addr, len, src_addr); 3254 3255 vm_page_lock_queues(); 3256 if (dst_pmap < src_pmap) { 3257 PMAP_LOCK(dst_pmap); 3258 PMAP_LOCK(src_pmap); 3259 } else { 3260 PMAP_LOCK(src_pmap); 3261 PMAP_LOCK(dst_pmap); 3262 } 3263 sched_pin(); 3264 for (addr = src_addr; addr < end_addr; addr = pdnxt) { 3265 pt_entry_t *src_pte, *dst_pte; 3266 vm_page_t dstmpte, srcmpte; 3267 pd_entry_t srcptepaddr; 3268 unsigned ptepindex; 3269 3270 if (addr >= UPT_MIN_ADDRESS) 3271 panic("pmap_copy: invalid to pmap_copy page tables"); 3272 3273 pdnxt = (addr + NBPDR) & ~PDRMASK; 3274 ptepindex = addr >> PDRSHIFT; 3275 3276 srcptepaddr = PT_GET(&src_pmap->pm_pdir[ptepindex]); 3277 if (srcptepaddr == 0) 3278 continue; 3279 3280 if (srcptepaddr & PG_PS) { 3281 if (dst_pmap->pm_pdir[ptepindex] == 0) { 3282 PD_SET_VA(dst_pmap, ptepindex, srcptepaddr & ~PG_W, TRUE); 3283 dst_pmap->pm_stats.resident_count += 3284 NBPDR / PAGE_SIZE; 3285 } 3286 continue; 3287 } 3288 3289 srcmpte = PHYS_TO_VM_PAGE(srcptepaddr & PG_FRAME); 3290 if (srcmpte->wire_count == 0) 3291 panic("pmap_copy: source page table page is unused"); 3292 3293 if (pdnxt > end_addr) 3294 pdnxt = end_addr; 3295 3296 src_pte = vtopte(addr); 3297 while (addr < pdnxt) { 3298 pt_entry_t ptetemp; 3299 ptetemp = *src_pte; 3300 /* 3301 * we only virtual copy managed pages 3302 */ 3303 if ((ptetemp & PG_MANAGED) != 0) { 3304 dstmpte = pmap_allocpte(dst_pmap, addr, 3305 M_NOWAIT); 3306 if (dstmpte == NULL) 3307 break; 3308 dst_pte = pmap_pte_quick(dst_pmap, addr); 3309 if (*dst_pte == 0 && 3310 pmap_try_insert_pv_entry(dst_pmap, addr, 3311 PHYS_TO_VM_PAGE(xpmap_mtop(ptetemp) & PG_FRAME))) { 3312 /* 3313 * Clear the wired, modified, and 3314 * accessed (referenced) bits 3315 * during the copy. 3316 */ 3317 KASSERT(ptetemp != 0, ("src_pte not set")); 3318 PT_SET_VA_MA(dst_pte, ptetemp & ~(PG_W | PG_M | PG_A), TRUE /* XXX debug */); 3319 KASSERT(*dst_pte == (ptetemp & ~(PG_W | PG_M | PG_A)), 3320 ("no pmap copy expected: 0x%jx saw: 0x%jx", 3321 ptetemp & ~(PG_W | PG_M | PG_A), *dst_pte)); 3322 dst_pmap->pm_stats.resident_count++; 3323 } else { 3324 free = NULL; 3325 if (pmap_unwire_pte_hold(dst_pmap, 3326 dstmpte, &free)) { 3327 pmap_invalidate_page(dst_pmap, 3328 addr); 3329 pmap_free_zero_pages(free); 3330 } 3331 } 3332 if (dstmpte->wire_count >= srcmpte->wire_count) 3333 break; 3334 } 3335 addr += PAGE_SIZE; 3336 src_pte++; 3337 } 3338 } 3339 PT_UPDATES_FLUSH(); 3340 sched_unpin(); 3341 vm_page_unlock_queues(); 3342 PMAP_UNLOCK(src_pmap); 3343 PMAP_UNLOCK(dst_pmap); 3344 } 3345 3346 /* 3347 * pmap_zero_page zeros the specified hardware page by mapping 3348 * the page into KVM and using bzero to clear its contents. 3349 */ 3350 void 3351 pmap_zero_page(vm_page_t m) 3352 { 3353 struct sysmaps *sysmaps; 3354 3355 sysmaps = &sysmaps_pcpu[PCPU_GET(cpuid)]; 3356 mtx_lock(&sysmaps->lock); 3357 if (*sysmaps->CMAP2) 3358 panic("pmap_zero_page: CMAP2 busy"); 3359 sched_pin(); 3360 PT_SET_MA(sysmaps->CADDR2, PG_V | PG_RW | xpmap_ptom(VM_PAGE_TO_PHYS(m)) | PG_A | PG_M); 3361 pagezero(sysmaps->CADDR2); 3362 PT_SET_MA(sysmaps->CADDR2, 0); 3363 sched_unpin(); 3364 mtx_unlock(&sysmaps->lock); 3365 } 3366 3367 /* 3368 * pmap_zero_page_area zeros the specified hardware page by mapping 3369 * the page into KVM and using bzero to clear its contents. 3370 * 3371 * off and size may not cover an area beyond a single hardware page. 3372 */ 3373 void 3374 pmap_zero_page_area(vm_page_t m, int off, int size) 3375 { 3376 struct sysmaps *sysmaps; 3377 3378 sysmaps = &sysmaps_pcpu[PCPU_GET(cpuid)]; 3379 mtx_lock(&sysmaps->lock); 3380 if (*sysmaps->CMAP2) 3381 panic("pmap_zero_page: CMAP2 busy"); 3382 sched_pin(); 3383 PT_SET_MA(sysmaps->CADDR2, PG_V | PG_RW | xpmap_ptom(VM_PAGE_TO_PHYS(m)) | PG_A | PG_M); 3384 3385 if (off == 0 && size == PAGE_SIZE) 3386 pagezero(sysmaps->CADDR2); 3387 else 3388 bzero((char *)sysmaps->CADDR2 + off, size); 3389 PT_SET_MA(sysmaps->CADDR2, 0); 3390 sched_unpin(); 3391 mtx_unlock(&sysmaps->lock); 3392 } 3393 3394 /* 3395 * pmap_zero_page_idle zeros the specified hardware page by mapping 3396 * the page into KVM and using bzero to clear its contents. This 3397 * is intended to be called from the vm_pagezero process only and 3398 * outside of Giant. 3399 */ 3400 void 3401 pmap_zero_page_idle(vm_page_t m) 3402 { 3403 3404 if (*CMAP3) 3405 panic("pmap_zero_page: CMAP3 busy"); 3406 sched_pin(); 3407 PT_SET_MA(CADDR3, PG_V | PG_RW | xpmap_ptom(VM_PAGE_TO_PHYS(m)) | PG_A | PG_M); 3408 pagezero(CADDR3); 3409 PT_SET_MA(CADDR3, 0); 3410 sched_unpin(); 3411 } 3412 3413 /* 3414 * pmap_copy_page copies the specified (machine independent) 3415 * page by mapping the page into virtual memory and using 3416 * bcopy to copy the page, one machine dependent page at a 3417 * time. 3418 */ 3419 void 3420 pmap_copy_page(vm_page_t src, vm_page_t dst) 3421 { 3422 struct sysmaps *sysmaps; 3423 3424 sysmaps = &sysmaps_pcpu[PCPU_GET(cpuid)]; 3425 mtx_lock(&sysmaps->lock); 3426 if (*sysmaps->CMAP1) 3427 panic("pmap_copy_page: CMAP1 busy"); 3428 if (*sysmaps->CMAP2) 3429 panic("pmap_copy_page: CMAP2 busy"); 3430 sched_pin(); 3431 PT_SET_MA(sysmaps->CADDR1, PG_V | xpmap_ptom(VM_PAGE_TO_PHYS(src)) | PG_A); 3432 PT_SET_MA(sysmaps->CADDR2, PG_V | PG_RW | xpmap_ptom(VM_PAGE_TO_PHYS(dst)) | PG_A | PG_M); 3433 bcopy(sysmaps->CADDR1, sysmaps->CADDR2, PAGE_SIZE); 3434 PT_SET_MA(sysmaps->CADDR1, 0); 3435 PT_SET_MA(sysmaps->CADDR2, 0); 3436 sched_unpin(); 3437 mtx_unlock(&sysmaps->lock); 3438 } 3439 3440 /* 3441 * Returns true if the pmap's pv is one of the first 3442 * 16 pvs linked to from this page. This count may 3443 * be changed upwards or downwards in the future; it 3444 * is only necessary that true be returned for a small 3445 * subset of pmaps for proper page aging. 3446 */ 3447 boolean_t 3448 pmap_page_exists_quick(pmap_t pmap, vm_page_t m) 3449 { 3450 pv_entry_t pv; 3451 int loops = 0; 3452 3453 if (m->flags & PG_FICTITIOUS) 3454 return (FALSE); 3455 3456 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 3457 TAILQ_FOREACH(pv, &m->md.pv_list, pv_list) { 3458 if (PV_PMAP(pv) == pmap) { 3459 return TRUE; 3460 } 3461 loops++; 3462 if (loops >= 16) 3463 break; 3464 } 3465 return (FALSE); 3466 } 3467 3468 /* 3469 * pmap_page_wired_mappings: 3470 * 3471 * Return the number of managed mappings to the given physical page 3472 * that are wired. 3473 */ 3474 int 3475 pmap_page_wired_mappings(vm_page_t m) 3476 { 3477 pv_entry_t pv; 3478 pt_entry_t *pte; 3479 pmap_t pmap; 3480 int count; 3481 3482 count = 0; 3483 if ((m->flags & PG_FICTITIOUS) != 0) 3484 return (count); 3485 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 3486 sched_pin(); 3487 TAILQ_FOREACH(pv, &m->md.pv_list, pv_list) { 3488 pmap = PV_PMAP(pv); 3489 PMAP_LOCK(pmap); 3490 pte = pmap_pte_quick(pmap, pv->pv_va); 3491 if ((*pte & PG_W) != 0) 3492 count++; 3493 PMAP_UNLOCK(pmap); 3494 } 3495 sched_unpin(); 3496 return (count); 3497 } 3498 3499 /* 3500 * Returns TRUE if the given page is mapped individually or as part of 3501 * a 4mpage. Otherwise, returns FALSE. 3502 */ 3503 boolean_t 3504 pmap_page_is_mapped(vm_page_t m) 3505 { 3506 struct md_page *pvh; 3507 3508 if ((m->flags & (PG_FICTITIOUS | PG_UNMANAGED)) != 0) 3509 return (FALSE); 3510 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 3511 if (TAILQ_EMPTY(&m->md.pv_list)) { 3512 pvh = pa_to_pvh(VM_PAGE_TO_PHYS(m)); 3513 return (!TAILQ_EMPTY(&pvh->pv_list)); 3514 } else 3515 return (TRUE); 3516 } 3517 3518 /* 3519 * Remove all pages from specified address space 3520 * this aids process exit speeds. Also, this code 3521 * is special cased for current process only, but 3522 * can have the more generic (and slightly slower) 3523 * mode enabled. This is much faster than pmap_remove 3524 * in the case of running down an entire address space. 3525 */ 3526 void 3527 pmap_remove_pages(pmap_t pmap) 3528 { 3529 pt_entry_t *pte, tpte; 3530 vm_page_t m, free = NULL; 3531 pv_entry_t pv; 3532 struct pv_chunk *pc, *npc; 3533 int field, idx; 3534 int32_t bit; 3535 uint32_t inuse, bitmask; 3536 int allfree; 3537 3538 CTR1(KTR_PMAP, "pmap_remove_pages: pmap=%p", pmap); 3539 3540 if (pmap != vmspace_pmap(curthread->td_proc->p_vmspace)) { 3541 printf("warning: pmap_remove_pages called with non-current pmap\n"); 3542 return; 3543 } 3544 vm_page_lock_queues(); 3545 KASSERT(pmap_is_current(pmap), ("removing pages from non-current pmap")); 3546 PMAP_LOCK(pmap); 3547 sched_pin(); 3548 TAILQ_FOREACH_SAFE(pc, &pmap->pm_pvchunk, pc_list, npc) { 3549 allfree = 1; 3550 for (field = 0; field < _NPCM; field++) { 3551 inuse = (~(pc->pc_map[field])) & pc_freemask[field]; 3552 while (inuse != 0) { 3553 bit = bsfl(inuse); 3554 bitmask = 1UL << bit; 3555 idx = field * 32 + bit; 3556 pv = &pc->pc_pventry[idx]; 3557 inuse &= ~bitmask; 3558 3559 pte = vtopte(pv->pv_va); 3560 tpte = *pte ? xpmap_mtop(*pte) : 0; 3561 3562 if (tpte == 0) { 3563 printf( 3564 "TPTE at %p IS ZERO @ VA %08x\n", 3565 pte, pv->pv_va); 3566 panic("bad pte"); 3567 } 3568 3569 /* 3570 * We cannot remove wired pages from a process' mapping at this time 3571 */ 3572 if (tpte & PG_W) { 3573 allfree = 0; 3574 continue; 3575 } 3576 3577 m = PHYS_TO_VM_PAGE(tpte & PG_FRAME); 3578 KASSERT(m->phys_addr == (tpte & PG_FRAME), 3579 ("vm_page_t %p phys_addr mismatch %016jx %016jx", 3580 m, (uintmax_t)m->phys_addr, 3581 (uintmax_t)tpte)); 3582 3583 KASSERT(m < &vm_page_array[vm_page_array_size], 3584 ("pmap_remove_pages: bad tpte %#jx", 3585 (uintmax_t)tpte)); 3586 3587 3588 PT_CLEAR_VA(pte, FALSE); 3589 3590 /* 3591 * Update the vm_page_t clean/reference bits. 3592 */ 3593 if (tpte & PG_M) 3594 vm_page_dirty(m); 3595 3596 TAILQ_REMOVE(&m->md.pv_list, pv, pv_list); 3597 if (TAILQ_EMPTY(&m->md.pv_list)) 3598 vm_page_flag_clear(m, PG_WRITEABLE); 3599 3600 pmap_unuse_pt(pmap, pv->pv_va, &free); 3601 3602 /* Mark free */ 3603 PV_STAT(pv_entry_frees++); 3604 PV_STAT(pv_entry_spare++); 3605 pv_entry_count--; 3606 pc->pc_map[field] |= bitmask; 3607 pmap->pm_stats.resident_count--; 3608 } 3609 } 3610 PT_UPDATES_FLUSH(); 3611 if (allfree) { 3612 PV_STAT(pv_entry_spare -= _NPCPV); 3613 PV_STAT(pc_chunk_count--); 3614 PV_STAT(pc_chunk_frees++); 3615 TAILQ_REMOVE(&pmap->pm_pvchunk, pc, pc_list); 3616 m = PHYS_TO_VM_PAGE(pmap_kextract((vm_offset_t)pc)); 3617 pmap_qremove((vm_offset_t)pc, 1); 3618 vm_page_unwire(m, 0); 3619 vm_page_free(m); 3620 pmap_ptelist_free(&pv_vafree, (vm_offset_t)pc); 3621 } 3622 } 3623 PT_UPDATES_FLUSH(); 3624 if (*PMAP1) 3625 PT_SET_MA(PADDR1, 0); 3626 3627 sched_unpin(); 3628 pmap_invalidate_all(pmap); 3629 vm_page_unlock_queues(); 3630 PMAP_UNLOCK(pmap); 3631 pmap_free_zero_pages(free); 3632 } 3633 3634 /* 3635 * pmap_is_modified: 3636 * 3637 * Return whether or not the specified physical page was modified 3638 * in any physical maps. 3639 */ 3640 boolean_t 3641 pmap_is_modified(vm_page_t m) 3642 { 3643 pv_entry_t pv; 3644 pt_entry_t *pte; 3645 pmap_t pmap; 3646 boolean_t rv; 3647 3648 rv = FALSE; 3649 if (m->flags & PG_FICTITIOUS) 3650 return (rv); 3651 3652 sched_pin(); 3653 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 3654 TAILQ_FOREACH(pv, &m->md.pv_list, pv_list) { 3655 pmap = PV_PMAP(pv); 3656 PMAP_LOCK(pmap); 3657 pte = pmap_pte_quick(pmap, pv->pv_va); 3658 rv = (*pte & PG_M) != 0; 3659 PMAP_UNLOCK(pmap); 3660 if (rv) 3661 break; 3662 } 3663 if (*PMAP1) 3664 PT_SET_MA(PADDR1, 0); 3665 sched_unpin(); 3666 return (rv); 3667 } 3668 3669 /* 3670 * pmap_is_prefaultable: 3671 * 3672 * Return whether or not the specified virtual address is elgible 3673 * for prefault. 3674 */ 3675 static boolean_t 3676 pmap_is_prefaultable_locked(pmap_t pmap, vm_offset_t addr) 3677 { 3678 pt_entry_t *pte; 3679 boolean_t rv = FALSE; 3680 3681 return (rv); 3682 3683 if (pmap_is_current(pmap) && *pmap_pde(pmap, addr)) { 3684 pte = vtopte(addr); 3685 rv = (*pte == 0); 3686 } 3687 return (rv); 3688 } 3689 3690 boolean_t 3691 pmap_is_prefaultable(pmap_t pmap, vm_offset_t addr) 3692 { 3693 boolean_t rv; 3694 3695 PMAP_LOCK(pmap); 3696 rv = pmap_is_prefaultable_locked(pmap, addr); 3697 PMAP_UNLOCK(pmap); 3698 return (rv); 3699 } 3700 3701 void 3702 pmap_map_readonly(pmap_t pmap, vm_offset_t va, int len) 3703 { 3704 int i, npages = round_page(len) >> PAGE_SHIFT; 3705 for (i = 0; i < npages; i++) { 3706 pt_entry_t *pte; 3707 pte = pmap_pte(pmap, (vm_offset_t)(va + i*PAGE_SIZE)); 3708 pte_store(pte, xpmap_mtop(*pte & ~(PG_RW|PG_M))); 3709 PMAP_MARK_PRIV(xpmap_mtop(*pte)); 3710 pmap_pte_release(pte); 3711 } 3712 } 3713 3714 void 3715 pmap_map_readwrite(pmap_t pmap, vm_offset_t va, int len) 3716 { 3717 int i, npages = round_page(len) >> PAGE_SHIFT; 3718 for (i = 0; i < npages; i++) { 3719 pt_entry_t *pte; 3720 pte = pmap_pte(pmap, (vm_offset_t)(va + i*PAGE_SIZE)); 3721 PMAP_MARK_UNPRIV(xpmap_mtop(*pte)); 3722 pte_store(pte, xpmap_mtop(*pte) | (PG_RW|PG_M)); 3723 pmap_pte_release(pte); 3724 } 3725 } 3726 3727 /* 3728 * Clear the write and modified bits in each of the given page's mappings. 3729 */ 3730 void 3731 pmap_remove_write(vm_page_t m) 3732 { 3733 pv_entry_t pv; 3734 pmap_t pmap; 3735 pt_entry_t oldpte, *pte; 3736 3737 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 3738 if ((m->flags & PG_FICTITIOUS) != 0 || 3739 (m->flags & PG_WRITEABLE) == 0) 3740 return; 3741 sched_pin(); 3742 TAILQ_FOREACH(pv, &m->md.pv_list, pv_list) { 3743 pmap = PV_PMAP(pv); 3744 PMAP_LOCK(pmap); 3745 pte = pmap_pte_quick(pmap, pv->pv_va); 3746 retry: 3747 oldpte = *pte; 3748 if ((oldpte & PG_RW) != 0) { 3749 vm_paddr_t newpte = oldpte & ~(PG_RW | PG_M); 3750 3751 /* 3752 * Regardless of whether a pte is 32 or 64 bits 3753 * in size, PG_RW and PG_M are among the least 3754 * significant 32 bits. 3755 */ 3756 PT_SET_VA_MA(pte, newpte, TRUE); 3757 if (*pte != newpte) 3758 goto retry; 3759 3760 if ((oldpte & PG_M) != 0) 3761 vm_page_dirty(m); 3762 pmap_invalidate_page(pmap, pv->pv_va); 3763 } 3764 PMAP_UNLOCK(pmap); 3765 } 3766 vm_page_flag_clear(m, PG_WRITEABLE); 3767 PT_UPDATES_FLUSH(); 3768 if (*PMAP1) 3769 PT_SET_MA(PADDR1, 0); 3770 sched_unpin(); 3771 } 3772 3773 /* 3774 * pmap_ts_referenced: 3775 * 3776 * Return a count of reference bits for a page, clearing those bits. 3777 * It is not necessary for every reference bit to be cleared, but it 3778 * is necessary that 0 only be returned when there are truly no 3779 * reference bits set. 3780 * 3781 * XXX: The exact number of bits to check and clear is a matter that 3782 * should be tested and standardized at some point in the future for 3783 * optimal aging of shared pages. 3784 */ 3785 int 3786 pmap_ts_referenced(vm_page_t m) 3787 { 3788 pv_entry_t pv, pvf, pvn; 3789 pmap_t pmap; 3790 pt_entry_t *pte; 3791 int rtval = 0; 3792 3793 if (m->flags & PG_FICTITIOUS) 3794 return (rtval); 3795 sched_pin(); 3796 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 3797 if ((pv = TAILQ_FIRST(&m->md.pv_list)) != NULL) { 3798 pvf = pv; 3799 do { 3800 pvn = TAILQ_NEXT(pv, pv_list); 3801 TAILQ_REMOVE(&m->md.pv_list, pv, pv_list); 3802 TAILQ_INSERT_TAIL(&m->md.pv_list, pv, pv_list); 3803 pmap = PV_PMAP(pv); 3804 PMAP_LOCK(pmap); 3805 pte = pmap_pte_quick(pmap, pv->pv_va); 3806 if ((*pte & PG_A) != 0) { 3807 PT_SET_VA_MA(pte, *pte & ~PG_A, FALSE); 3808 pmap_invalidate_page(pmap, pv->pv_va); 3809 rtval++; 3810 if (rtval > 4) 3811 pvn = NULL; 3812 } 3813 PMAP_UNLOCK(pmap); 3814 } while ((pv = pvn) != NULL && pv != pvf); 3815 } 3816 PT_UPDATES_FLUSH(); 3817 if (*PMAP1) 3818 PT_SET_MA(PADDR1, 0); 3819 3820 sched_unpin(); 3821 return (rtval); 3822 } 3823 3824 /* 3825 * Clear the modify bits on the specified physical page. 3826 */ 3827 void 3828 pmap_clear_modify(vm_page_t m) 3829 { 3830 pv_entry_t pv; 3831 pmap_t pmap; 3832 pt_entry_t *pte; 3833 3834 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 3835 if ((m->flags & PG_FICTITIOUS) != 0) 3836 return; 3837 sched_pin(); 3838 TAILQ_FOREACH(pv, &m->md.pv_list, pv_list) { 3839 pmap = PV_PMAP(pv); 3840 PMAP_LOCK(pmap); 3841 pte = pmap_pte_quick(pmap, pv->pv_va); 3842 if ((*pte & PG_M) != 0) { 3843 /* 3844 * Regardless of whether a pte is 32 or 64 bits 3845 * in size, PG_M is among the least significant 3846 * 32 bits. 3847 */ 3848 PT_SET_VA_MA(pte, *pte & ~PG_M, FALSE); 3849 pmap_invalidate_page(pmap, pv->pv_va); 3850 } 3851 PMAP_UNLOCK(pmap); 3852 } 3853 sched_unpin(); 3854 } 3855 3856 /* 3857 * pmap_clear_reference: 3858 * 3859 * Clear the reference bit on the specified physical page. 3860 */ 3861 void 3862 pmap_clear_reference(vm_page_t m) 3863 { 3864 pv_entry_t pv; 3865 pmap_t pmap; 3866 pt_entry_t *pte; 3867 3868 mtx_assert(&vm_page_queue_mtx, MA_OWNED); 3869 if ((m->flags & PG_FICTITIOUS) != 0) 3870 return; 3871 sched_pin(); 3872 TAILQ_FOREACH(pv, &m->md.pv_list, pv_list) { 3873 pmap = PV_PMAP(pv); 3874 PMAP_LOCK(pmap); 3875 pte = pmap_pte_quick(pmap, pv->pv_va); 3876 if ((*pte & PG_A) != 0) { 3877 /* 3878 * Regardless of whether a pte is 32 or 64 bits 3879 * in size, PG_A is among the least significant 3880 * 32 bits. 3881 */ 3882 PT_SET_VA_MA(pte, *pte & ~PG_A, FALSE); 3883 pmap_invalidate_page(pmap, pv->pv_va); 3884 } 3885 PMAP_UNLOCK(pmap); 3886 } 3887 sched_unpin(); 3888 } 3889 3890 /* 3891 * Miscellaneous support routines follow 3892 */ 3893 3894 /* 3895 * Map a set of physical memory pages into the kernel virtual 3896 * address space. Return a pointer to where it is mapped. This 3897 * routine is intended to be used for mapping device memory, 3898 * NOT real memory. 3899 */ 3900 void * 3901 pmap_mapdev_attr(vm_paddr_t pa, vm_size_t size, int mode) 3902 { 3903 vm_offset_t va, offset; 3904 vm_size_t tmpsize; 3905 3906 offset = pa & PAGE_MASK; 3907 size = roundup(offset + size, PAGE_SIZE); 3908 pa = pa & PG_FRAME; 3909 3910 if (pa < KERNLOAD && pa + size <= KERNLOAD) 3911 va = KERNBASE + pa; 3912 else 3913 va = kmem_alloc_nofault(kernel_map, size); 3914 if (!va) 3915 panic("pmap_mapdev: Couldn't alloc kernel virtual memory"); 3916 3917 for (tmpsize = 0; tmpsize < size; tmpsize += PAGE_SIZE) 3918 pmap_kenter_attr(va + tmpsize, pa + tmpsize, mode); 3919 pmap_invalidate_range(kernel_pmap, va, va + tmpsize); 3920 pmap_invalidate_cache_range(va, va + size); 3921 return ((void *)(va + offset)); 3922 } 3923 3924 void * 3925 pmap_mapdev(vm_paddr_t pa, vm_size_t size) 3926 { 3927 3928 return (pmap_mapdev_attr(pa, size, PAT_UNCACHEABLE)); 3929 } 3930 3931 void * 3932 pmap_mapbios(vm_paddr_t pa, vm_size_t size) 3933 { 3934 3935 return (pmap_mapdev_attr(pa, size, PAT_WRITE_BACK)); 3936 } 3937 3938 void 3939 pmap_unmapdev(vm_offset_t va, vm_size_t size) 3940 { 3941 vm_offset_t base, offset, tmpva; 3942 3943 if (va >= KERNBASE && va + size <= KERNBASE + KERNLOAD) 3944 return; 3945 base = trunc_page(va); 3946 offset = va & PAGE_MASK; 3947 size = roundup(offset + size, PAGE_SIZE); 3948 critical_enter(); 3949 for (tmpva = base; tmpva < (base + size); tmpva += PAGE_SIZE) 3950 pmap_kremove(tmpva); 3951 pmap_invalidate_range(kernel_pmap, va, tmpva); 3952 critical_exit(); 3953 kmem_free(kernel_map, base, size); 3954 } 3955 3956 /* 3957 * Sets the memory attribute for the specified page. 3958 */ 3959 void 3960 pmap_page_set_memattr(vm_page_t m, vm_memattr_t ma) 3961 { 3962 struct sysmaps *sysmaps; 3963 vm_offset_t sva, eva; 3964 3965 m->md.pat_mode = ma; 3966 if ((m->flags & PG_FICTITIOUS) != 0) 3967 return; 3968 3969 /* 3970 * If "m" is a normal page, flush it from the cache. 3971 * See pmap_invalidate_cache_range(). 3972 * 3973 * First, try to find an existing mapping of the page by sf 3974 * buffer. sf_buf_invalidate_cache() modifies mapping and 3975 * flushes the cache. 3976 */ 3977 if (sf_buf_invalidate_cache(m)) 3978 return; 3979 3980 /* 3981 * If page is not mapped by sf buffer, but CPU does not 3982 * support self snoop, map the page transient and do 3983 * invalidation. In the worst case, whole cache is flushed by 3984 * pmap_invalidate_cache_range(). 3985 */ 3986 if ((cpu_feature & (CPUID_SS|CPUID_CLFSH)) == CPUID_CLFSH) { 3987 sysmaps = &sysmaps_pcpu[PCPU_GET(cpuid)]; 3988 mtx_lock(&sysmaps->lock); 3989 if (*sysmaps->CMAP2) 3990 panic("pmap_page_set_memattr: CMAP2 busy"); 3991 sched_pin(); 3992 PT_SET_MA(sysmaps->CADDR2, PG_V | PG_RW | 3993 xpmap_ptom(VM_PAGE_TO_PHYS(m)) | PG_A | PG_M | 3994 pmap_cache_bits(m->md.pat_mode, 0)); 3995 invlcaddr(sysmaps->CADDR2); 3996 sva = (vm_offset_t)sysmaps->CADDR2; 3997 eva = sva + PAGE_SIZE; 3998 } else 3999 sva = eva = 0; /* gcc */ 4000 pmap_invalidate_cache_range(sva, eva); 4001 if (sva != 0) { 4002 PT_SET_MA(sysmaps->CADDR2, 0); 4003 sched_unpin(); 4004 mtx_unlock(&sysmaps->lock); 4005 } 4006 } 4007 4008 int 4009 pmap_change_attr(va, size, mode) 4010 vm_offset_t va; 4011 vm_size_t size; 4012 int mode; 4013 { 4014 vm_offset_t base, offset, tmpva; 4015 pt_entry_t *pte; 4016 u_int opte, npte; 4017 pd_entry_t *pde; 4018 boolean_t changed; 4019 4020 base = trunc_page(va); 4021 offset = va & PAGE_MASK; 4022 size = roundup(offset + size, PAGE_SIZE); 4023 4024 /* Only supported on kernel virtual addresses. */ 4025 if (base <= VM_MAXUSER_ADDRESS) 4026 return (EINVAL); 4027 4028 /* 4MB pages and pages that aren't mapped aren't supported. */ 4029 for (tmpva = base; tmpva < (base + size); tmpva += PAGE_SIZE) { 4030 pde = pmap_pde(kernel_pmap, tmpva); 4031 if (*pde & PG_PS) 4032 return (EINVAL); 4033 if ((*pde & PG_V) == 0) 4034 return (EINVAL); 4035 pte = vtopte(va); 4036 if ((*pte & PG_V) == 0) 4037 return (EINVAL); 4038 } 4039 4040 changed = FALSE; 4041 4042 /* 4043 * Ok, all the pages exist and are 4k, so run through them updating 4044 * their cache mode. 4045 */ 4046 for (tmpva = base; size > 0; ) { 4047 pte = vtopte(tmpva); 4048 4049 /* 4050 * The cache mode bits are all in the low 32-bits of the 4051 * PTE, so we can just spin on updating the low 32-bits. 4052 */ 4053 do { 4054 opte = *(u_int *)pte; 4055 npte = opte & ~(PG_PTE_PAT | PG_NC_PCD | PG_NC_PWT); 4056 npte |= pmap_cache_bits(mode, 0); 4057 PT_SET_VA_MA(pte, npte, TRUE); 4058 } while (npte != opte && (*pte != npte)); 4059 if (npte != opte) 4060 changed = TRUE; 4061 tmpva += PAGE_SIZE; 4062 size -= PAGE_SIZE; 4063 } 4064 4065 /* 4066 * Flush CPU caches to make sure any data isn't cached that shouldn't 4067 * be, etc. 4068 */ 4069 if (changed) { 4070 pmap_invalidate_range(kernel_pmap, base, tmpva); 4071 pmap_invalidate_cache_range(base, tmpva); 4072 } 4073 return (0); 4074 } 4075 4076 /* 4077 * perform the pmap work for mincore 4078 */ 4079 int 4080 pmap_mincore(pmap_t pmap, vm_offset_t addr) 4081 { 4082 pt_entry_t *ptep, pte; 4083 vm_page_t m; 4084 int val = 0; 4085 4086 PMAP_LOCK(pmap); 4087 ptep = pmap_pte(pmap, addr); 4088 pte = (ptep != NULL) ? PT_GET(ptep) : 0; 4089 pmap_pte_release(ptep); 4090 PMAP_UNLOCK(pmap); 4091 4092 if (pte != 0) { 4093 vm_paddr_t pa; 4094 4095 val = MINCORE_INCORE; 4096 if ((pte & PG_MANAGED) == 0) 4097 return val; 4098 4099 pa = pte & PG_FRAME; 4100 4101 m = PHYS_TO_VM_PAGE(pa); 4102 4103 /* 4104 * Modified by us 4105 */ 4106 if (pte & PG_M) 4107 val |= MINCORE_MODIFIED|MINCORE_MODIFIED_OTHER; 4108 else { 4109 /* 4110 * Modified by someone else 4111 */ 4112 vm_page_lock_queues(); 4113 if (m->dirty || pmap_is_modified(m)) 4114 val |= MINCORE_MODIFIED_OTHER; 4115 vm_page_unlock_queues(); 4116 } 4117 /* 4118 * Referenced by us 4119 */ 4120 if (pte & PG_A) 4121 val |= MINCORE_REFERENCED|MINCORE_REFERENCED_OTHER; 4122 else { 4123 /* 4124 * Referenced by someone else 4125 */ 4126 vm_page_lock_queues(); 4127 if ((m->flags & PG_REFERENCED) || 4128 pmap_ts_referenced(m)) { 4129 val |= MINCORE_REFERENCED_OTHER; 4130 vm_page_flag_set(m, PG_REFERENCED); 4131 } 4132 vm_page_unlock_queues(); 4133 } 4134 } 4135 return val; 4136 } 4137 4138 void 4139 pmap_activate(struct thread *td) 4140 { 4141 pmap_t pmap, oldpmap; 4142 u_int32_t cr3; 4143 4144 critical_enter(); 4145 pmap = vmspace_pmap(td->td_proc->p_vmspace); 4146 oldpmap = PCPU_GET(curpmap); 4147 #if defined(SMP) 4148 atomic_clear_int(&oldpmap->pm_active, PCPU_GET(cpumask)); 4149 atomic_set_int(&pmap->pm_active, PCPU_GET(cpumask)); 4150 #else 4151 oldpmap->pm_active &= ~1; 4152 pmap->pm_active |= 1; 4153 #endif 4154 #ifdef PAE 4155 cr3 = vtophys(pmap->pm_pdpt); 4156 #else 4157 cr3 = vtophys(pmap->pm_pdir); 4158 #endif 4159 /* 4160 * pmap_activate is for the current thread on the current cpu 4161 */ 4162 td->td_pcb->pcb_cr3 = cr3; 4163 PT_UPDATES_FLUSH(); 4164 load_cr3(cr3); 4165 4166 PCPU_SET(curpmap, pmap); 4167 critical_exit(); 4168 } 4169 4170 /* 4171 * Increase the starting virtual address of the given mapping if a 4172 * different alignment might result in more superpage mappings. 4173 */ 4174 void 4175 pmap_align_superpage(vm_object_t object, vm_ooffset_t offset, 4176 vm_offset_t *addr, vm_size_t size) 4177 { 4178 vm_offset_t superpage_offset; 4179 4180 if (size < NBPDR) 4181 return; 4182 if (object != NULL && (object->flags & OBJ_COLORED) != 0) 4183 offset += ptoa(object->pg_color); 4184 superpage_offset = offset & PDRMASK; 4185 if (size - ((NBPDR - superpage_offset) & PDRMASK) < NBPDR || 4186 (*addr & PDRMASK) == superpage_offset) 4187 return; 4188 if ((*addr & PDRMASK) < superpage_offset) 4189 *addr = (*addr & ~PDRMASK) + superpage_offset; 4190 else 4191 *addr = ((*addr + PDRMASK) & ~PDRMASK) + superpage_offset; 4192 } 4193 4194 #ifdef XEN 4195 4196 void 4197 pmap_suspend() 4198 { 4199 pmap_t pmap; 4200 int i, pdir, offset; 4201 vm_paddr_t pdirma; 4202 mmu_update_t mu[4]; 4203 4204 /* 4205 * We need to remove the recursive mapping structure from all 4206 * our pmaps so that Xen doesn't get confused when it restores 4207 * the page tables. The recursive map lives at page directory 4208 * index PTDPTDI. We assume that the suspend code has stopped 4209 * the other vcpus (if any). 4210 */ 4211 LIST_FOREACH(pmap, &allpmaps, pm_list) { 4212 for (i = 0; i < 4; i++) { 4213 /* 4214 * Figure out which page directory (L2) page 4215 * contains this bit of the recursive map and 4216 * the offset within that page of the map 4217 * entry 4218 */ 4219 pdir = (PTDPTDI + i) / NPDEPG; 4220 offset = (PTDPTDI + i) % NPDEPG; 4221 pdirma = pmap->pm_pdpt[pdir] & PG_FRAME; 4222 mu[i].ptr = pdirma + offset * sizeof(pd_entry_t); 4223 mu[i].val = 0; 4224 } 4225 HYPERVISOR_mmu_update(mu, 4, NULL, DOMID_SELF); 4226 } 4227 } 4228 4229 void 4230 pmap_resume() 4231 { 4232 pmap_t pmap; 4233 int i, pdir, offset; 4234 vm_paddr_t pdirma; 4235 mmu_update_t mu[4]; 4236 4237 /* 4238 * Restore the recursive map that we removed on suspend. 4239 */ 4240 LIST_FOREACH(pmap, &allpmaps, pm_list) { 4241 for (i = 0; i < 4; i++) { 4242 /* 4243 * Figure out which page directory (L2) page 4244 * contains this bit of the recursive map and 4245 * the offset within that page of the map 4246 * entry 4247 */ 4248 pdir = (PTDPTDI + i) / NPDEPG; 4249 offset = (PTDPTDI + i) % NPDEPG; 4250 pdirma = pmap->pm_pdpt[pdir] & PG_FRAME; 4251 mu[i].ptr = pdirma + offset * sizeof(pd_entry_t); 4252 mu[i].val = (pmap->pm_pdpt[i] & PG_FRAME) | PG_V; 4253 } 4254 HYPERVISOR_mmu_update(mu, 4, NULL, DOMID_SELF); 4255 } 4256 } 4257 4258 #endif 4259 4260 #if defined(PMAP_DEBUG) 4261 pmap_pid_dump(int pid) 4262 { 4263 pmap_t pmap; 4264 struct proc *p; 4265 int npte = 0; 4266 int index; 4267 4268 sx_slock(&allproc_lock); 4269 FOREACH_PROC_IN_SYSTEM(p) { 4270 if (p->p_pid != pid) 4271 continue; 4272 4273 if (p->p_vmspace) { 4274 int i,j; 4275 index = 0; 4276 pmap = vmspace_pmap(p->p_vmspace); 4277 for (i = 0; i < NPDEPTD; i++) { 4278 pd_entry_t *pde; 4279 pt_entry_t *pte; 4280 vm_offset_t base = i << PDRSHIFT; 4281 4282 pde = &pmap->pm_pdir[i]; 4283 if (pde && pmap_pde_v(pde)) { 4284 for (j = 0; j < NPTEPG; j++) { 4285 vm_offset_t va = base + (j << PAGE_SHIFT); 4286 if (va >= (vm_offset_t) VM_MIN_KERNEL_ADDRESS) { 4287 if (index) { 4288 index = 0; 4289 printf("\n"); 4290 } 4291 sx_sunlock(&allproc_lock); 4292 return npte; 4293 } 4294 pte = pmap_pte(pmap, va); 4295 if (pte && pmap_pte_v(pte)) { 4296 pt_entry_t pa; 4297 vm_page_t m; 4298 pa = PT_GET(pte); 4299 m = PHYS_TO_VM_PAGE(pa & PG_FRAME); 4300 printf("va: 0x%x, pt: 0x%x, h: %d, w: %d, f: 0x%x", 4301 va, pa, m->hold_count, m->wire_count, m->flags); 4302 npte++; 4303 index++; 4304 if (index >= 2) { 4305 index = 0; 4306 printf("\n"); 4307 } else { 4308 printf(" "); 4309 } 4310 } 4311 } 4312 } 4313 } 4314 } 4315 } 4316 sx_sunlock(&allproc_lock); 4317 return npte; 4318 } 4319 #endif 4320 4321 #if defined(DEBUG) 4322 4323 static void pads(pmap_t pm); 4324 void pmap_pvdump(vm_paddr_t pa); 4325 4326 /* print address space of pmap*/ 4327 static void 4328 pads(pmap_t pm) 4329 { 4330 int i, j; 4331 vm_paddr_t va; 4332 pt_entry_t *ptep; 4333 4334 if (pm == kernel_pmap) 4335 return; 4336 for (i = 0; i < NPDEPTD; i++) 4337 if (pm->pm_pdir[i]) 4338 for (j = 0; j < NPTEPG; j++) { 4339 va = (i << PDRSHIFT) + (j << PAGE_SHIFT); 4340 if (pm == kernel_pmap && va < KERNBASE) 4341 continue; 4342 if (pm != kernel_pmap && va > UPT_MAX_ADDRESS) 4343 continue; 4344 ptep = pmap_pte(pm, va); 4345 if (pmap_pte_v(ptep)) 4346 printf("%x:%x ", va, *ptep); 4347 }; 4348 4349 } 4350 4351 void 4352 pmap_pvdump(vm_paddr_t pa) 4353 { 4354 pv_entry_t pv; 4355 pmap_t pmap; 4356 vm_page_t m; 4357 4358 printf("pa %x", pa); 4359 m = PHYS_TO_VM_PAGE(pa); 4360 TAILQ_FOREACH(pv, &m->md.pv_list, pv_list) { 4361 pmap = PV_PMAP(pv); 4362 printf(" -> pmap %p, va %x", (void *)pmap, pv->pv_va); 4363 pads(pmap); 4364 } 4365 printf(" "); 4366 } 4367 #endif
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