FreeBSD/Linux Kernel Cross Reference
sys/i386at/fdreg.h
1 /*
2 * Mach Operating System
3 * Copyright (c) 1993,1991,1990,1989 Carnegie Mellon University
4 * All Rights Reserved.
5 *
6 * Permission to use, copy, modify and distribute this software and its
7 * documentation is hereby granted, provided that both the copyright
8 * notice and this permission notice appear in all copies of the
9 * software, derivative works or modified versions, and any portions
10 * thereof, and that both notices appear in supporting documentation.
11 *
12 * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
13 * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND FOR
14 * ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
15 *
16 * Carnegie Mellon requests users of this software to return to
17 *
18 * Software Distribution Coordinator or Software.Distribution@CS.CMU.EDU
19 * School of Computer Science
20 * Carnegie Mellon University
21 * Pittsburgh PA 15213-3890
22 *
23 * any improvements or extensions that they make and grant Carnegie Mellon
24 * the rights to redistribute these changes.
25 */
26 /*
27 * HISTORY
28 * $Log: fdreg.h,v $
29 * Revision 2.7 93/11/17 16:45:46 dbg
30 * Changed HZ to hz. Removed local declaration of HZ.
31 * Removed non-MACH_KERNEL code.
32 * [93/01/29 dbg]
33 *
34 * Revision 2.6 93/08/02 21:44:01 mrt
35 * Put the free copyright on this file, again.
36 * [93/07/22 mrt]
37 *
38 * Revision 2.5 93/01/24 13:15:42 danner
39 * Make unit_info.addr a u_short to make inb and friends happy.
40 * [93/01/18 rvb]
41 *
42 * Revision 2.4 91/10/07 17:25:31 af
43 * More mg32 changes
44 * [91/10/07 rvb]
45 * New chips/busses.[ch] nomenclature.
46 * [91/09/09 17:11:55 rvb]
47 *
48 * Synched again with 2.5.
49 * [91/09/04 rvb]
50 *
51 * Revision 2.3 91/05/14 16:23:11 mrt
52 * Correcting copyright
53 *
54 * Revision 2.2 91/02/14 14:42:36 mrt
55 * New, Improved, compatible with new fd.c
56 * [91/01/28 15:33:58 rvb]
57 *
58 * Revision 1.6.1.5 90/11/27 13:44:40 rvb
59 * Synched 2.5 & 3.0 at I386q (r1.6.1.5) & XMK35 (r2.4)
60 * [90/11/15 rvb]
61 *
62 * Revision 1.6.1.4 90/09/18 08:38:29 rvb
63 * Flush setparms from here.
64 * [90/09/08 rvb]
65 *
66 * Revision 2.3 90/08/27 22:01:00 dbg
67 * Flush ushort.
68 * [90/07/17 dbg]
69 *
70 * Revision 1.6.1.3 90/07/27 11:26:42 rvb
71 * Fix Intel Copyright as per B. Davies authorization.
72 * [90/07/27 rvb]
73 *
74 * Revision 2.2 90/05/03 15:45:27 dbg
75 * Change for pure kernel.
76 * [90/04/19 dbg]
77 *
78 * Revision 1.6.1.2 90/01/08 13:30:22 rvb
79 * Add Intel copyright.
80 * [90/01/08 rvb]
81 *
82 * Revision 1.6.1.1 89/10/22 11:34:43 rvb
83 * Received from Intel October 5, 1989.
84 * [89/10/13 rvb]
85 *
86 * Revision 1.6 89/09/25 12:27:00 rvb
87 * Flush B_VERFIY and B_FORMAT
88 * [89/09/23 rvb]
89 *
90 * Revision 1.5 89/09/20 17:29:17 rvb
91 * It bothers me that we are changing a constant here so that
92 * 25 Mhz machines will loop for a full 1msec. There has to be
93 * a way to set cpuspeed once we find out the kind of machine and
94 * clock speed.
95 * [89/09/20 rvb]
96 *
97 * Revision 1.4 89/03/09 20:07:10 rpd
98 * More cleanup.
99 *
100 * Revision 1.3 89/02/26 12:40:12 gm0w
101 * Changes for cleanup.
102 *
103 *
104 */
105
106 #ifndef _I386AT_FDREG_H_
107 #define _I386AT_FDREG_H_
108
109 /*
110 Copyright 1988, 1989 by Intel Corporation, Santa Clara, California.
111
112 All Rights Reserved
113
114 Permission to use, copy, modify, and distribute this software and
115 its documentation for any purpose and without fee is hereby
116 granted, provided that the above copyright notice appears in all
117 copies and that both the copyright notice and this permission notice
118 appear in supporting documentation, and that the name of Intel
119 not be used in advertising or publicity pertaining to distribution
120 of the software without specific, written prior permission.
121
122 INTEL DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE
123 INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS,
124 IN NO EVENT SHALL INTEL BE LIABLE FOR ANY SPECIAL, INDIRECT, OR
125 CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM
126 LOSS OF USE, DATA OR PROFITS, WHETHER IN ACTION OF CONTRACT,
127 NEGLIGENCE, OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION
128 WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
129 */
130
131 /* Copyright (c) 1987, 1988 TOSHIBA Corp. */
132 /* All Rights Reserved */
133
134 #ident "@(#)m765.h 1.13 - 88/02/17"
135
136 /*******************************************************************
137 *
138 * Toshiba Floppy Driver for UNIX System V R3
139 *
140 * June 21, 1988
141 *
142 * Intended Drive Units:
143 * Worldwide - Model No. ND-356 3.5" unformatted 2MB/1MB
144 * UNIX Media Type Name: 2HD512/2DD512/2D512/1D512.
145 *
146 * In Japan Only - Model No. ND-355 3.5" unformatted 1.6MB/1MB
147 * UNIX Media Type Name: 2HC1024/2HC512/2HC256/2DD512/2D512/1D512.
148 *
149 * Worldwide - Model No. ND-04DT-A 5.25" unformatted 500 KB
150 * UNIX Media Type Name: 2D512/1D512.
151 *
152 * In Japan Only - Model No. ND-08DE 5.25" unformatted 1.6MB/1MB
153 * UNIX Media Type Name: 2HC1024/2HC512/2HC256/2DD512/2D512/1D512.
154 *
155 * Use with other devices may require modification.
156 *
157 * Notes:
158 * For further detail regarding drive units contact
159 * Toshiba America,Inc. Disk Products Division,
160 * Irvine, CA (714) 583-3000.
161 *
162 *******************************************************************/
163
164 /*
165 * fdcmd.c_rbmtr
166 *
167 * |--+--+--+--+--+--+--+--|
168 * | | | | | | | | |
169 * |--+--+--+--+--+--+--+--|
170 * ^ ^ ^ ^
171 * | | | |--- unit0 motor on flag
172 * | | |------ unit1 motor on flag
173 * | |--------------- unit0 recalibrate flag
174 * |------------------ unit1 recalibrate flag
175 */
176 #define MTRMASK 0x003 /* mask motor_flag for get status */
177 #define MTRRST 0x0fc /* reset motor_flag data */
178 #define RBSHIFT 0x004 /* shift count for recalibrate data */
179 #define RBRST 0x0cf /* reset recalibrate data */
180
181 /*
182 * fdcmd.c_intr
183 *
184 * |--+--+--+--+--+--+--+--|
185 * | | | | | | | | |
186 * |--+--+--+--+--+--+--+--|
187 * ^ ^ ^ ^ ^ ^ ^ ^
188 * reserved --+ | | | | | | +--- read/write flag
189 * reserved -----+ | | | | +------ seek flag
190 * reserved --------+ | | +------ seek flag for retry
191 * recalibrate/seek flag(for open) ----------+ +--------- recalibrate flag
192 */
193 #define RWFLAG 0x001
194 #define SKFLAG 0x002
195 #define SKEFLAG 0x004
196 #define RBFLAG 0x008
197 #define WUPFLAG 0x010
198 #define CMDRST 0x000
199
200 /*
201 * fddrtab.dr_type
202 *
203 * +---+---+---+---+---+---+---+---+
204 * | | | | | | | | |
205 * +---+---+---+---+---+---+---+---+
206 * ^ ^ ^ ^ ^
207 * | | | | |----------- rapid seek flag
208 * |---| | | 0: normal seek
209 * | | | 1: rapid seek
210 * | | |--------------- detect format
211 * | | 0: no detect
212 * | | 1: format type OK
213 * | |------------------- 40 or 80 cylinder(for 2hc/2dd drive)
214 * | 0: 80 cylinder
215 * | 1: 40 cylinder
216 * |------------------------- transfer rate(for read/write/format)
217 * 00: 500kbps 10: 250kbps
218 * 01: 300kbps 11: reserved
219 */
220 #define RPSEEK 0x00 /* rapid seek */
221 #define RAPID 0x08 /* rapid seek flag */
222 #define OKTYPE 0x10 /* media change flag */
223 #define DOUBLE 0x20 /* double/single step change */
224 #define NMSEEK 0x80 /* normal seek */
225 #define RATEMASK 0xc0 /* transfer parameter mask data */
226
227 /*
228 * device number
229 *
230 * 15 10 9 8 7 0
231 * +--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+
232 * | 0 0 0 0 0 0 0 1| | 0| 0| 0| 0| |
233 * +-----------+-----+-----+--+--+--+--+-----------+
234 * ^ ^ ^ ^ ^ ^
235 * |____________________| |__| |__|
236 * | | |
237 * | | |- media type
238 * major number | 0: 3.50" 720 KB
239 * |- unit number 1: 3.50" 1.44 Meg
240 * 2: 5.25" 360 KB
241 * 3: 5.25" 1.20 Meg
242 */
243 #define UNIT(dev) ((dev & 0xc0)>>6) /* get unit number */
244 #define MEDIATYPE(dev) (dev & 0x03) /* get media type */
245 /*****************************************************************************
246
247 wait time / timeout count
248
249 *****************************************************************************/
250 #define STSCHKCNT 0x2800 /* For check status */
251 #define ITOUT hz*5 /* interrupt timeout count */
252 #define TOUT hz/4 /* media type check timeout count */
253 #define MTRSTOP hz*2 /* motor off time */
254 #define SEEKWAIT hz/100*3 /* head_lock time */
255
256 /******************************************************************************
257
258 define for FDC
259
260 ******************************************************************************/
261 /* FDC register */
262 #define CTRLREG(ADDR) (ADDR) /* controle register */
263 #define STSREG(ADDR) ((ADDR)+2) /* status register */
264 #define DATAREG(ADDR) ((ADDR)+3) /* data register */
265 #define VFOREG(ADDR) ((ADDR)+5) /* vfo register */
266
267 /* CTRLREG flags */
268 #define FDC_RST 0x04
269 #define MTR_ON 0x04
270 #define DMAREQ 0x08
271 #define RDY 0x40
272 #define BSY 0x80
273
274 /* status for command_out */
275 #define FD_OSTS 0x00 /* For output check */
276 #define FD_ISTS 0x40 /* For input check */
277 #define DTOCPU 0x40
278 #define DATAOK 0x80
279
280 /* Command for FDC */
281 #define SPCCMD 0x03 /* Specify command */
282 #define RBCMD 0x07 /* Recalibrate command */
283 #define SISCMD 0x08 /* Sense interrupt status command */
284 #define SEEKCMD 0x0f /* seek command */
285 #define RDM 0xe6 /* FDC READ command */
286 #define RDMV 0x42e6 /* VERIFY READ command */
287 #define WTM 0xc5 /* FDC WRITE command */
288 #define FMTM 0x4d /* FDC FORMAT command */
289 #define FMTDATA 0x5e /* format data */
290
291 /* check value */
292 #define OPENBIT 0x80 /* VFO check define */
293 #define BYTEMASK 0xff
294
295 /* FDC error code define */
296 #define ERROR 0xff
297 #define EBBHARD 128
298 #define EBBSOFT 129
299 #define ST0AT 0x40
300 #define ST0IC 0x80
301 #define ST0OK 0xc0
302 #define ADDRERR 0x01
303 #define WTPRT 0x02
304 #define NOREC 0x03
305 #define OVERRUN 0x04
306 #define CRCERR 0x05
307 #define FDCERR 0x06
308 #define TIMEOUT 0x08
309 #define DOORERR 0x09
310
311 /******************************************************************************
312
313 define for DMA
314
315 *****************************************************************************/
316 /* DMA register */
317 #define DMACMD1 0x08 /* DMA #1 command register */
318 #define DMAMSK1 0x0f /* DMA #1 all mask register */
319 #define DMABPFF 0x0c
320 #define DMAMODE 0x0b
321 #define DMAADDR 0x04
322 #define DMAPAGE 0x81
323 #define DMACNT 0x05
324 #define DMAMSK 0x0a
325
326 /* dma set data */
327 #define DMARD 0x46 /* DMA read mode */
328 #define DMAWT 0x4a /* DMA write mode */
329 #define DMAVRF 0x42 /* DMA verify mode */
330
331 #define DMADATA0 0x00 /* DMA #2 all mask data */
332 #define DMADATA1 0x0b /* DMA #1 all mask data */
333 #define CHANNEL2 0x02
334
335 #define SRTHUT 0xdf
336 #define HLTND 0x02
337 #define DTL 0xff
338
339 /******************************************************************************
340
341 etc. define
342
343 *****************************************************************************/
344 #define SPL spl5 /* Same as in i386at/autoconf.c */
345 #define MAXUNIT 4 /* Max unit number */
346 #define BLKSIZE 512 /* block size */
347
348 /* fdcmd.c_stsflag */
349 #define MTRFLAG 0x01
350 #define MTROFF 0x02
351 #define INTROUT 0x04
352
353 /* fdcmd.c_devflag (media check flag . etc.) */
354 #define FDMCHK 0x01
355 #define FDWAIT 0x02
356 #define STRCHK 0x04
357 #define STRWAIT 0x08
358
359 /* fdcmd.c_dcount */
360 #define FDCCNT 9 /* Command table for read/write/format (FDC) */
361 #define RWCNT 9 /* Read/Write command count */
362 #define FMTCNT 6 /* format command count */
363
364 struct fdcmd {
365 int c_rbmtr; /* moter & rcalibrate flag */
366 int c_intr; /* intr flag */
367 int c_stsflag; /* moter flag */
368 int c_mtrid; /* motor off queue id */
369 int c_timeid; /* interrupt timeout id */
370 int c_devflag; /* device status */
371 int c_dcount; /* Read/Write/Format data count */
372 int c_rwdata[FDCCNT]; /* Read/Write/Format cmd (FDC) */
373 int c_saddr; /* cmd seek address */
374 };
375
376 /* fdmbuf.b_rberr/fdmbuf.b_seekerr/fdmbuf.b_rwerr */
377 #define MEDIARD 0x01
378 #define MEDIASEEK 0x01
379 #define SRETRY 0x03
380 #define MRETRY 0x30
381 #define LRETRY 0x300
382 #define SRMASK 0x0f
383 #define MRMASK 0xf0
384 #define RMRMASK 0xff0
385 #define LRMASK 0xf00
386 #define MINC 0x10
387 #define LINC 0x100
388
389 struct ctrl_info {
390 struct unit_info *b_unitf; /* first buffer for this dev */
391 struct unit_info *b_uip; /* like b_unit */
392 struct unit_info *b_wup; /* unit to wake up when WUPFLAG */
393 short b_rberr; /* rb error count (for recovery) */
394 short b_seekerr; /* seek error count (for recovery) */
395 short b_rwerr; /* r/w error count (for recovery) */
396 short b_status; /* error status */
397 struct buf *b_buf; /* set bp address */
398 caddr_t b_xferaddr; /* trasfer address */
399 unsigned int b_xfercount; /* total transfer count */
400 unsigned int b_xferdma; /* dma transfer count */
401 daddr_t b_sector; /* read/write sector */
402 struct fdcmd b_cmd; /* set command table address */
403 };
404
405 #define FMTID 4
406 struct fmttbl {
407 unsigned char cyl;
408 unsigned char head;
409 unsigned char sector;
410 unsigned char s_type;
411 };
412
413 struct fddrtab {
414 u_short dr_ncyl; /* cylinder count */
415 u_short dr_spc; /* actual sectors/cylinder */
416 daddr_t p_nsec; /* disk length (sector count) */
417 char dr_nsec; /* sector per track */
418 char dr_type; /* media type */
419 char dr_rwgpl; /* Read / Write Gap length */
420 char dr_fgpl; /* Format Gap length */
421 };
422
423 struct unit_info {
424 struct unit_info *b_unitf; /* next slave */
425 struct buf *av_forw; /* head of I/O queue (b_forw) */
426 int b_seekaddr; /* cylinder address */
427 u_short addr;
428 struct fddrtab d_drtab; /* floppy disk parameter */
429 struct bus_device *dev;
430 struct fdcmd *b_cmd; /* set command table address */
431 char wakeme; /* set if someone wants to be woken */
432 };
433
434 #define NBPSCTR 512 /* Bytes per LOGICAL disk sector */
435 /* These should be added to
436 "sys/param.h". */
437 #define PAGESIZ 4096
438
439 #define PZERO 25
440 #define PRIBIO 20
441
442 #define B_VERIFY IO_SPARE_START
443 #define B_FORMAT (IO_SPARE_START << 1)
444
445 #define b_pfcent io_mode
446
447 #endif /* _I386AT_FDREG_H_ */
Cache object: d83fe786fd561ee87e42ad263c11369d
|