FreeBSD/Linux Kernel Cross Reference
sys/i386at/i82586.h
1 /*
2 * Mach Operating System
3 * Copyright (c) 1991,1990,1989 Carnegie Mellon University
4 * All Rights Reserved.
5 *
6 * Permission to use, copy, modify and distribute this software and its
7 * documentation is hereby granted, provided that both the copyright
8 * notice and this permission notice appear in all copies of the
9 * software, derivative works or modified versions, and any portions
10 * thereof, and that both notices appear in supporting documentation.
11 *
12 * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
13 * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND FOR
14 * ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
15 *
16 * Carnegie Mellon requests users of this software to return to
17 *
18 * Software Distribution Coordinator or Software.Distribution@CS.CMU.EDU
19 * School of Computer Science
20 * Carnegie Mellon University
21 * Pittsburgh PA 15213-3890
22 *
23 * any improvements or extensions that they make and grant Carnegie Mellon
24 * the rights to redistribute these changes.
25 */
26 /*
27 * HISTORY
28 * $Log: i82586.h,v $
29 * Revision 2.7 91/05/14 16:24:04 mrt
30 * Correcting copyright
31 *
32 * Revision 2.6 91/02/05 17:17:26 mrt
33 * Changed to new Mach copyright
34 * [91/02/01 17:43:29 mrt]
35 *
36 * Revision 2.5 90/11/26 14:49:45 rvb
37 * jsb bet me to XMK34, sigh ...
38 * [90/11/26 rvb]
39 * Synched 2.5 & 3.0 at I386q (r1.4.1.5) & XMK35 (r2.5)
40 * [90/11/15 rvb]
41 *
42 * Document error bits in Xmt and Rcv.
43 * [90/10/08 rvb]
44 *
45 * Revision 2.4 90/11/05 14:28:00 rpd
46 * Document error bits in Xmt and Rcv.
47 * [90/10/08 rvb]
48 *
49 * Revision 2.3 90/08/27 21:59:55 dbg
50 * Add type definition for ushort.
51 * [90/07/17 dbg]
52 *
53 * Revision 2.2 90/05/03 15:42:29 dbg
54 * Alter for pure kernel.
55 * [90/04/18 dbg]
56 *
57 * Revision 1.4.1.4 90/07/10 11:43:36 rvb
58 * Comment some symbolic constants. [kupfer]
59 *
60 * Revision 1.4.1.3 90/02/28 15:49:41 rvb
61 * Fix numerous typo's in Olivetti disclaimer.
62 * [90/02/28 rvb]
63 *
64 * Revision 1.4.1.2 90/01/08 13:31:27 rvb
65 * Add Olivetti copyright.
66 * [90/01/08 rvb]
67 *
68 * Revision 1.4.1.1 89/11/10 09:49:44 rvb
69 * Redone by Eugene Kuerner at ORC.
70 *
71 * Revision 1.3 89/11/01 11:58:44 eugene
72 * revised some structures for word or 16bit accesses
73 *
74 *
75 */
76
77 /*
78 Copyright 1988, 1989 by Olivetti Advanced Technology Center, Inc.,
79 Cupertino, California.
80
81 All Rights Reserved
82
83 Permission to use, copy, modify, and distribute this software and
84 its documentation for any purpose and without fee is hereby
85 granted, provided that the above copyright notice appears in all
86 copies and that both the copyright notice and this permission notice
87 appear in supporting documentation, and that the name of Olivetti
88 not be used in advertising or publicity pertaining to distribution
89 of the software without specific, written prior permission.
90
91 OLIVETTI DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE
92 INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS,
93 IN NO EVENT SHALL OLIVETTI BE LIABLE FOR ANY SPECIAL, INDIRECT, OR
94 CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM
95 LOSS OF USE, DATA OR PROFITS, WHETHER IN ACTION OF CONTRACT,
96 NEGLIGENCE, OR OTHER TORTIOUS ACTION, ARISING OUR OF OR IN CONNECTION
97 WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
98 */
99
100 /*
101 * Defines for managing the status word of the 82586 cpu. For details see
102 * the Intel LAN Component User's Manual starting at p. 2-14.
103 *
104 */
105
106 #define SCB_SW_INT 0xf000
107 #define SCB_SW_CX 0x8000 /* CU finished w/ int. bit set */
108 #define SCB_SW_FR 0x4000 /* RU finished receiving a frame */
109 #define SCB_SW_CNA 0x2000 /* CU left active state */
110 #define SCB_SW_RNR 0x1000 /* RU left ready state */
111
112 /*
113 * Defines for managing the Command Unit Status portion of the 82586
114 * System Control Block.
115 *
116 */
117
118 #define SCB_CUS_IDLE 0x0000
119 #define SCB_CUS_SUSPND 0x0100
120 #define SCB_CUS_ACTV 0x0200
121
122 /*
123 * Defines for managing the Receive Unit Status portion of the System
124 * Control Block.
125 *
126 */
127
128 #define SCB_RUS_IDLE 0x0000
129 #define SCB_RUS_SUSPND 0x0010
130 #define SCB_RUS_NORESRC 0x0020
131 #define SCB_RUS_READY 0x0040
132
133 /*
134 * Defines that manage portions of the Command Word in the System Control
135 * Block of the 82586. Below are the Interrupt Acknowledge Bits and their
136 * appropriate masks.
137 *
138 */
139
140 #define SCB_ACK_CX 0x8000
141 #define SCB_ACK_FR 0x4000
142 #define SCB_ACK_CNA 0x2000
143 #define SCB_ACK_RNR 0x1000
144
145 /*
146 * Defines for managing the Command Unit Control word, and the Receive
147 * Unit Control word. The software RESET bit is also defined.
148 *
149 */
150
151 #define SCB_CU_STRT 0x0100
152 #define SCB_CU_RSUM 0x0200
153 #define SCB_CU_SUSPND 0x0300
154 #define SCB_CU_ABRT 0x0400
155
156 #define SCB_RESET 0x0080
157
158 #define SCB_RU_STRT 0x0010
159 #define SCB_RU_RSUM 0x0020
160 #define SCB_RU_SUSPND 0x0030
161 #define SCB_RU_ABRT 0x0040
162
163
164 /*
165 * The following define Action Commands for the 82586 chip.
166 *
167 */
168
169 #define AC_NOP 0x00
170 #define AC_IASETUP 0x01
171 #define AC_CONFIGURE 0x02
172 #define AC_MCSETUP 0x03
173 #define AC_TRANSMIT 0x04
174 #define AC_TDR 0x05
175 #define AC_DUMP 0x06
176 #define AC_DIAGNOSE 0x07
177
178
179 /*
180 * Defines for General Format for Action Commands, both Status Words, and
181 * Command Words.
182 *
183 */
184
185 #define AC_SW_C 0x8000
186 #define AC_SW_B 0x4000
187 #define AC_SW_OK 0x2000
188 #define AC_SW_A 0x1000
189 #define TC_CARRIER 0x0400
190 #define TC_CLS 0x0200
191 #define TC_DMA 0x0100
192 #define TC_DEFER 0x0080
193 #define TC_SQE 0x0040
194 #define TC_COLLISION 0x0020
195 #define AC_CW_EL 0x8000
196 #define AC_CW_S 0x4000
197 #define AC_CW_I 0x2000
198
199 /*
200 * Specific defines for the transmit action command.
201 *
202 */
203
204 #define TBD_SW_EOF 0x8000
205 #define TBD_SW_COUNT 0x3fff
206
207 /*
208 * Specific defines for the receive frame actions.
209 *
210 */
211
212 #define RBD_SW_EOF 0x8000
213 #define RBD_SW_COUNT 0x3fff
214
215 #define RFD_DONE 0x8000
216 #define RFD_BUSY 0x4000
217 #define RFD_OK 0x2000
218 #define RFD_CRC 0x0800
219 #define RFD_ALN 0x0400
220 #define RFD_RSC 0x0200
221 #define RFD_DMA 0x0100
222 #define RFD_SHORT 0x0080
223 #define RFD_EOF 0x0040
224 #define RFD_EL 0x8000
225 #define RFD_SUSP 0x4000
226 /*
227 * 82586 chip specific structure definitions. For details, see the Intel
228 * LAN Components manual.
229 *
230 */
231
232
233 typedef struct {
234 u_short scp_sysbus;
235 u_short scp_unused[2];
236 u_short scp_iscp;
237 u_short scp_iscp_base;
238 } scp_t;
239
240
241 typedef struct {
242 u_short iscp_busy;
243 u_short iscp_scb_offset;
244 u_short iscp_scb;
245 u_short iscp_scb_base;
246 } iscp_t;
247
248
249 typedef struct {
250 u_short scb_status;
251 u_short scb_command;
252 u_short scb_cbl_offset;
253 u_short scb_rfa_offset;
254 u_short scb_crcerrs;
255 u_short scb_alnerrs;
256 u_short scb_rscerrs;
257 u_short scb_ovrnerrs;
258 } scb_t;
259
260
261 typedef struct {
262 u_short tbd_offset;
263 u_char dest_addr[6];
264 u_short length;
265 } transmit_t;
266
267
268 typedef struct {
269 u_short fifolim_bytecnt;
270 u_short addrlen_mode;
271 u_short linprio_interframe;
272 u_short slot_time;
273 u_short hardware;
274 u_short min_frame_len;
275 } configure_t;
276
277
278 typedef struct {
279 u_short ac_status;
280 u_short ac_command;
281 u_short ac_link_offset;
282 union {
283 transmit_t transmit;
284 configure_t configure;
285 u_char iasetup[6];
286 } cmd;
287 } ac_t;
288
289
290 typedef struct {
291 u_short act_count;
292 u_short next_tbd_offset;
293 u_short buffer_addr;
294 u_short buffer_base;
295 } tbd_t;
296
297
298 typedef struct {
299 u_short status;
300 u_short command;
301 u_short link_offset;
302 u_short rbd_offset;
303 u_char destination[6];
304 u_char source[6];
305 u_short length;
306 } fd_t;
307
308
309 typedef struct {
310 u_short status;
311 u_short next_rbd_offset;
312 u_short buffer_addr;
313 u_short buffer_base;
314 u_short size;
315 } rbd_t;
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