The Design and Implementation of the FreeBSD Operating System, Second Edition
Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)


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FreeBSD/Linux Kernel Cross Reference
sys/i386ipsc/dcm_input.c

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    1 /* 
    2  * Mach Operating System
    3  * Copyright (c) 1991 Carnegie Mellon University
    4  * All Rights Reserved.
    5  * 
    6  * Permission to use, copy, modify and distribute this software and its
    7  * documentation is hereby granted, provided that both the copyright
    8  * notice and this permission notice appear in all copies of the
    9  * software, derivative works or modified versions, and any portions
   10  * thereof, and that both notices appear in supporting documentation.
   11  * 
   12  * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
   13  * CONDITION.  CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND FOR
   14  * ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
   15  * 
   16  * Carnegie Mellon requests users of this software to return to
   17  * 
   18  *  Software Distribution Coordinator  or  Software.Distribution@CS.CMU.EDU
   19  *  School of Computer Science
   20  *  Carnegie Mellon University
   21  *  Pittsburgh PA 15213-3890
   22  * 
   23  * any improvements or extensions that they make and grant Carnegie Mellon
   24  * the rights to redistribute these changes.
   25  */
   26 /*
   27  * Copyright 1988, 1989, 1990, 1991 by Intel Corporation,
   28  * Santa Clara, California.
   29  * 
   30  *                          All Rights Reserved
   31  * 
   32  * Permission to use, copy, modify, and distribute this software and its
   33  * documentation for any purpose and without fee is hereby granted,
   34  * provided that the above copyright notice appears in all copies and that
   35  * both the copyright notice and this permission notice appear in
   36  * supporting documentation, and that the name of Intel not be used in
   37  * advertising or publicity pertaining to distribution of the software
   38  * without specific, written prior permission.
   39  * 
   40  * INTEL DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING
   41  * ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO EVENT
   42  * SHALL INTEL BE LIABLE FOR ANY SPECIAL, INDIRECT, OR CONSEQUENTIAL
   43  * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
   44  * PROFITS, WHETHER IN ACTION OF CONTRACT, NEGLIGENCE, OR OTHER TORTIOUS
   45  * ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE OF
   46  * THIS SOFTWARE.
   47  */
   48 /*
   49  * HISTORY
   50  * $Log:        dcm_input.c,v $
   51  * Revision 2.9  93/05/15  19:33:13  mrt
   52  *      machparam.h -> machspl.h
   53  * 
   54  * Revision 2.8  93/01/14  17:31:59  danner
   55  *      Proper spl typing.
   56  *      [92/12/10  17:52:00  af]
   57  * 
   58  * Revision 2.7  91/08/28  11:11:58  jsb
   59  *      Moved shortword count support here from norma/ipc_net.c.
   60  *      [91/08/26  14:03:39  jsb]
   61  * 
   62  * Revision 2.6  91/08/03  18:17:55  jsb
   63  *      Moved all device independent code to norma/ipc_net.c.
   64  *      [91/07/25  18:30:13  jsb]
   65  * 
   66  * Revision 2.5  91/07/01  08:24:11  jsb
   67  *      Use clport_page_grab instead of vm_page_grab.
   68  *      Removed bogus null definition of clport_replenish.
   69  *      [91/06/29  16:08:08  jsb]
   70  * 
   71  * Revision 2.4  91/06/18  20:50:14  jsb
   72  *      New copyright from Intel.
   73  *      [91/06/18  20:06:09  jsb]
   74  * 
   75  * Revision 2.3  91/06/17  15:44:07  jsb
   76  *      Changed include of renamed norma file. Changed call to vm_page_init
   77  *      to match its redefinition (it lost two parameters). 
   78  *      [91/06/17  10:06:40  jsb]
   79  * 
   80  * Revision 2.2  91/06/06  17:04:28  jsb
   81  *      First checkin.
   82  *      [91/05/14  13:27:06  jsb]
   83  * 
   84  */
   85 
   86 #include <norma/ipc_net.h>
   87 #include <ipsc/dcmcom.h>
   88 #include <i386ipsc/dcm.h>
   89 #include <machine/machspl.h>
   90 
   91 struct adma_chan        dcm_recv_chan;
   92 struct dcm_header       dcm_recv_header;
   93 
   94 dcm_init_recv()
   95 {
   96         /*
   97          * Initialize unchanging elements of dcm_recv_chan
   98          */
   99         bzero(&dcm_recv_chan, sizeof(dcm_recv_chan));
  100         dcm_recv_chan.src1 = kvtophys(&dcm_recv_header) >> 1;
  101         dcm_recv_chan.cnt1 = sizeof(dcm_recv_header) >> 1;
  102         dcm_recv_chan.cmd1 = RECVCMD;
  103         dcm_recv_chan.cmd2 = RECVCMD;
  104         dcm_recv_chan.cmd3 = RECVCMD;
  105         dcm_recv_chan.cmd4 = STOPCMD;
  106 }
  107 
  108 netipc_recv(vec, count)
  109         register struct netvec *vec;
  110         int count;
  111 {
  112         spl_t s;
  113 
  114         if (count != 2) {
  115                 panic("netipc_recv");
  116         }
  117         dcm_recv_chan.src2 = vec[0].addr >> 1;
  118         dcm_recv_chan.cnt2 = vec[0].size >> 1;
  119         dcm_recv_chan.src3 = vec[1].addr >> 1;
  120         dcm_recv_chan.cnt3 = vec[1].size >> 1;
  121         s = sploff();
  122         dcm_recv();
  123         splon(s);
  124 }
  125 
  126 dcm_recv_intr()
  127 {
  128         spl_t s;
  129 
  130         if (dcm_recv_header.type == DCM_HDR_TYPE_MACH) {
  131                 netipc_recv_intr();
  132         } else {
  133                 printf("dcm_recv_intr: bad type 0x%x\n", dcm_recv_header.type);
  134                 s = sploff();
  135                 dcm_recv();
  136                 splon(s);
  137         }
  138 }

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