Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)
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FreeBSD/Linux Kernel Cross Reference
sys/ia64/ia64/machdep.c
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1 /*- 2 * Copyright (c) 2003,2004 Marcel Moolenaar 3 * Copyright (c) 2000,2001 Doug Rabson 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25 * SUCH DAMAGE. 26 */ 27 28 #include <sys/cdefs.h> 29 __FBSDID("$FreeBSD: releng/5.4/sys/ia64/ia64/machdep.c 143605 2005-03-14 20:23:03Z marcel $"); 30 31 #include "opt_compat.h" 32 #include "opt_ddb.h" 33 #include "opt_kstack_pages.h" 34 #include "opt_msgbuf.h" 35 36 #include <sys/param.h> 37 #include <sys/proc.h> 38 #include <sys/systm.h> 39 #include <sys/bio.h> 40 #include <sys/buf.h> 41 #include <sys/bus.h> 42 #include <sys/cons.h> 43 #include <sys/cpu.h> 44 #include <sys/eventhandler.h> 45 #include <sys/exec.h> 46 #include <sys/imgact.h> 47 #include <sys/kdb.h> 48 #include <sys/kernel.h> 49 #include <sys/linker.h> 50 #include <sys/lock.h> 51 #include <sys/malloc.h> 52 #include <sys/mbuf.h> 53 #include <sys/msgbuf.h> 54 #include <sys/pcpu.h> 55 #include <sys/ptrace.h> 56 #include <sys/random.h> 57 #include <sys/reboot.h> 58 #include <sys/signalvar.h> 59 #include <sys/syscall.h> 60 #include <sys/sysctl.h> 61 #include <sys/sysproto.h> 62 #include <sys/ucontext.h> 63 #include <sys/uio.h> 64 #include <sys/uuid.h> 65 #include <sys/vmmeter.h> 66 #include <sys/vnode.h> 67 68 #include <ddb/ddb.h> 69 70 #include <net/netisr.h> 71 72 #include <vm/vm.h> 73 #include <vm/vm_extern.h> 74 #include <vm/vm_kern.h> 75 #include <vm/vm_page.h> 76 #include <vm/vm_map.h> 77 #include <vm/vm_object.h> 78 #include <vm/vm_pager.h> 79 80 #include <machine/bootinfo.h> 81 #include <machine/clock.h> 82 #include <machine/cpu.h> 83 #include <machine/efi.h> 84 #include <machine/elf.h> 85 #include <machine/fpu.h> 86 #include <machine/mca.h> 87 #include <machine/md_var.h> 88 #include <machine/mutex.h> 89 #include <machine/pal.h> 90 #include <machine/pcb.h> 91 #include <machine/reg.h> 92 #include <machine/sal.h> 93 #include <machine/sigframe.h> 94 #ifdef SMP 95 #include <machine/smp.h> 96 #endif 97 #include <machine/unwind.h> 98 #include <machine/vmparam.h> 99 100 #include <i386/include/specialreg.h> 101 102 u_int64_t processor_frequency; 103 u_int64_t bus_frequency; 104 u_int64_t itc_frequency; 105 int cold = 1; 106 107 u_int64_t pa_bootinfo; 108 struct bootinfo bootinfo; 109 110 struct pcpu early_pcpu; 111 extern char kstack[]; 112 vm_offset_t proc0kstack; 113 114 extern u_int64_t kernel_text[], _end[]; 115 116 extern u_int64_t ia64_gateway_page[]; 117 extern u_int64_t break_sigtramp[]; 118 extern u_int64_t epc_sigtramp[]; 119 120 FPSWA_INTERFACE *fpswa_interface; 121 122 u_int64_t ia64_pal_base; 123 u_int64_t ia64_port_base; 124 125 char machine[] = MACHINE; 126 SYSCTL_STRING(_hw, HW_MACHINE, machine, CTLFLAG_RD, machine, 0, ""); 127 128 static char cpu_model[64]; 129 SYSCTL_STRING(_hw, HW_MODEL, model, CTLFLAG_RD, cpu_model, 0, 130 "The CPU model name"); 131 132 static char cpu_family[64]; 133 SYSCTL_STRING(_hw, OID_AUTO, family, CTLFLAG_RD, cpu_family, 0, 134 "The CPU family name"); 135 136 #ifdef DDB 137 extern vm_offset_t ksym_start, ksym_end; 138 #endif 139 140 static void cpu_startup(void *); 141 SYSINIT(cpu, SI_SUB_CPU, SI_ORDER_FIRST, cpu_startup, NULL) 142 143 struct msgbuf *msgbufp=0; 144 145 long Maxmem = 0; 146 long realmem = 0; 147 148 vm_offset_t phys_avail[100]; 149 150 /* must be 2 less so 0 0 can signal end of chunks */ 151 #define PHYS_AVAIL_ARRAY_END ((sizeof(phys_avail) / sizeof(vm_offset_t)) - 2) 152 153 void mi_startup(void); /* XXX should be in a MI header */ 154 155 struct kva_md_info kmi; 156 157 #define Mhz 1000000L 158 #define Ghz (1000L*Mhz) 159 160 static void 161 identifycpu(void) 162 { 163 char vendor[17]; 164 char *family_name, *model_name; 165 u_int64_t features, tmp; 166 int number, revision, model, family, archrev; 167 168 /* 169 * Assumes little-endian. 170 */ 171 *(u_int64_t *) &vendor[0] = ia64_get_cpuid(0); 172 *(u_int64_t *) &vendor[8] = ia64_get_cpuid(1); 173 vendor[16] = '\0'; 174 175 tmp = ia64_get_cpuid(3); 176 number = (tmp >> 0) & 0xff; 177 revision = (tmp >> 8) & 0xff; 178 model = (tmp >> 16) & 0xff; 179 family = (tmp >> 24) & 0xff; 180 archrev = (tmp >> 32) & 0xff; 181 182 family_name = model_name = "unknown"; 183 switch (family) { 184 case 0x07: 185 family_name = "Itanium"; 186 model_name = "Merced"; 187 break; 188 case 0x1f: 189 family_name = "Itanium 2"; 190 switch (model) { 191 case 0x00: 192 model_name = "McKinley"; 193 break; 194 case 0x01: 195 /* 196 * Deerfield is a low-voltage variant based on the 197 * Madison core. We need circumstantial evidence 198 * (i.e. the clock frequency) to identify those. 199 * Allow for roughly 1% error margin. 200 */ 201 tmp = processor_frequency >> 7; 202 if ((processor_frequency - tmp) < 1*Ghz && 203 (processor_frequency + tmp) >= 1*Ghz) 204 model_name = "Deerfield"; 205 else 206 model_name = "Madison"; 207 break; 208 } 209 break; 210 } 211 snprintf(cpu_family, sizeof(cpu_family), "%s", family_name); 212 snprintf(cpu_model, sizeof(cpu_model), "%s", model_name); 213 214 features = ia64_get_cpuid(4); 215 216 printf("CPU: %s (", model_name); 217 if (processor_frequency) { 218 printf("%ld.%02ld-Mhz ", 219 (processor_frequency + 4999) / Mhz, 220 ((processor_frequency + 4999) / (Mhz/100)) % 100); 221 } 222 printf("%s)\n", family_name); 223 printf(" Origin = \"%s\" Revision = %d\n", vendor, revision); 224 printf(" Features = 0x%b\n", (u_int32_t) features, 225 "\020" 226 "\001LB" /* long branch (brl) instruction. */ 227 "\002SD" /* Spontaneous deferral. */ 228 "\003AO" /* 16-byte atomic operations (ld, st, cmpxchg). */ ); 229 } 230 231 static void 232 cpu_startup(dummy) 233 void *dummy; 234 { 235 236 /* 237 * Good {morning,afternoon,evening,night}. 238 */ 239 identifycpu(); 240 241 /* startrtclock(); */ 242 #ifdef PERFMON 243 perfmon_init(); 244 #endif 245 printf("real memory = %ld (%ld MB)\n", ia64_ptob(Maxmem), 246 ia64_ptob(Maxmem) / 1048576); 247 248 /* 249 * Display any holes after the first chunk of extended memory. 250 realmem = ia64_ptob(Maxmem); 251 */ 252 if (bootverbose) { 253 int indx; 254 255 printf("Physical memory chunk(s):\n"); 256 for (indx = 0; phys_avail[indx + 1] != 0; indx += 2) { 257 int size1 = phys_avail[indx + 1] - phys_avail[indx]; 258 259 printf("0x%08lx - 0x%08lx, %d bytes (%d pages)\n", phys_avail[indx], 260 phys_avail[indx + 1] - 1, size1, size1 / PAGE_SIZE); 261 } 262 } 263 264 vm_ksubmap_init(&kmi); 265 266 printf("avail memory = %ld (%ld MB)\n", ptoa(cnt.v_free_count), 267 ptoa(cnt.v_free_count) / 1048576); 268 269 if (fpswa_interface == NULL) 270 printf("Warning: no FPSWA package supplied\n"); 271 else 272 printf("FPSWA Revision = 0x%lx, Entry = %p\n", 273 (long)fpswa_interface->Revision, 274 (void *)fpswa_interface->Fpswa); 275 276 /* 277 * Set up buffers, so they can be used to read disk labels. 278 */ 279 bufinit(); 280 vm_pager_bufferinit(); 281 282 /* 283 * Traverse the MADT to discover IOSAPIC and Local SAPIC 284 * information. 285 */ 286 ia64_probe_sapics(); 287 ia64_mca_init(); 288 } 289 290 void 291 cpu_boot(int howto) 292 { 293 294 ia64_efi_runtime->ResetSystem(EfiResetWarm, EFI_SUCCESS, 0, 0); 295 } 296 297 /* Get current clock frequency for the given cpu id. */ 298 int 299 cpu_est_clockrate(int cpu_id, uint64_t *rate) 300 { 301 302 if (pcpu_find(cpu_id) == NULL || rate == NULL) 303 return (EINVAL); 304 *rate = processor_frequency; 305 return (0); 306 } 307 308 void 309 cpu_halt() 310 { 311 312 ia64_efi_runtime->ResetSystem(EfiResetWarm, EFI_SUCCESS, 0, 0); 313 } 314 315 static void 316 cpu_idle_default(void) 317 { 318 struct ia64_pal_result res; 319 320 res = ia64_call_pal_static(PAL_HALT_LIGHT, 0, 0, 0); 321 } 322 323 void 324 cpu_idle() 325 { 326 (*cpu_idle_hook)(); 327 } 328 329 /* Other subsystems (e.g., ACPI) can hook this later. */ 330 void (*cpu_idle_hook)(void) = cpu_idle_default; 331 332 void 333 cpu_reset() 334 { 335 336 cpu_boot(0); 337 } 338 339 void 340 cpu_switch(struct thread *old, struct thread *new) 341 { 342 struct pcb *oldpcb, *newpcb; 343 344 oldpcb = old->td_pcb; 345 #if COMPAT_IA32 346 ia32_savectx(oldpcb); 347 #endif 348 if (PCPU_GET(fpcurthread) == old) 349 old->td_frame->tf_special.psr |= IA64_PSR_DFH; 350 if (!savectx(oldpcb)) { 351 newpcb = new->td_pcb; 352 oldpcb->pcb_current_pmap = 353 pmap_switch(newpcb->pcb_current_pmap); 354 PCPU_SET(curthread, new); 355 #if COMPAT_IA32 356 ia32_restorectx(newpcb); 357 #endif 358 if (PCPU_GET(fpcurthread) == new) 359 new->td_frame->tf_special.psr &= ~IA64_PSR_DFH; 360 restorectx(newpcb); 361 /* We should not get here. */ 362 panic("cpu_switch: restorectx() returned"); 363 /* NOTREACHED */ 364 } 365 } 366 367 void 368 cpu_throw(struct thread *old __unused, struct thread *new) 369 { 370 struct pcb *newpcb; 371 372 newpcb = new->td_pcb; 373 (void)pmap_switch(newpcb->pcb_current_pmap); 374 PCPU_SET(curthread, new); 375 #if COMPAT_IA32 376 ia32_restorectx(newpcb); 377 #endif 378 restorectx(newpcb); 379 /* We should not get here. */ 380 panic("cpu_throw: restorectx() returned"); 381 /* NOTREACHED */ 382 } 383 384 void 385 cpu_pcpu_init(struct pcpu *pcpu, int cpuid, size_t size) 386 { 387 size_t pcpusz; 388 389 /* 390 * Make sure the PCB is 16-byte aligned by making the PCPU 391 * a multiple of 16 bytes. We assume the PCPU is 16-byte 392 * aligned itself. 393 */ 394 pcpusz = (sizeof(struct pcpu) + 15) & ~15; 395 KASSERT(size >= pcpusz + sizeof(struct pcb), 396 ("%s: too small an allocation for pcpu", __func__)); 397 pcpu->pc_pcb = (struct pcb *)((char*)pcpu + pcpusz); 398 pcpu->pc_acpi_id = cpuid; 399 } 400 401 void 402 map_pal_code(void) 403 { 404 struct ia64_pte pte; 405 u_int64_t psr; 406 407 if (ia64_pal_base == 0) 408 return; 409 410 bzero(&pte, sizeof(pte)); 411 pte.pte_p = 1; 412 pte.pte_ma = PTE_MA_WB; 413 pte.pte_a = 1; 414 pte.pte_d = 1; 415 pte.pte_pl = PTE_PL_KERN; 416 pte.pte_ar = PTE_AR_RWX; 417 pte.pte_ppn = ia64_pal_base >> 12; 418 419 __asm __volatile("ptr.d %0,%1; ptr.i %0,%1" :: 420 "r"(IA64_PHYS_TO_RR7(ia64_pal_base)), "r"(IA64_ID_PAGE_SHIFT<<2)); 421 422 __asm __volatile("mov %0=psr" : "=r"(psr)); 423 __asm __volatile("rsm psr.ic|psr.i"); 424 __asm __volatile("srlz.i"); 425 __asm __volatile("mov cr.ifa=%0" :: 426 "r"(IA64_PHYS_TO_RR7(ia64_pal_base))); 427 __asm __volatile("mov cr.itir=%0" :: "r"(IA64_ID_PAGE_SHIFT << 2)); 428 __asm __volatile("itr.d dtr[%0]=%1" :: "r"(1), "r"(*(u_int64_t*)&pte)); 429 __asm __volatile("srlz.d"); /* XXX not needed. */ 430 __asm __volatile("itr.i itr[%0]=%1" :: "r"(1), "r"(*(u_int64_t*)&pte)); 431 __asm __volatile("mov psr.l=%0" :: "r" (psr)); 432 __asm __volatile("srlz.i"); 433 } 434 435 void 436 map_gateway_page(void) 437 { 438 struct ia64_pte pte; 439 u_int64_t psr; 440 441 bzero(&pte, sizeof(pte)); 442 pte.pte_p = 1; 443 pte.pte_ma = PTE_MA_WB; 444 pte.pte_a = 1; 445 pte.pte_d = 1; 446 pte.pte_pl = PTE_PL_KERN; 447 pte.pte_ar = PTE_AR_X_RX; 448 pte.pte_ppn = IA64_RR_MASK((u_int64_t)ia64_gateway_page) >> 12; 449 450 __asm __volatile("ptr.d %0,%1; ptr.i %0,%1" :: 451 "r"(VM_MAX_ADDRESS), "r"(PAGE_SHIFT << 2)); 452 453 __asm __volatile("mov %0=psr" : "=r"(psr)); 454 __asm __volatile("rsm psr.ic|psr.i"); 455 __asm __volatile("srlz.i"); 456 __asm __volatile("mov cr.ifa=%0" :: "r"(VM_MAX_ADDRESS)); 457 __asm __volatile("mov cr.itir=%0" :: "r"(PAGE_SHIFT << 2)); 458 __asm __volatile("itr.d dtr[%0]=%1" :: "r"(3), "r"(*(u_int64_t*)&pte)); 459 __asm __volatile("srlz.d"); /* XXX not needed. */ 460 __asm __volatile("itr.i itr[%0]=%1" :: "r"(3), "r"(*(u_int64_t*)&pte)); 461 __asm __volatile("mov psr.l=%0" :: "r" (psr)); 462 __asm __volatile("srlz.i"); 463 464 /* Expose the mapping to userland in ar.k5 */ 465 ia64_set_k5(VM_MAX_ADDRESS); 466 } 467 468 static void 469 calculate_frequencies(void) 470 { 471 struct ia64_sal_result sal; 472 struct ia64_pal_result pal; 473 474 sal = ia64_sal_entry(SAL_FREQ_BASE, 0, 0, 0, 0, 0, 0, 0); 475 pal = ia64_call_pal_static(PAL_FREQ_RATIOS, 0, 0, 0); 476 477 if (sal.sal_status == 0 && pal.pal_status == 0) { 478 if (bootverbose) { 479 printf("Platform clock frequency %ld Hz\n", 480 sal.sal_result[0]); 481 printf("Processor ratio %ld/%ld, Bus ratio %ld/%ld, " 482 "ITC ratio %ld/%ld\n", 483 pal.pal_result[0] >> 32, 484 pal.pal_result[0] & ((1L << 32) - 1), 485 pal.pal_result[1] >> 32, 486 pal.pal_result[1] & ((1L << 32) - 1), 487 pal.pal_result[2] >> 32, 488 pal.pal_result[2] & ((1L << 32) - 1)); 489 } 490 processor_frequency = 491 sal.sal_result[0] * (pal.pal_result[0] >> 32) 492 / (pal.pal_result[0] & ((1L << 32) - 1)); 493 bus_frequency = 494 sal.sal_result[0] * (pal.pal_result[1] >> 32) 495 / (pal.pal_result[1] & ((1L << 32) - 1)); 496 itc_frequency = 497 sal.sal_result[0] * (pal.pal_result[2] >> 32) 498 / (pal.pal_result[2] & ((1L << 32) - 1)); 499 } 500 } 501 502 void 503 ia64_init(void) 504 { 505 int phys_avail_cnt; 506 vm_offset_t kernstart, kernend; 507 vm_offset_t kernstartpfn, kernendpfn, pfn0, pfn1; 508 char *p; 509 EFI_MEMORY_DESCRIPTOR *md, *mdp; 510 int mdcount, i, metadata_missing; 511 512 /* NO OUTPUT ALLOWED UNTIL FURTHER NOTICE */ 513 514 /* 515 * TODO: Disable interrupts, floating point etc. 516 * Maybe flush cache and tlb 517 */ 518 ia64_set_fpsr(IA64_FPSR_DEFAULT); 519 520 /* 521 * TODO: Get critical system information (if possible, from the 522 * information provided by the boot program). 523 */ 524 525 /* 526 * pa_bootinfo is the physical address of the bootinfo block as 527 * passed to us by the loader and set in locore.s. 528 */ 529 bootinfo = *(struct bootinfo *)(IA64_PHYS_TO_RR7(pa_bootinfo)); 530 531 if (bootinfo.bi_magic != BOOTINFO_MAGIC || bootinfo.bi_version != 1) { 532 bzero(&bootinfo, sizeof(bootinfo)); 533 bootinfo.bi_kernend = (vm_offset_t) round_page(_end); 534 } 535 536 /* 537 * Look for the I/O ports first - we need them for console 538 * probing. 539 */ 540 mdcount = bootinfo.bi_memmap_size / bootinfo.bi_memdesc_size; 541 md = (EFI_MEMORY_DESCRIPTOR *) IA64_PHYS_TO_RR7(bootinfo.bi_memmap); 542 543 for (i = 0, mdp = md; i < mdcount; i++, 544 mdp = NextMemoryDescriptor(mdp, bootinfo.bi_memdesc_size)) { 545 if (mdp->Type == EfiMemoryMappedIOPortSpace) 546 ia64_port_base = IA64_PHYS_TO_RR6(mdp->PhysicalStart); 547 else if (mdp->Type == EfiPalCode) 548 ia64_pal_base = mdp->PhysicalStart; 549 } 550 551 metadata_missing = 0; 552 if (bootinfo.bi_modulep) 553 preload_metadata = (caddr_t)bootinfo.bi_modulep; 554 else 555 metadata_missing = 1; 556 if (envmode == 1) 557 kern_envp = static_env; 558 else 559 kern_envp = (caddr_t)bootinfo.bi_envp; 560 561 /* 562 * Look at arguments passed to us and compute boothowto. 563 */ 564 boothowto = bootinfo.bi_boothowto; 565 566 /* 567 * Catch case of boot_verbose set in environment. 568 */ 569 if ((p = getenv("boot_verbose")) != NULL) { 570 if (strcmp(p, "yes") == 0 || strcmp(p, "YES") == 0) { 571 boothowto |= RB_VERBOSE; 572 } 573 freeenv(p); 574 } 575 576 if (boothowto & RB_VERBOSE) 577 bootverbose = 1; 578 579 /* 580 * Initialize the console before we print anything out. 581 */ 582 cninit(); 583 584 /* OUTPUT NOW ALLOWED */ 585 586 if (ia64_pal_base != 0) { 587 ia64_pal_base &= ~IA64_ID_PAGE_MASK; 588 /* 589 * We use a TR to map the first 256M of memory - this might 590 * cover the palcode too. 591 */ 592 if (ia64_pal_base == 0) 593 printf("PAL code mapped by the kernel's TR\n"); 594 } else 595 printf("PAL code not found\n"); 596 597 /* 598 * Wire things up so we can call the firmware. 599 */ 600 map_pal_code(); 601 ia64_efi_init(); 602 calculate_frequencies(); 603 604 /* 605 * Find the beginning and end of the kernel. 606 */ 607 kernstart = trunc_page(kernel_text); 608 #ifdef DDB 609 ksym_start = bootinfo.bi_symtab; 610 ksym_end = bootinfo.bi_esymtab; 611 kernend = (vm_offset_t)round_page(ksym_end); 612 #else 613 kernend = (vm_offset_t)round_page(_end); 614 #endif 615 616 /* But if the bootstrap tells us otherwise, believe it! */ 617 if (bootinfo.bi_kernend) 618 kernend = round_page(bootinfo.bi_kernend); 619 if (metadata_missing) 620 printf("WARNING: loader(8) metadata is missing!\n"); 621 622 /* Get FPSWA interface */ 623 fpswa_interface = (bootinfo.bi_fpswa == 0) ? NULL : 624 (FPSWA_INTERFACE *)IA64_PHYS_TO_RR7(bootinfo.bi_fpswa); 625 626 /* Init basic tunables, including hz */ 627 init_param1(); 628 629 p = getenv("kernelname"); 630 if (p) { 631 strncpy(kernelname, p, sizeof(kernelname) - 1); 632 freeenv(p); 633 } 634 635 kernstartpfn = atop(IA64_RR_MASK(kernstart)); 636 kernendpfn = atop(IA64_RR_MASK(kernend)); 637 638 /* 639 * Size the memory regions and load phys_avail[] with the results. 640 */ 641 642 /* 643 * Find out how much memory is available, by looking at 644 * the memory descriptors. 645 */ 646 647 #ifdef DEBUG_MD 648 printf("Memory descriptor count: %d\n", mdcount); 649 #endif 650 651 phys_avail_cnt = 0; 652 for (i = 0, mdp = md; i < mdcount; i++, 653 mdp = NextMemoryDescriptor(mdp, bootinfo.bi_memdesc_size)) { 654 #ifdef DEBUG_MD 655 printf("MD %d: type %d pa 0x%lx cnt 0x%lx\n", i, 656 mdp->Type, 657 mdp->PhysicalStart, 658 mdp->NumberOfPages); 659 #endif 660 661 pfn0 = ia64_btop(round_page(mdp->PhysicalStart)); 662 pfn1 = ia64_btop(trunc_page(mdp->PhysicalStart 663 + mdp->NumberOfPages * 4096)); 664 if (pfn1 <= pfn0) 665 continue; 666 667 if (mdp->Type != EfiConventionalMemory) 668 continue; 669 670 /* 671 * Wimp out for now since we do not DTRT here with 672 * pci bus mastering (no bounce buffering, for example). 673 */ 674 if (pfn0 >= ia64_btop(0x100000000UL)) { 675 printf("Skipping memory chunk start 0x%lx\n", 676 mdp->PhysicalStart); 677 continue; 678 } 679 if (pfn1 >= ia64_btop(0x100000000UL)) { 680 printf("Skipping memory chunk end 0x%lx\n", 681 mdp->PhysicalStart + mdp->NumberOfPages * 4096); 682 continue; 683 } 684 685 /* 686 * We have a memory descriptor that describes conventional 687 * memory that is for general use. We must determine if the 688 * loader has put the kernel in this region. 689 */ 690 physmem += (pfn1 - pfn0); 691 if (pfn0 <= kernendpfn && kernstartpfn <= pfn1) { 692 /* 693 * Must compute the location of the kernel 694 * within the segment. 695 */ 696 #ifdef DEBUG_MD 697 printf("Descriptor %d contains kernel\n", i); 698 #endif 699 if (pfn0 < kernstartpfn) { 700 /* 701 * There is a chunk before the kernel. 702 */ 703 #ifdef DEBUG_MD 704 printf("Loading chunk before kernel: " 705 "0x%lx / 0x%lx\n", pfn0, kernstartpfn); 706 #endif 707 phys_avail[phys_avail_cnt] = ia64_ptob(pfn0); 708 phys_avail[phys_avail_cnt+1] = ia64_ptob(kernstartpfn); 709 phys_avail_cnt += 2; 710 } 711 if (kernendpfn < pfn1) { 712 /* 713 * There is a chunk after the kernel. 714 */ 715 #ifdef DEBUG_MD 716 printf("Loading chunk after kernel: " 717 "0x%lx / 0x%lx\n", kernendpfn, pfn1); 718 #endif 719 phys_avail[phys_avail_cnt] = ia64_ptob(kernendpfn); 720 phys_avail[phys_avail_cnt+1] = ia64_ptob(pfn1); 721 phys_avail_cnt += 2; 722 } 723 } else { 724 /* 725 * Just load this cluster as one chunk. 726 */ 727 #ifdef DEBUG_MD 728 printf("Loading descriptor %d: 0x%lx / 0x%lx\n", i, 729 pfn0, pfn1); 730 #endif 731 phys_avail[phys_avail_cnt] = ia64_ptob(pfn0); 732 phys_avail[phys_avail_cnt+1] = ia64_ptob(pfn1); 733 phys_avail_cnt += 2; 734 735 } 736 } 737 phys_avail[phys_avail_cnt] = 0; 738 739 Maxmem = physmem; 740 init_param2(physmem); 741 742 /* 743 * Initialize error message buffer (at end of core). 744 */ 745 msgbufp = (struct msgbuf *)pmap_steal_memory(MSGBUF_SIZE); 746 msgbufinit(msgbufp, MSGBUF_SIZE); 747 748 proc_linkup(&proc0, &ksegrp0, &thread0); 749 /* 750 * Init mapping for kernel stack for proc 0 751 */ 752 proc0kstack = (vm_offset_t)kstack; 753 thread0.td_kstack = proc0kstack; 754 thread0.td_pcb = (struct pcb *) 755 (thread0.td_kstack + KSTACK_PAGES * PAGE_SIZE) - 1; 756 /* 757 * Setup the global data for the bootstrap cpu. 758 */ 759 pcpup = (struct pcpu *)pmap_steal_memory(PAGE_SIZE); 760 ia64_set_k4((u_int64_t)pcpup); 761 pcpu_init(pcpup, 0, PAGE_SIZE); 762 PCPU_SET(curthread, &thread0); 763 764 /* 765 * Initialize the rest of proc 0's PCB. 766 * 767 * Set the kernel sp, reserving space for an (empty) trapframe, 768 * and make proc0's trapframe pointer point to it for sanity. 769 * Initialise proc0's backing store to start after u area. 770 */ 771 thread0.td_frame = (struct trapframe *)thread0.td_pcb - 1; 772 thread0.td_frame->tf_length = sizeof(struct trapframe); 773 thread0.td_frame->tf_flags = FRAME_SYSCALL; 774 thread0.td_pcb->pcb_special.sp = 775 (u_int64_t)thread0.td_frame - 16; 776 thread0.td_pcb->pcb_special.bspstore = (u_int64_t)proc0kstack; 777 778 mutex_init(); 779 780 /* 781 * Initialize the virtual memory system. 782 */ 783 pmap_bootstrap(); 784 785 /* 786 * Initialize debuggers, and break into them if appropriate. 787 */ 788 kdb_init(); 789 790 #ifdef KDB 791 if (boothowto & RB_KDB) 792 kdb_enter("Boot flags requested debugger\n"); 793 #endif 794 795 ia64_set_tpr(0); 796 797 /* 798 * Save our current context so that we have a known (maybe even 799 * sane) context as the initial context for new threads that are 800 * forked from us. If any of those threads (including thread0) 801 * does something wrong, we may be lucky and return here where 802 * we're ready for them with a nice panic. 803 */ 804 if (!savectx(thread0.td_pcb)) 805 mi_startup(); 806 807 /* We should not get here. */ 808 panic("ia64_init: Whooaa there!"); 809 /* NOTREACHED */ 810 } 811 812 void 813 bzero(void *buf, size_t len) 814 { 815 caddr_t p = buf; 816 817 while (((vm_offset_t) p & (sizeof(u_long) - 1)) && len) { 818 *p++ = 0; 819 len--; 820 } 821 while (len >= sizeof(u_long) * 8) { 822 *(u_long*) p = 0; 823 *((u_long*) p + 1) = 0; 824 *((u_long*) p + 2) = 0; 825 *((u_long*) p + 3) = 0; 826 len -= sizeof(u_long) * 8; 827 *((u_long*) p + 4) = 0; 828 *((u_long*) p + 5) = 0; 829 *((u_long*) p + 6) = 0; 830 *((u_long*) p + 7) = 0; 831 p += sizeof(u_long) * 8; 832 } 833 while (len >= sizeof(u_long)) { 834 *(u_long*) p = 0; 835 len -= sizeof(u_long); 836 p += sizeof(u_long); 837 } 838 while (len) { 839 *p++ = 0; 840 len--; 841 } 842 } 843 844 void 845 DELAY(int n) 846 { 847 u_int64_t start, end, now; 848 849 start = ia64_get_itc(); 850 end = start + (itc_frequency * n) / 1000000; 851 /* printf("DELAY from 0x%lx to 0x%lx\n", start, end); */ 852 do { 853 now = ia64_get_itc(); 854 } while (now < end || (now > start && end < start)); 855 } 856 857 /* 858 * Send an interrupt (signal) to a process. 859 */ 860 void 861 sendsig(sig_t catcher, int sig, sigset_t *mask, u_long code) 862 { 863 struct proc *p; 864 struct thread *td; 865 struct trapframe *tf; 866 struct sigacts *psp; 867 struct sigframe sf, *sfp; 868 u_int64_t sbs, sp; 869 int oonstack; 870 871 td = curthread; 872 p = td->td_proc; 873 PROC_LOCK_ASSERT(p, MA_OWNED); 874 psp = p->p_sigacts; 875 mtx_assert(&psp->ps_mtx, MA_OWNED); 876 tf = td->td_frame; 877 sp = tf->tf_special.sp; 878 oonstack = sigonstack(sp); 879 sbs = 0; 880 881 /* save user context */ 882 bzero(&sf, sizeof(struct sigframe)); 883 sf.sf_uc.uc_sigmask = *mask; 884 sf.sf_uc.uc_stack = td->td_sigstk; 885 sf.sf_uc.uc_stack.ss_flags = (td->td_pflags & TDP_ALTSTACK) 886 ? ((oonstack) ? SS_ONSTACK : 0) : SS_DISABLE; 887 888 /* 889 * Allocate and validate space for the signal handler 890 * context. Note that if the stack is in P0 space, the 891 * call to grow() is a nop, and the useracc() check 892 * will fail if the process has not already allocated 893 * the space with a `brk'. 894 */ 895 if ((td->td_pflags & TDP_ALTSTACK) != 0 && !oonstack && 896 SIGISMEMBER(psp->ps_sigonstack, sig)) { 897 sbs = (u_int64_t)td->td_sigstk.ss_sp; 898 sbs = (sbs + 15) & ~15; 899 sfp = (struct sigframe *)(sbs + td->td_sigstk.ss_size); 900 #if defined(COMPAT_43) 901 td->td_sigstk.ss_flags |= SS_ONSTACK; 902 #endif 903 } else 904 sfp = (struct sigframe *)sp; 905 sfp = (struct sigframe *)((u_int64_t)(sfp - 1) & ~15); 906 907 /* Fill in the siginfo structure for POSIX handlers. */ 908 if (SIGISMEMBER(psp->ps_siginfo, sig)) { 909 sf.sf_si.si_signo = sig; 910 sf.sf_si.si_code = code; 911 sf.sf_si.si_addr = (void*)tf->tf_special.ifa; 912 code = (u_int64_t)&sfp->sf_si; 913 } 914 915 mtx_unlock(&psp->ps_mtx); 916 PROC_UNLOCK(p); 917 918 get_mcontext(td, &sf.sf_uc.uc_mcontext, 0); 919 920 /* Copy the frame out to userland. */ 921 if (copyout(&sf, sfp, sizeof(sf)) != 0) { 922 /* 923 * Process has trashed its stack; give it an illegal 924 * instruction to halt it in its tracks. 925 */ 926 PROC_LOCK(p); 927 sigexit(td, SIGILL); 928 return; 929 } 930 931 if ((tf->tf_flags & FRAME_SYSCALL) == 0) { 932 tf->tf_special.psr &= ~IA64_PSR_RI; 933 tf->tf_special.iip = ia64_get_k5() + 934 ((uint64_t)break_sigtramp - (uint64_t)ia64_gateway_page); 935 } else 936 tf->tf_special.iip = ia64_get_k5() + 937 ((uint64_t)epc_sigtramp - (uint64_t)ia64_gateway_page); 938 939 /* 940 * Setup the trapframe to return to the signal trampoline. We pass 941 * information to the trampoline in the following registers: 942 * 943 * gp new backing store or NULL 944 * r8 signal number 945 * r9 signal code or siginfo pointer 946 * r10 signal handler (function descriptor) 947 */ 948 tf->tf_special.sp = (u_int64_t)sfp - 16; 949 tf->tf_special.gp = sbs; 950 tf->tf_special.bspstore = sf.sf_uc.uc_mcontext.mc_special.bspstore; 951 tf->tf_special.ndirty = 0; 952 tf->tf_special.rnat = sf.sf_uc.uc_mcontext.mc_special.rnat; 953 tf->tf_scratch.gr8 = sig; 954 tf->tf_scratch.gr9 = code; 955 tf->tf_scratch.gr10 = (u_int64_t)catcher; 956 957 PROC_LOCK(p); 958 mtx_lock(&psp->ps_mtx); 959 } 960 961 /* 962 * Build siginfo_t for SA thread 963 */ 964 void 965 cpu_thread_siginfo(int sig, u_long code, siginfo_t *si) 966 { 967 struct proc *p; 968 struct thread *td; 969 970 td = curthread; 971 p = td->td_proc; 972 PROC_LOCK_ASSERT(p, MA_OWNED); 973 974 bzero(si, sizeof(*si)); 975 si->si_signo = sig; 976 si->si_code = code; 977 /* XXXKSE fill other fields */ 978 } 979 980 /* 981 * System call to cleanup state after a signal 982 * has been taken. Reset signal mask and 983 * stack state from context left by sendsig (above). 984 * Return to previous pc and psl as specified by 985 * context left by sendsig. Check carefully to 986 * make sure that the user has not modified the 987 * state to gain improper privileges. 988 * 989 * MPSAFE 990 */ 991 int 992 sigreturn(struct thread *td, 993 struct sigreturn_args /* { 994 ucontext_t *sigcntxp; 995 } */ *uap) 996 { 997 ucontext_t uc; 998 struct trapframe *tf; 999 struct proc *p; 1000 struct pcb *pcb; 1001 1002 tf = td->td_frame; 1003 p = td->td_proc; 1004 pcb = td->td_pcb; 1005 1006 /* 1007 * Fetch the entire context structure at once for speed. 1008 * We don't use a normal argument to simplify RSE handling. 1009 */ 1010 if (copyin(uap->sigcntxp, (caddr_t)&uc, sizeof(uc))) 1011 return (EFAULT); 1012 1013 set_mcontext(td, &uc.uc_mcontext); 1014 1015 PROC_LOCK(p); 1016 #if defined(COMPAT_43) 1017 if (sigonstack(tf->tf_special.sp)) 1018 td->td_sigstk.ss_flags |= SS_ONSTACK; 1019 else 1020 td->td_sigstk.ss_flags &= ~SS_ONSTACK; 1021 #endif 1022 td->td_sigmask = uc.uc_sigmask; 1023 SIG_CANTMASK(td->td_sigmask); 1024 signotify(td); 1025 PROC_UNLOCK(p); 1026 1027 return (EJUSTRETURN); 1028 } 1029 1030 #ifdef COMPAT_FREEBSD4 1031 int 1032 freebsd4_sigreturn(struct thread *td, struct freebsd4_sigreturn_args *uap) 1033 { 1034 1035 return sigreturn(td, (struct sigreturn_args *)uap); 1036 } 1037 #endif 1038 1039 /* 1040 * Construct a PCB from a trapframe. This is called from kdb_trap() where 1041 * we want to start a backtrace from the function that caused us to enter 1042 * the debugger. We have the context in the trapframe, but base the trace 1043 * on the PCB. The PCB doesn't have to be perfect, as long as it contains 1044 * enough for a backtrace. 1045 */ 1046 void 1047 makectx(struct trapframe *tf, struct pcb *pcb) 1048 { 1049 1050 pcb->pcb_special = tf->tf_special; 1051 pcb->pcb_special.__spare = ~0UL; /* XXX see unwind.c */ 1052 save_callee_saved(&pcb->pcb_preserved); 1053 save_callee_saved_fp(&pcb->pcb_preserved_fp); 1054 } 1055 1056 void 1057 ia64_flush_dirty(struct thread *td, struct _special *r) 1058 { 1059 uint64_t bspst, kstk, rnat; 1060 1061 if (r->ndirty == 0) 1062 return; 1063 1064 kstk = td->td_kstack + (r->bspstore & 0x1ffUL); 1065 __asm __volatile("mov ar.rsc=0;;"); 1066 __asm __volatile("mov %0=ar.bspstore" : "=r"(bspst)); 1067 /* Make sure we have all the user registers written out. */ 1068 if (bspst - kstk < r->ndirty) { 1069 __asm __volatile("flushrs;;"); 1070 __asm __volatile("mov %0=ar.bspstore" : "=r"(bspst)); 1071 } 1072 __asm __volatile("mov %0=ar.rnat;;" : "=r"(rnat)); 1073 __asm __volatile("mov ar.rsc=3"); 1074 copyout((void*)kstk, (void*)r->bspstore, r->ndirty); 1075 kstk += r->ndirty; 1076 r->rnat = (bspst > kstk && (bspst & 0x1ffUL) < (kstk & 0x1ffUL)) 1077 ? *(uint64_t*)(kstk | 0x1f8UL) : rnat; 1078 r->bspstore += r->ndirty; 1079 r->ndirty = 0; 1080 } 1081 1082 int 1083 get_mcontext(struct thread *td, mcontext_t *mc, int flags) 1084 { 1085 struct trapframe *tf; 1086 1087 tf = td->td_frame; 1088 bzero(mc, sizeof(*mc)); 1089 mc->mc_special = tf->tf_special; 1090 ia64_flush_dirty(td, &mc->mc_special); 1091 if (tf->tf_flags & FRAME_SYSCALL) { 1092 mc->mc_flags |= _MC_FLAGS_SYSCALL_CONTEXT; 1093 mc->mc_scratch = tf->tf_scratch; 1094 if (flags & GET_MC_CLEAR_RET) { 1095 mc->mc_scratch.gr8 = 0; 1096 mc->mc_scratch.gr9 = 0; 1097 mc->mc_scratch.gr10 = 0; 1098 mc->mc_scratch.gr11 = 0; 1099 } 1100 } else { 1101 mc->mc_flags |= _MC_FLAGS_ASYNC_CONTEXT; 1102 mc->mc_scratch = tf->tf_scratch; 1103 mc->mc_scratch_fp = tf->tf_scratch_fp; 1104 /* 1105 * XXX If the thread never used the high FP registers, we 1106 * probably shouldn't waste time saving them. 1107 */ 1108 ia64_highfp_save(td); 1109 mc->mc_flags |= _MC_FLAGS_HIGHFP_VALID; 1110 mc->mc_high_fp = td->td_pcb->pcb_high_fp; 1111 } 1112 save_callee_saved(&mc->mc_preserved); 1113 save_callee_saved_fp(&mc->mc_preserved_fp); 1114 return (0); 1115 } 1116 1117 int 1118 set_mcontext(struct thread *td, const mcontext_t *mc) 1119 { 1120 struct _special s; 1121 struct trapframe *tf; 1122 uint64_t psrmask; 1123 1124 tf = td->td_frame; 1125 1126 KASSERT((tf->tf_special.ndirty & ~PAGE_MASK) == 0, 1127 ("Whoa there! We have more than 8KB of dirty registers!")); 1128 1129 s = mc->mc_special; 1130 /* 1131 * Only copy the user mask and the restart instruction bit from 1132 * the new context. 1133 */ 1134 psrmask = IA64_PSR_BE | IA64_PSR_UP | IA64_PSR_AC | IA64_PSR_MFL | 1135 IA64_PSR_MFH | IA64_PSR_RI; 1136 s.psr = (tf->tf_special.psr & ~psrmask) | (s.psr & psrmask); 1137 /* We don't have any dirty registers of the new context. */ 1138 s.ndirty = 0; 1139 if (mc->mc_flags & _MC_FLAGS_ASYNC_CONTEXT) { 1140 /* 1141 * We can get an async context passed to us while we 1142 * entered the kernel through a syscall: sigreturn(2) 1143 * and kse_switchin(2) both take contexts that could 1144 * previously be the result of a trap or interrupt. 1145 * Hence, we cannot assert that the trapframe is not 1146 * a syscall frame, but we can assert that it's at 1147 * least an expected syscall. 1148 */ 1149 if (tf->tf_flags & FRAME_SYSCALL) { 1150 KASSERT(tf->tf_scratch.gr15 == SYS_sigreturn || 1151 tf->tf_scratch.gr15 == SYS_kse_switchin, ("foo")); 1152 tf->tf_flags &= ~FRAME_SYSCALL; 1153 } 1154 tf->tf_scratch = mc->mc_scratch; 1155 tf->tf_scratch_fp = mc->mc_scratch_fp; 1156 if (mc->mc_flags & _MC_FLAGS_HIGHFP_VALID) 1157 td->td_pcb->pcb_high_fp = mc->mc_high_fp; 1158 } else { 1159 KASSERT((tf->tf_flags & FRAME_SYSCALL) != 0, ("foo")); 1160 if ((mc->mc_flags & _MC_FLAGS_SYSCALL_CONTEXT) == 0) { 1161 s.cfm = tf->tf_special.cfm; 1162 s.iip = tf->tf_special.iip; 1163 tf->tf_scratch.gr15 = 0; /* Clear syscall nr. */ 1164 } else 1165 tf->tf_scratch = mc->mc_scratch; 1166 } 1167 tf->tf_special = s; 1168 restore_callee_saved(&mc->mc_preserved); 1169 restore_callee_saved_fp(&mc->mc_preserved_fp); 1170 1171 if (mc->mc_flags & _MC_FLAGS_KSE_SET_MBOX) 1172 suword((caddr_t)mc->mc_special.ifa, mc->mc_special.isr); 1173 1174 return (0); 1175 } 1176 1177 /* 1178 * Clear registers on exec. 1179 */ 1180 void 1181 exec_setregs(struct thread *td, u_long entry, u_long stack, u_long ps_strings) 1182 { 1183 struct trapframe *tf; 1184 uint64_t *ksttop, *kst; 1185 1186 tf = td->td_frame; 1187 ksttop = (uint64_t*)(td->td_kstack + tf->tf_special.ndirty + 1188 (tf->tf_special.bspstore & 0x1ffUL)); 1189 1190 /* 1191 * We can ignore up to 8KB of dirty registers by masking off the 1192 * lower 13 bits in exception_restore() or epc_syscall(). This 1193 * should be enough for a couple of years, but if there are more 1194 * than 8KB of dirty registers, we lose track of the bottom of 1195 * the kernel stack. The solution is to copy the active part of 1196 * the kernel stack down 1 page (or 2, but not more than that) 1197 * so that we always have less than 8KB of dirty registers. 1198 */ 1199 KASSERT((tf->tf_special.ndirty & ~PAGE_MASK) == 0, 1200 ("Whoa there! We have more than 8KB of dirty registers!")); 1201 1202 bzero(&tf->tf_special, sizeof(tf->tf_special)); 1203 if ((tf->tf_flags & FRAME_SYSCALL) == 0) { /* break syscalls. */ 1204 bzero(&tf->tf_scratch, sizeof(tf->tf_scratch)); 1205 bzero(&tf->tf_scratch_fp, sizeof(tf->tf_scratch_fp)); 1206 tf->tf_special.cfm = (1UL<<63) | (3UL<<7) | 3UL; 1207 tf->tf_special.bspstore = IA64_BACKINGSTORE; 1208 /* 1209 * Copy the arguments onto the kernel register stack so that 1210 * they get loaded by the loadrs instruction. Skip over the 1211 * NaT collection points. 1212 */ 1213 kst = ksttop - 1; 1214 if (((uintptr_t)kst & 0x1ff) == 0x1f8) 1215 *kst-- = 0; 1216 *kst-- = 0; 1217 if (((uintptr_t)kst & 0x1ff) == 0x1f8) 1218 *kst-- = 0; 1219 *kst-- = ps_strings; 1220 if (((uintptr_t)kst & 0x1ff) == 0x1f8) 1221 *kst-- = 0; 1222 *kst = stack; 1223 tf->tf_special.ndirty = (ksttop - kst) << 3; 1224 } else { /* epc syscalls (default). */ 1225 tf->tf_special.cfm = (3UL<<62) | (3UL<<7) | 3UL; 1226 tf->tf_special.bspstore = IA64_BACKINGSTORE + 24; 1227 /* 1228 * Write values for out0, out1 and out2 to the user's backing 1229 * store and arrange for them to be restored into the user's 1230 * initial register frame. 1231 * Assumes that (bspstore & 0x1f8) < 0x1e0. 1232 */ 1233 suword((caddr_t)tf->tf_special.bspstore - 24, stack); 1234 suword((caddr_t)tf->tf_special.bspstore - 16, ps_strings); 1235 suword((caddr_t)tf->tf_special.bspstore - 8, 0); 1236 } 1237 1238 tf->tf_special.iip = entry; 1239 tf->tf_special.sp = (stack & ~15) - 16; 1240 tf->tf_special.rsc = 0xf; 1241 tf->tf_special.fpsr = IA64_FPSR_DEFAULT; 1242 tf->tf_special.psr = IA64_PSR_IC | IA64_PSR_I | IA64_PSR_IT | 1243 IA64_PSR_DT | IA64_PSR_RT | IA64_PSR_DFH | IA64_PSR_BN | 1244 IA64_PSR_CPL_USER; 1245 } 1246 1247 int 1248 ptrace_set_pc(struct thread *td, unsigned long addr) 1249 { 1250 uint64_t slot; 1251 1252 switch (addr & 0xFUL) { 1253 case 0: 1254 slot = IA64_PSR_RI_0; 1255 break; 1256 case 1: 1257 /* XXX we need to deal with MLX bundles here */ 1258 slot = IA64_PSR_RI_1; 1259 break; 1260 case 2: 1261 slot = IA64_PSR_RI_2; 1262 break; 1263 default: 1264 return (EINVAL); 1265 } 1266 1267 td->td_frame->tf_special.iip = addr & ~0x0FULL; 1268 td->td_frame->tf_special.psr = 1269 (td->td_frame->tf_special.psr & ~IA64_PSR_RI) | slot; 1270 return (0); 1271 } 1272 1273 int 1274 ptrace_single_step(struct thread *td) 1275 { 1276 struct trapframe *tf; 1277 1278 /* 1279 * There's no way to set single stepping when we're leaving the 1280 * kernel through the EPC syscall path. The way we solve this is 1281 * by enabling the lower-privilege trap so that we re-enter the 1282 * kernel as soon as the privilege level changes. See trap.c for 1283 * how we proceed from there. 1284 */ 1285 tf = td->td_frame; 1286 if (tf->tf_flags & FRAME_SYSCALL) 1287 tf->tf_special.psr |= IA64_PSR_LP; 1288 else 1289 tf->tf_special.psr |= IA64_PSR_SS; 1290 return (0); 1291 } 1292 1293 int 1294 ptrace_clear_single_step(struct thread *td) 1295 { 1296 struct trapframe *tf; 1297 1298 /* 1299 * Clear any and all status bits we may use to implement single 1300 * stepping. 1301 */ 1302 tf = td->td_frame; 1303 tf->tf_special.psr &= ~IA64_PSR_SS; 1304 tf->tf_special.psr &= ~IA64_PSR_LP; 1305 tf->tf_special.psr &= ~IA64_PSR_TB; 1306 return (0); 1307 } 1308 1309 int 1310 fill_regs(struct thread *td, struct reg *regs) 1311 { 1312 struct trapframe *tf; 1313 1314 tf = td->td_frame; 1315 regs->r_special = tf->tf_special; 1316 regs->r_scratch = tf->tf_scratch; 1317 save_callee_saved(®s->r_preserved); 1318 return (0); 1319 } 1320 1321 int 1322 set_regs(struct thread *td, struct reg *regs) 1323 { 1324 struct trapframe *tf; 1325 1326 tf = td->td_frame; 1327 ia64_flush_dirty(td, &tf->tf_special); 1328 tf->tf_special = regs->r_special; 1329 tf->tf_special.bspstore += tf->tf_special.ndirty; 1330 tf->tf_special.ndirty = 0; 1331 tf->tf_scratch = regs->r_scratch; 1332 restore_callee_saved(®s->r_preserved); 1333 return (0); 1334 } 1335 1336 int 1337 fill_dbregs(struct thread *td, struct dbreg *dbregs) 1338 { 1339 1340 return (ENOSYS); 1341 } 1342 1343 int 1344 set_dbregs(struct thread *td, struct dbreg *dbregs) 1345 { 1346 1347 return (ENOSYS); 1348 } 1349 1350 int 1351 fill_fpregs(struct thread *td, struct fpreg *fpregs) 1352 { 1353 struct trapframe *frame = td->td_frame; 1354 struct pcb *pcb = td->td_pcb; 1355 1356 /* Save the high FP registers. */ 1357 ia64_highfp_save(td); 1358 1359 fpregs->fpr_scratch = frame->tf_scratch_fp; 1360 save_callee_saved_fp(&fpregs->fpr_preserved); 1361 fpregs->fpr_high = pcb->pcb_high_fp; 1362 return (0); 1363 } 1364 1365 int 1366 set_fpregs(struct thread *td, struct fpreg *fpregs) 1367 { 1368 struct trapframe *frame = td->td_frame; 1369 struct pcb *pcb = td->td_pcb; 1370 1371 /* Throw away the high FP registers (should be redundant). */ 1372 ia64_highfp_drop(td); 1373 1374 frame->tf_scratch_fp = fpregs->fpr_scratch; 1375 restore_callee_saved_fp(&fpregs->fpr_preserved); 1376 pcb->pcb_high_fp = fpregs->fpr_high; 1377 return (0); 1378 } 1379 1380 /* 1381 * High FP register functions. 1382 * XXX no synchronization yet. 1383 */ 1384 1385 int 1386 ia64_highfp_drop(struct thread *td) 1387 { 1388 struct pcb *pcb; 1389 struct pcpu *cpu; 1390 struct thread *thr; 1391 1392 pcb = td->td_pcb; 1393 cpu = pcb->pcb_fpcpu; 1394 if (cpu == NULL) 1395 return (0); 1396 pcb->pcb_fpcpu = NULL; 1397 thr = cpu->pc_fpcurthread; 1398 cpu->pc_fpcurthread = NULL; 1399 1400 /* Post-mortem sanity checking. */ 1401 KASSERT(thr == td, ("Inconsistent high FP state")); 1402 return (1); 1403 } 1404 1405 int 1406 ia64_highfp_save(struct thread *td) 1407 { 1408 struct pcb *pcb; 1409 struct pcpu *cpu; 1410 struct thread *thr; 1411 1412 /* Don't save if the high FP registers weren't modified. */ 1413 if ((td->td_frame->tf_special.psr & IA64_PSR_MFH) == 0) 1414 return (ia64_highfp_drop(td)); 1415 1416 pcb = td->td_pcb; 1417 cpu = pcb->pcb_fpcpu; 1418 if (cpu == NULL) 1419 return (0); 1420 #ifdef SMP 1421 if (cpu != pcpup) { 1422 ipi_send(cpu->pc_lid, IPI_HIGH_FP); 1423 while (pcb->pcb_fpcpu != cpu) 1424 DELAY(100); 1425 return (1); 1426 } 1427 #endif 1428 save_high_fp(&pcb->pcb_high_fp); 1429 pcb->pcb_fpcpu = NULL; 1430 thr = cpu->pc_fpcurthread; 1431 cpu->pc_fpcurthread = NULL; 1432 1433 /* Post-mortem sanity cxhecking. */ 1434 KASSERT(thr == td, ("Inconsistent high FP state")); 1435 return (1); 1436 } 1437 1438 int 1439 sysbeep(int pitch, int period) 1440 { 1441 return (ENODEV); 1442 }
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