Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)
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FreeBSD/Linux Kernel Cross Reference
sys/ia64/ia64/machdep.c
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1 /*- 2 * Copyright (c) 2003,2004 Marcel Moolenaar 3 * Copyright (c) 2000,2001 Doug Rabson 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25 * SUCH DAMAGE. 26 */ 27 28 #include <sys/cdefs.h> 29 __FBSDID("$FreeBSD: releng/8.3/sys/ia64/ia64/machdep.c 219662 2011-03-15 08:20:59Z pluknet $"); 30 31 #include "opt_compat.h" 32 #include "opt_ddb.h" 33 #include "opt_kstack_pages.h" 34 #include "opt_sched.h" 35 36 #include <sys/param.h> 37 #include <sys/proc.h> 38 #include <sys/systm.h> 39 #include <sys/bio.h> 40 #include <sys/buf.h> 41 #include <sys/bus.h> 42 #include <sys/cons.h> 43 #include <sys/cpu.h> 44 #include <sys/eventhandler.h> 45 #include <sys/exec.h> 46 #include <sys/imgact.h> 47 #include <sys/kdb.h> 48 #include <sys/kernel.h> 49 #include <sys/linker.h> 50 #include <sys/lock.h> 51 #include <sys/malloc.h> 52 #include <sys/mbuf.h> 53 #include <sys/msgbuf.h> 54 #include <sys/pcpu.h> 55 #include <sys/ptrace.h> 56 #include <sys/random.h> 57 #include <sys/reboot.h> 58 #include <sys/sched.h> 59 #include <sys/signalvar.h> 60 #include <sys/syscall.h> 61 #include <sys/sysctl.h> 62 #include <sys/sysproto.h> 63 #include <sys/ucontext.h> 64 #include <sys/uio.h> 65 #include <sys/uuid.h> 66 #include <sys/vmmeter.h> 67 #include <sys/vnode.h> 68 69 #include <ddb/ddb.h> 70 71 #include <net/netisr.h> 72 73 #include <vm/vm.h> 74 #include <vm/vm_extern.h> 75 #include <vm/vm_kern.h> 76 #include <vm/vm_page.h> 77 #include <vm/vm_map.h> 78 #include <vm/vm_object.h> 79 #include <vm/vm_pager.h> 80 81 #include <machine/bootinfo.h> 82 #include <machine/cpu.h> 83 #include <machine/efi.h> 84 #include <machine/elf.h> 85 #include <machine/fpu.h> 86 #include <machine/intr.h> 87 #include <machine/mca.h> 88 #include <machine/md_var.h> 89 #include <machine/mutex.h> 90 #include <machine/pal.h> 91 #include <machine/pcb.h> 92 #include <machine/reg.h> 93 #include <machine/sal.h> 94 #include <machine/sigframe.h> 95 #ifdef SMP 96 #include <machine/smp.h> 97 #endif 98 #include <machine/unwind.h> 99 #include <machine/vmparam.h> 100 101 SYSCTL_NODE(_hw, OID_AUTO, freq, CTLFLAG_RD, 0, ""); 102 SYSCTL_NODE(_machdep, OID_AUTO, cpu, CTLFLAG_RD, 0, ""); 103 104 static u_int bus_freq; 105 SYSCTL_UINT(_hw_freq, OID_AUTO, bus, CTLFLAG_RD, &bus_freq, 0, 106 "Bus clock frequency"); 107 108 static u_int cpu_freq; 109 SYSCTL_UINT(_hw_freq, OID_AUTO, cpu, CTLFLAG_RD, &cpu_freq, 0, 110 "CPU clock frequency"); 111 112 static u_int itc_freq; 113 SYSCTL_UINT(_hw_freq, OID_AUTO, itc, CTLFLAG_RD, &itc_freq, 0, 114 "ITC frequency"); 115 116 int cold = 1; 117 118 u_int64_t pa_bootinfo; 119 struct bootinfo bootinfo; 120 121 struct pcpu pcpu0; 122 123 extern u_int64_t kernel_text[], _end[]; 124 125 extern u_int64_t ia64_gateway_page[]; 126 extern u_int64_t break_sigtramp[]; 127 extern u_int64_t epc_sigtramp[]; 128 129 struct fpswa_iface *fpswa_iface; 130 131 u_int64_t ia64_pal_base; 132 u_int64_t ia64_port_base; 133 134 u_int64_t ia64_lapic_addr = PAL_PIB_DEFAULT_ADDR; 135 136 struct ia64_pib *ia64_pib; 137 138 static int ia64_sync_icache_needed; 139 140 char machine[] = MACHINE; 141 SYSCTL_STRING(_hw, HW_MACHINE, machine, CTLFLAG_RD, machine, 0, ""); 142 143 static char cpu_model[64]; 144 SYSCTL_STRING(_hw, HW_MODEL, model, CTLFLAG_RD, cpu_model, 0, 145 "The CPU model name"); 146 147 static char cpu_family[64]; 148 SYSCTL_STRING(_hw, OID_AUTO, family, CTLFLAG_RD, cpu_family, 0, 149 "The CPU family name"); 150 151 #ifdef DDB 152 extern vm_offset_t ksym_start, ksym_end; 153 #endif 154 155 156 struct msgbuf *msgbufp = NULL; 157 158 /* Other subsystems (e.g., ACPI) can hook this later. */ 159 void (*cpu_idle_hook)(void) = NULL; 160 161 long Maxmem = 0; 162 long realmem = 0; 163 164 #define PHYSMAP_SIZE (2 * VM_PHYSSEG_MAX) 165 166 vm_paddr_t phys_avail[PHYSMAP_SIZE + 2]; 167 168 /* must be 2 less so 0 0 can signal end of chunks */ 169 #define PHYS_AVAIL_ARRAY_END ((sizeof(phys_avail) / sizeof(vm_offset_t)) - 2) 170 171 struct kva_md_info kmi; 172 173 #define Mhz 1000000L 174 #define Ghz (1000L*Mhz) 175 176 static void 177 identifycpu(void) 178 { 179 char vendor[17]; 180 char *family_name, *model_name; 181 u_int64_t features, tmp; 182 int number, revision, model, family, archrev; 183 184 /* 185 * Assumes little-endian. 186 */ 187 *(u_int64_t *) &vendor[0] = ia64_get_cpuid(0); 188 *(u_int64_t *) &vendor[8] = ia64_get_cpuid(1); 189 vendor[16] = '\0'; 190 191 tmp = ia64_get_cpuid(3); 192 number = (tmp >> 0) & 0xff; 193 revision = (tmp >> 8) & 0xff; 194 model = (tmp >> 16) & 0xff; 195 family = (tmp >> 24) & 0xff; 196 archrev = (tmp >> 32) & 0xff; 197 198 family_name = model_name = "unknown"; 199 switch (family) { 200 case 0x07: 201 family_name = "Itanium"; 202 model_name = "Merced"; 203 break; 204 case 0x1f: 205 family_name = "Itanium 2"; 206 switch (model) { 207 case 0x00: 208 model_name = "McKinley"; 209 break; 210 case 0x01: 211 /* 212 * Deerfield is a low-voltage variant based on the 213 * Madison core. We need circumstantial evidence 214 * (i.e. the clock frequency) to identify those. 215 * Allow for roughly 1% error margin. 216 */ 217 if (cpu_freq > 990 && cpu_freq < 1010) 218 model_name = "Deerfield"; 219 else 220 model_name = "Madison"; 221 break; 222 case 0x02: 223 model_name = "Madison II"; 224 break; 225 } 226 break; 227 case 0x20: 228 ia64_sync_icache_needed = 1; 229 230 family_name = "Itanium 2"; 231 switch (model) { 232 case 0x00: 233 model_name = "Montecito"; 234 break; 235 } 236 break; 237 } 238 snprintf(cpu_family, sizeof(cpu_family), "%s", family_name); 239 snprintf(cpu_model, sizeof(cpu_model), "%s", model_name); 240 241 features = ia64_get_cpuid(4); 242 243 printf("CPU: %s (", model_name); 244 if (cpu_freq) 245 printf("%u Mhz ", cpu_freq); 246 printf("%s)\n", family_name); 247 printf(" Origin = \"%s\" Revision = %d\n", vendor, revision); 248 printf(" Features = 0x%b\n", (u_int32_t) features, 249 "\020" 250 "\001LB" /* long branch (brl) instruction. */ 251 "\002SD" /* Spontaneous deferral. */ 252 "\003AO" /* 16-byte atomic operations (ld, st, cmpxchg). */ ); 253 } 254 255 static void 256 cpu_startup(void *dummy) 257 { 258 char nodename[16]; 259 struct pcpu *pc; 260 struct pcpu_stats *pcs; 261 262 /* 263 * Good {morning,afternoon,evening,night}. 264 */ 265 identifycpu(); 266 267 #ifdef PERFMON 268 perfmon_init(); 269 #endif 270 printf("real memory = %ld (%ld MB)\n", ia64_ptob(Maxmem), 271 ia64_ptob(Maxmem) / 1048576); 272 realmem = Maxmem; 273 274 /* 275 * Display any holes after the first chunk of extended memory. 276 */ 277 if (bootverbose) { 278 int indx; 279 280 printf("Physical memory chunk(s):\n"); 281 for (indx = 0; phys_avail[indx + 1] != 0; indx += 2) { 282 long size1 = phys_avail[indx + 1] - phys_avail[indx]; 283 284 printf("0x%08lx - 0x%08lx, %ld bytes (%ld pages)\n", 285 phys_avail[indx], phys_avail[indx + 1] - 1, size1, 286 size1 >> PAGE_SHIFT); 287 } 288 } 289 290 vm_ksubmap_init(&kmi); 291 292 printf("avail memory = %ld (%ld MB)\n", ptoa(cnt.v_free_count), 293 ptoa(cnt.v_free_count) / 1048576); 294 295 if (fpswa_iface == NULL) 296 printf("Warning: no FPSWA package supplied\n"); 297 else 298 printf("FPSWA Revision = 0x%lx, Entry = %p\n", 299 (long)fpswa_iface->if_rev, (void *)fpswa_iface->if_fpswa); 300 301 /* 302 * Set up buffers, so they can be used to read disk labels. 303 */ 304 bufinit(); 305 vm_pager_bufferinit(); 306 307 /* 308 * Traverse the MADT to discover IOSAPIC and Local SAPIC 309 * information. 310 */ 311 ia64_probe_sapics(); 312 ia64_pib = pmap_mapdev(ia64_lapic_addr, sizeof(*ia64_pib)); 313 314 ia64_mca_init(); 315 316 /* 317 * Create sysctl tree for per-CPU information. 318 */ 319 SLIST_FOREACH(pc, &cpuhead, pc_allcpu) { 320 snprintf(nodename, sizeof(nodename), "%u", pc->pc_cpuid); 321 sysctl_ctx_init(&pc->pc_md.sysctl_ctx); 322 pc->pc_md.sysctl_tree = SYSCTL_ADD_NODE(&pc->pc_md.sysctl_ctx, 323 SYSCTL_STATIC_CHILDREN(_machdep_cpu), OID_AUTO, nodename, 324 CTLFLAG_RD, NULL, ""); 325 if (pc->pc_md.sysctl_tree == NULL) 326 continue; 327 328 pcs = &pc->pc_md.stats; 329 330 SYSCTL_ADD_ULONG(&pc->pc_md.sysctl_ctx, 331 SYSCTL_CHILDREN(pc->pc_md.sysctl_tree), OID_AUTO, 332 "nasts", CTLFLAG_RD, &pcs->pcs_nasts, 333 "Number of IPI_AST interrupts"); 334 335 SYSCTL_ADD_ULONG(&pc->pc_md.sysctl_ctx, 336 SYSCTL_CHILDREN(pc->pc_md.sysctl_tree), OID_AUTO, 337 "nclks", CTLFLAG_RD, &pcs->pcs_nclks, 338 "Number of clock interrupts"); 339 340 SYSCTL_ADD_ULONG(&pc->pc_md.sysctl_ctx, 341 SYSCTL_CHILDREN(pc->pc_md.sysctl_tree), OID_AUTO, 342 "nextints", CTLFLAG_RD, &pcs->pcs_nextints, 343 "Number of ExtINT interrupts"); 344 345 SYSCTL_ADD_ULONG(&pc->pc_md.sysctl_ctx, 346 SYSCTL_CHILDREN(pc->pc_md.sysctl_tree), OID_AUTO, 347 "nhighfps", CTLFLAG_RD, &pcs->pcs_nhighfps, 348 "Number of IPI_HIGH_FP interrupts"); 349 350 SYSCTL_ADD_ULONG(&pc->pc_md.sysctl_ctx, 351 SYSCTL_CHILDREN(pc->pc_md.sysctl_tree), OID_AUTO, 352 "nhwints", CTLFLAG_RD, &pcs->pcs_nhwints, 353 "Number of hardware (device) interrupts"); 354 355 SYSCTL_ADD_ULONG(&pc->pc_md.sysctl_ctx, 356 SYSCTL_CHILDREN(pc->pc_md.sysctl_tree), OID_AUTO, 357 "npreempts", CTLFLAG_RD, &pcs->pcs_npreempts, 358 "Number of IPI_PREEMPT interrupts"); 359 360 SYSCTL_ADD_ULONG(&pc->pc_md.sysctl_ctx, 361 SYSCTL_CHILDREN(pc->pc_md.sysctl_tree), OID_AUTO, 362 "nrdvs", CTLFLAG_RD, &pcs->pcs_nrdvs, 363 "Number of IPI_RENDEZVOUS interrupts"); 364 365 SYSCTL_ADD_ULONG(&pc->pc_md.sysctl_ctx, 366 SYSCTL_CHILDREN(pc->pc_md.sysctl_tree), OID_AUTO, 367 "nstops", CTLFLAG_RD, &pcs->pcs_nstops, 368 "Number of IPI_STOP interrupts"); 369 370 SYSCTL_ADD_ULONG(&pc->pc_md.sysctl_ctx, 371 SYSCTL_CHILDREN(pc->pc_md.sysctl_tree), OID_AUTO, 372 "nstrays", CTLFLAG_RD, &pcs->pcs_nstrays, 373 "Number of stray interrupts"); 374 } 375 } 376 SYSINIT(cpu_startup, SI_SUB_CPU, SI_ORDER_FIRST, cpu_startup, NULL); 377 378 void 379 cpu_flush_dcache(void *ptr, size_t len) 380 { 381 vm_offset_t lim, va; 382 383 va = (uintptr_t)ptr & ~31; 384 lim = (uintptr_t)ptr + len; 385 while (va < lim) { 386 ia64_fc(va); 387 va += 32; 388 } 389 390 ia64_srlz_d(); 391 } 392 393 /* Get current clock frequency for the given cpu id. */ 394 int 395 cpu_est_clockrate(int cpu_id, uint64_t *rate) 396 { 397 398 if (pcpu_find(cpu_id) == NULL || rate == NULL) 399 return (EINVAL); 400 *rate = (u_long)cpu_freq * 1000000ul; 401 return (0); 402 } 403 404 void 405 cpu_halt() 406 { 407 408 efi_reset_system(); 409 } 410 411 void 412 cpu_idle(int busy) 413 { 414 struct ia64_pal_result res; 415 416 if (cpu_idle_hook != NULL) 417 (*cpu_idle_hook)(); 418 else 419 res = ia64_call_pal_static(PAL_HALT_LIGHT, 0, 0, 0); 420 } 421 422 int 423 cpu_idle_wakeup(int cpu) 424 { 425 426 return (0); 427 } 428 429 void 430 cpu_reset() 431 { 432 433 efi_reset_system(); 434 } 435 436 void 437 cpu_switch(struct thread *old, struct thread *new, struct mtx *mtx) 438 { 439 struct pcb *oldpcb, *newpcb; 440 441 oldpcb = old->td_pcb; 442 #ifdef COMPAT_FREEBSD32 443 ia32_savectx(oldpcb); 444 #endif 445 if (PCPU_GET(fpcurthread) == old) 446 old->td_frame->tf_special.psr |= IA64_PSR_DFH; 447 if (!savectx(oldpcb)) { 448 atomic_store_rel_ptr(&old->td_lock, mtx); 449 450 newpcb = new->td_pcb; 451 oldpcb->pcb_current_pmap = 452 pmap_switch(newpcb->pcb_current_pmap); 453 454 #if defined(SCHED_ULE) && defined(SMP) 455 while (atomic_load_acq_ptr(&new->td_lock) == &blocked_lock) 456 cpu_spinwait(); 457 #endif 458 459 PCPU_SET(curthread, new); 460 461 #ifdef COMPAT_FREEBSD32 462 ia32_restorectx(newpcb); 463 #endif 464 465 if (PCPU_GET(fpcurthread) == new) 466 new->td_frame->tf_special.psr &= ~IA64_PSR_DFH; 467 restorectx(newpcb); 468 /* We should not get here. */ 469 panic("cpu_switch: restorectx() returned"); 470 /* NOTREACHED */ 471 } 472 } 473 474 void 475 cpu_throw(struct thread *old __unused, struct thread *new) 476 { 477 struct pcb *newpcb; 478 479 newpcb = new->td_pcb; 480 (void)pmap_switch(newpcb->pcb_current_pmap); 481 482 #if defined(SCHED_ULE) && defined(SMP) 483 while (atomic_load_acq_ptr(&new->td_lock) == &blocked_lock) 484 cpu_spinwait(); 485 #endif 486 487 PCPU_SET(curthread, new); 488 489 #ifdef COMPAT_FREEBSD32 490 ia32_restorectx(newpcb); 491 #endif 492 493 restorectx(newpcb); 494 /* We should not get here. */ 495 panic("cpu_throw: restorectx() returned"); 496 /* NOTREACHED */ 497 } 498 499 void 500 cpu_pcpu_init(struct pcpu *pcpu, int cpuid, size_t size) 501 { 502 503 /* 504 * Set pc_acpi_id to "uninitialized". 505 * See sys/dev/acpica/acpi_cpu.c 506 */ 507 pcpu->pc_acpi_id = 0xffffffff; 508 } 509 510 void 511 spinlock_enter(void) 512 { 513 struct thread *td; 514 int intr; 515 516 td = curthread; 517 if (td->td_md.md_spinlock_count == 0) { 518 intr = intr_disable(); 519 td->td_md.md_spinlock_count = 1; 520 td->td_md.md_saved_intr = intr; 521 } else 522 td->td_md.md_spinlock_count++; 523 critical_enter(); 524 } 525 526 void 527 spinlock_exit(void) 528 { 529 struct thread *td; 530 int intr; 531 532 td = curthread; 533 critical_exit(); 534 intr = td->td_md.md_saved_intr; 535 td->td_md.md_spinlock_count--; 536 if (td->td_md.md_spinlock_count == 0) 537 intr_restore(intr); 538 } 539 540 void 541 map_vhpt(uintptr_t vhpt) 542 { 543 pt_entry_t pte; 544 uint64_t psr; 545 546 pte = PTE_PRESENT | PTE_MA_WB | PTE_ACCESSED | PTE_DIRTY | 547 PTE_PL_KERN | PTE_AR_RW; 548 pte |= vhpt & PTE_PPN_MASK; 549 550 __asm __volatile("ptr.d %0,%1" :: "r"(vhpt), 551 "r"(IA64_ID_PAGE_SHIFT<<2)); 552 553 __asm __volatile("mov %0=psr" : "=r"(psr)); 554 __asm __volatile("rsm psr.ic|psr.i"); 555 ia64_srlz_i(); 556 ia64_set_ifa(vhpt); 557 ia64_set_itir(IA64_ID_PAGE_SHIFT << 2); 558 ia64_srlz_d(); 559 __asm __volatile("itr.d dtr[%0]=%1" :: "r"(2), "r"(pte)); 560 __asm __volatile("mov psr.l=%0" :: "r" (psr)); 561 ia64_srlz_i(); 562 } 563 564 void 565 map_pal_code(void) 566 { 567 pt_entry_t pte; 568 uint64_t psr; 569 570 if (ia64_pal_base == 0) 571 return; 572 573 pte = PTE_PRESENT | PTE_MA_WB | PTE_ACCESSED | PTE_DIRTY | 574 PTE_PL_KERN | PTE_AR_RWX; 575 pte |= ia64_pal_base & PTE_PPN_MASK; 576 577 __asm __volatile("ptr.d %0,%1; ptr.i %0,%1" :: 578 "r"(IA64_PHYS_TO_RR7(ia64_pal_base)), "r"(IA64_ID_PAGE_SHIFT<<2)); 579 580 __asm __volatile("mov %0=psr" : "=r"(psr)); 581 __asm __volatile("rsm psr.ic|psr.i"); 582 ia64_srlz_i(); 583 ia64_set_ifa(IA64_PHYS_TO_RR7(ia64_pal_base)); 584 ia64_set_itir(IA64_ID_PAGE_SHIFT << 2); 585 ia64_srlz_d(); 586 __asm __volatile("itr.d dtr[%0]=%1" :: "r"(1), "r"(pte)); 587 ia64_srlz_d(); 588 __asm __volatile("itr.i itr[%0]=%1" :: "r"(1), "r"(pte)); 589 __asm __volatile("mov psr.l=%0" :: "r" (psr)); 590 ia64_srlz_i(); 591 } 592 593 void 594 map_gateway_page(void) 595 { 596 pt_entry_t pte; 597 uint64_t psr; 598 599 pte = PTE_PRESENT | PTE_MA_WB | PTE_ACCESSED | PTE_DIRTY | 600 PTE_PL_KERN | PTE_AR_X_RX; 601 pte |= (uint64_t)ia64_gateway_page & PTE_PPN_MASK; 602 603 __asm __volatile("ptr.d %0,%1; ptr.i %0,%1" :: 604 "r"(VM_MAX_ADDRESS), "r"(PAGE_SHIFT << 2)); 605 606 __asm __volatile("mov %0=psr" : "=r"(psr)); 607 __asm __volatile("rsm psr.ic|psr.i"); 608 ia64_srlz_i(); 609 ia64_set_ifa(VM_MAX_ADDRESS); 610 ia64_set_itir(PAGE_SHIFT << 2); 611 ia64_srlz_d(); 612 __asm __volatile("itr.d dtr[%0]=%1" :: "r"(3), "r"(pte)); 613 ia64_srlz_d(); 614 __asm __volatile("itr.i itr[%0]=%1" :: "r"(3), "r"(pte)); 615 __asm __volatile("mov psr.l=%0" :: "r" (psr)); 616 ia64_srlz_i(); 617 618 /* Expose the mapping to userland in ar.k5 */ 619 ia64_set_k5(VM_MAX_ADDRESS); 620 } 621 622 static u_int 623 freq_ratio(u_long base, u_long ratio) 624 { 625 u_long f; 626 627 f = (base * (ratio >> 32)) / (ratio & 0xfffffffful); 628 return ((f + 500000) / 1000000); 629 } 630 631 static void 632 calculate_frequencies(void) 633 { 634 struct ia64_sal_result sal; 635 struct ia64_pal_result pal; 636 637 sal = ia64_sal_entry(SAL_FREQ_BASE, 0, 0, 0, 0, 0, 0, 0); 638 pal = ia64_call_pal_static(PAL_FREQ_RATIOS, 0, 0, 0); 639 640 if (sal.sal_status == 0 && pal.pal_status == 0) { 641 if (bootverbose) { 642 printf("Platform clock frequency %ld Hz\n", 643 sal.sal_result[0]); 644 printf("Processor ratio %ld/%ld, Bus ratio %ld/%ld, " 645 "ITC ratio %ld/%ld\n", 646 pal.pal_result[0] >> 32, 647 pal.pal_result[0] & ((1L << 32) - 1), 648 pal.pal_result[1] >> 32, 649 pal.pal_result[1] & ((1L << 32) - 1), 650 pal.pal_result[2] >> 32, 651 pal.pal_result[2] & ((1L << 32) - 1)); 652 } 653 cpu_freq = freq_ratio(sal.sal_result[0], pal.pal_result[0]); 654 bus_freq = freq_ratio(sal.sal_result[0], pal.pal_result[1]); 655 itc_freq = freq_ratio(sal.sal_result[0], pal.pal_result[2]); 656 } 657 } 658 659 struct ia64_init_return 660 ia64_init(void) 661 { 662 struct ia64_init_return ret; 663 int phys_avail_cnt; 664 vm_offset_t kernstart, kernend; 665 vm_offset_t kernstartpfn, kernendpfn, pfn0, pfn1; 666 char *p; 667 struct efi_md *md; 668 int metadata_missing; 669 670 /* NO OUTPUT ALLOWED UNTIL FURTHER NOTICE */ 671 672 /* 673 * TODO: Disable interrupts, floating point etc. 674 * Maybe flush cache and tlb 675 */ 676 ia64_set_fpsr(IA64_FPSR_DEFAULT); 677 678 /* 679 * TODO: Get critical system information (if possible, from the 680 * information provided by the boot program). 681 */ 682 683 /* 684 * pa_bootinfo is the physical address of the bootinfo block as 685 * passed to us by the loader and set in locore.s. 686 */ 687 bootinfo = *(struct bootinfo *)(IA64_PHYS_TO_RR7(pa_bootinfo)); 688 689 if (bootinfo.bi_magic != BOOTINFO_MAGIC || bootinfo.bi_version != 1) { 690 bzero(&bootinfo, sizeof(bootinfo)); 691 bootinfo.bi_kernend = (vm_offset_t) round_page(_end); 692 } 693 694 /* 695 * Look for the I/O ports first - we need them for console 696 * probing. 697 */ 698 for (md = efi_md_first(); md != NULL; md = efi_md_next(md)) { 699 switch (md->md_type) { 700 case EFI_MD_TYPE_IOPORT: 701 ia64_port_base = (uintptr_t)pmap_mapdev(md->md_phys, 702 md->md_pages * EFI_PAGE_SIZE); 703 break; 704 case EFI_MD_TYPE_PALCODE: 705 ia64_pal_base = md->md_phys; 706 break; 707 } 708 } 709 710 metadata_missing = 0; 711 if (bootinfo.bi_modulep) 712 preload_metadata = (caddr_t)bootinfo.bi_modulep; 713 else 714 metadata_missing = 1; 715 716 if (envmode == 0 && bootinfo.bi_envp) 717 kern_envp = (caddr_t)bootinfo.bi_envp; 718 else 719 kern_envp = static_env; 720 721 /* 722 * Look at arguments passed to us and compute boothowto. 723 */ 724 boothowto = bootinfo.bi_boothowto; 725 726 if (boothowto & RB_VERBOSE) 727 bootverbose = 1; 728 729 /* 730 * Find the beginning and end of the kernel. 731 */ 732 kernstart = trunc_page(kernel_text); 733 #ifdef DDB 734 ksym_start = bootinfo.bi_symtab; 735 ksym_end = bootinfo.bi_esymtab; 736 kernend = (vm_offset_t)round_page(ksym_end); 737 #else 738 kernend = (vm_offset_t)round_page(_end); 739 #endif 740 /* But if the bootstrap tells us otherwise, believe it! */ 741 if (bootinfo.bi_kernend) 742 kernend = round_page(bootinfo.bi_kernend); 743 744 /* 745 * Setup the PCPU data for the bootstrap processor. It is needed 746 * by printf(). Also, since printf() has critical sections, we 747 * need to initialize at least pc_curthread. 748 */ 749 pcpup = &pcpu0; 750 ia64_set_k4((u_int64_t)pcpup); 751 pcpu_init(pcpup, 0, sizeof(pcpu0)); 752 dpcpu_init((void *)kernend, 0); 753 kernend += DPCPU_SIZE; 754 PCPU_SET(curthread, &thread0); 755 756 /* 757 * Initialize the console before we print anything out. 758 */ 759 cninit(); 760 761 /* OUTPUT NOW ALLOWED */ 762 763 if (ia64_pal_base != 0) { 764 ia64_pal_base &= ~IA64_ID_PAGE_MASK; 765 /* 766 * We use a TR to map the first 256M of memory - this might 767 * cover the palcode too. 768 */ 769 if (ia64_pal_base == 0) 770 printf("PAL code mapped by the kernel's TR\n"); 771 } else 772 printf("PAL code not found\n"); 773 774 /* 775 * Wire things up so we can call the firmware. 776 */ 777 map_pal_code(); 778 efi_boot_minimal(bootinfo.bi_systab); 779 ia64_xiv_init(); 780 ia64_sal_init(); 781 calculate_frequencies(); 782 783 if (metadata_missing) 784 printf("WARNING: loader(8) metadata is missing!\n"); 785 786 /* Get FPSWA interface */ 787 fpswa_iface = (bootinfo.bi_fpswa == 0) ? NULL : 788 (struct fpswa_iface *)IA64_PHYS_TO_RR7(bootinfo.bi_fpswa); 789 790 /* Init basic tunables, including hz */ 791 init_param1(); 792 793 p = getenv("kernelname"); 794 if (p != NULL) { 795 strncpy(kernelname, p, sizeof(kernelname) - 1); 796 freeenv(p); 797 } 798 799 kernstartpfn = atop(IA64_RR_MASK(kernstart)); 800 kernendpfn = atop(IA64_RR_MASK(kernend)); 801 802 /* 803 * Size the memory regions and load phys_avail[] with the results. 804 */ 805 806 /* 807 * Find out how much memory is available, by looking at 808 * the memory descriptors. 809 */ 810 811 #ifdef DEBUG_MD 812 printf("Memory descriptor count: %d\n", mdcount); 813 #endif 814 815 phys_avail_cnt = 0; 816 for (md = efi_md_first(); md != NULL; md = efi_md_next(md)) { 817 #ifdef DEBUG_MD 818 printf("MD %p: type %d pa 0x%lx cnt 0x%lx\n", md, 819 md->md_type, md->md_phys, md->md_pages); 820 #endif 821 822 pfn0 = ia64_btop(round_page(md->md_phys)); 823 pfn1 = ia64_btop(trunc_page(md->md_phys + md->md_pages * 4096)); 824 if (pfn1 <= pfn0) 825 continue; 826 827 if (md->md_type != EFI_MD_TYPE_FREE) 828 continue; 829 830 /* 831 * We have a memory descriptor that describes conventional 832 * memory that is for general use. We must determine if the 833 * loader has put the kernel in this region. 834 */ 835 physmem += (pfn1 - pfn0); 836 if (pfn0 <= kernendpfn && kernstartpfn <= pfn1) { 837 /* 838 * Must compute the location of the kernel 839 * within the segment. 840 */ 841 #ifdef DEBUG_MD 842 printf("Descriptor %p contains kernel\n", mp); 843 #endif 844 if (pfn0 < kernstartpfn) { 845 /* 846 * There is a chunk before the kernel. 847 */ 848 #ifdef DEBUG_MD 849 printf("Loading chunk before kernel: " 850 "0x%lx / 0x%lx\n", pfn0, kernstartpfn); 851 #endif 852 phys_avail[phys_avail_cnt] = ia64_ptob(pfn0); 853 phys_avail[phys_avail_cnt+1] = ia64_ptob(kernstartpfn); 854 phys_avail_cnt += 2; 855 } 856 if (kernendpfn < pfn1) { 857 /* 858 * There is a chunk after the kernel. 859 */ 860 #ifdef DEBUG_MD 861 printf("Loading chunk after kernel: " 862 "0x%lx / 0x%lx\n", kernendpfn, pfn1); 863 #endif 864 phys_avail[phys_avail_cnt] = ia64_ptob(kernendpfn); 865 phys_avail[phys_avail_cnt+1] = ia64_ptob(pfn1); 866 phys_avail_cnt += 2; 867 } 868 } else { 869 /* 870 * Just load this cluster as one chunk. 871 */ 872 #ifdef DEBUG_MD 873 printf("Loading descriptor %d: 0x%lx / 0x%lx\n", i, 874 pfn0, pfn1); 875 #endif 876 phys_avail[phys_avail_cnt] = ia64_ptob(pfn0); 877 phys_avail[phys_avail_cnt+1] = ia64_ptob(pfn1); 878 phys_avail_cnt += 2; 879 880 } 881 } 882 phys_avail[phys_avail_cnt] = 0; 883 884 Maxmem = physmem; 885 init_param2(physmem); 886 887 /* 888 * Initialize error message buffer (at end of core). 889 */ 890 msgbufp = (struct msgbuf *)pmap_steal_memory(msgbufsize); 891 msgbufinit(msgbufp, msgbufsize); 892 893 proc_linkup0(&proc0, &thread0); 894 /* 895 * Init mapping for kernel stack for proc 0 896 */ 897 thread0.td_kstack = pmap_steal_memory(KSTACK_PAGES * PAGE_SIZE); 898 thread0.td_kstack_pages = KSTACK_PAGES; 899 900 mutex_init(); 901 902 /* 903 * Initialize the rest of proc 0's PCB. 904 * 905 * Set the kernel sp, reserving space for an (empty) trapframe, 906 * and make proc0's trapframe pointer point to it for sanity. 907 * Initialise proc0's backing store to start after u area. 908 */ 909 cpu_thread_alloc(&thread0); 910 thread0.td_frame->tf_flags = FRAME_SYSCALL; 911 thread0.td_pcb->pcb_special.sp = 912 (u_int64_t)thread0.td_frame - 16; 913 thread0.td_pcb->pcb_special.bspstore = thread0.td_kstack; 914 915 /* 916 * Initialize the virtual memory system. 917 */ 918 pmap_bootstrap(); 919 920 /* 921 * Initialize debuggers, and break into them if appropriate. 922 */ 923 kdb_init(); 924 925 #ifdef KDB 926 if (boothowto & RB_KDB) 927 kdb_enter(KDB_WHY_BOOTFLAGS, 928 "Boot flags requested debugger\n"); 929 #endif 930 931 ia64_set_tpr(0); 932 ia64_srlz_d(); 933 934 ret.bspstore = thread0.td_pcb->pcb_special.bspstore; 935 ret.sp = thread0.td_pcb->pcb_special.sp; 936 return (ret); 937 } 938 939 uint64_t 940 ia64_get_hcdp(void) 941 { 942 943 return (bootinfo.bi_hcdp); 944 } 945 946 void 947 bzero(void *buf, size_t len) 948 { 949 caddr_t p = buf; 950 951 while (((vm_offset_t) p & (sizeof(u_long) - 1)) && len) { 952 *p++ = 0; 953 len--; 954 } 955 while (len >= sizeof(u_long) * 8) { 956 *(u_long*) p = 0; 957 *((u_long*) p + 1) = 0; 958 *((u_long*) p + 2) = 0; 959 *((u_long*) p + 3) = 0; 960 len -= sizeof(u_long) * 8; 961 *((u_long*) p + 4) = 0; 962 *((u_long*) p + 5) = 0; 963 *((u_long*) p + 6) = 0; 964 *((u_long*) p + 7) = 0; 965 p += sizeof(u_long) * 8; 966 } 967 while (len >= sizeof(u_long)) { 968 *(u_long*) p = 0; 969 len -= sizeof(u_long); 970 p += sizeof(u_long); 971 } 972 while (len) { 973 *p++ = 0; 974 len--; 975 } 976 } 977 978 u_int 979 ia64_itc_freq(void) 980 { 981 982 return (itc_freq); 983 } 984 985 void 986 DELAY(int n) 987 { 988 u_int64_t start, end, now; 989 990 sched_pin(); 991 992 start = ia64_get_itc(); 993 end = start + itc_freq * n; 994 /* printf("DELAY from 0x%lx to 0x%lx\n", start, end); */ 995 do { 996 now = ia64_get_itc(); 997 } while (now < end || (now > start && end < start)); 998 999 sched_unpin(); 1000 } 1001 1002 /* 1003 * Send an interrupt (signal) to a process. 1004 */ 1005 void 1006 sendsig(sig_t catcher, ksiginfo_t *ksi, sigset_t *mask) 1007 { 1008 struct proc *p; 1009 struct thread *td; 1010 struct trapframe *tf; 1011 struct sigacts *psp; 1012 struct sigframe sf, *sfp; 1013 u_int64_t sbs, sp; 1014 int oonstack; 1015 int sig; 1016 u_long code; 1017 1018 td = curthread; 1019 p = td->td_proc; 1020 PROC_LOCK_ASSERT(p, MA_OWNED); 1021 sig = ksi->ksi_signo; 1022 code = ksi->ksi_code; 1023 psp = p->p_sigacts; 1024 mtx_assert(&psp->ps_mtx, MA_OWNED); 1025 tf = td->td_frame; 1026 sp = tf->tf_special.sp; 1027 oonstack = sigonstack(sp); 1028 sbs = 0; 1029 1030 /* save user context */ 1031 bzero(&sf, sizeof(struct sigframe)); 1032 sf.sf_uc.uc_sigmask = *mask; 1033 sf.sf_uc.uc_stack = td->td_sigstk; 1034 sf.sf_uc.uc_stack.ss_flags = (td->td_pflags & TDP_ALTSTACK) 1035 ? ((oonstack) ? SS_ONSTACK : 0) : SS_DISABLE; 1036 1037 /* 1038 * Allocate and validate space for the signal handler 1039 * context. Note that if the stack is in P0 space, the 1040 * call to grow() is a nop, and the useracc() check 1041 * will fail if the process has not already allocated 1042 * the space with a `brk'. 1043 */ 1044 if ((td->td_pflags & TDP_ALTSTACK) != 0 && !oonstack && 1045 SIGISMEMBER(psp->ps_sigonstack, sig)) { 1046 sbs = (u_int64_t)td->td_sigstk.ss_sp; 1047 sbs = (sbs + 15) & ~15; 1048 sfp = (struct sigframe *)(sbs + td->td_sigstk.ss_size); 1049 #if defined(COMPAT_43) 1050 td->td_sigstk.ss_flags |= SS_ONSTACK; 1051 #endif 1052 } else 1053 sfp = (struct sigframe *)sp; 1054 sfp = (struct sigframe *)((u_int64_t)(sfp - 1) & ~15); 1055 1056 /* Fill in the siginfo structure for POSIX handlers. */ 1057 if (SIGISMEMBER(psp->ps_siginfo, sig)) { 1058 sf.sf_si = ksi->ksi_info; 1059 sf.sf_si.si_signo = sig; 1060 /* 1061 * XXX this shouldn't be here after code in trap.c 1062 * is fixed 1063 */ 1064 sf.sf_si.si_addr = (void*)tf->tf_special.ifa; 1065 code = (u_int64_t)&sfp->sf_si; 1066 } 1067 1068 mtx_unlock(&psp->ps_mtx); 1069 PROC_UNLOCK(p); 1070 1071 get_mcontext(td, &sf.sf_uc.uc_mcontext, 0); 1072 1073 /* Copy the frame out to userland. */ 1074 if (copyout(&sf, sfp, sizeof(sf)) != 0) { 1075 /* 1076 * Process has trashed its stack; give it an illegal 1077 * instruction to halt it in its tracks. 1078 */ 1079 PROC_LOCK(p); 1080 sigexit(td, SIGILL); 1081 return; 1082 } 1083 1084 if ((tf->tf_flags & FRAME_SYSCALL) == 0) { 1085 tf->tf_special.psr &= ~IA64_PSR_RI; 1086 tf->tf_special.iip = ia64_get_k5() + 1087 ((uint64_t)break_sigtramp - (uint64_t)ia64_gateway_page); 1088 } else 1089 tf->tf_special.iip = ia64_get_k5() + 1090 ((uint64_t)epc_sigtramp - (uint64_t)ia64_gateway_page); 1091 1092 /* 1093 * Setup the trapframe to return to the signal trampoline. We pass 1094 * information to the trampoline in the following registers: 1095 * 1096 * gp new backing store or NULL 1097 * r8 signal number 1098 * r9 signal code or siginfo pointer 1099 * r10 signal handler (function descriptor) 1100 */ 1101 tf->tf_special.sp = (u_int64_t)sfp - 16; 1102 tf->tf_special.gp = sbs; 1103 tf->tf_special.bspstore = sf.sf_uc.uc_mcontext.mc_special.bspstore; 1104 tf->tf_special.ndirty = 0; 1105 tf->tf_special.rnat = sf.sf_uc.uc_mcontext.mc_special.rnat; 1106 tf->tf_scratch.gr8 = sig; 1107 tf->tf_scratch.gr9 = code; 1108 tf->tf_scratch.gr10 = (u_int64_t)catcher; 1109 1110 PROC_LOCK(p); 1111 mtx_lock(&psp->ps_mtx); 1112 } 1113 1114 /* 1115 * System call to cleanup state after a signal 1116 * has been taken. Reset signal mask and 1117 * stack state from context left by sendsig (above). 1118 * Return to previous pc and psl as specified by 1119 * context left by sendsig. Check carefully to 1120 * make sure that the user has not modified the 1121 * state to gain improper privileges. 1122 * 1123 * MPSAFE 1124 */ 1125 int 1126 sigreturn(struct thread *td, 1127 struct sigreturn_args /* { 1128 ucontext_t *sigcntxp; 1129 } */ *uap) 1130 { 1131 ucontext_t uc; 1132 struct trapframe *tf; 1133 struct pcb *pcb; 1134 1135 tf = td->td_frame; 1136 pcb = td->td_pcb; 1137 1138 /* 1139 * Fetch the entire context structure at once for speed. 1140 * We don't use a normal argument to simplify RSE handling. 1141 */ 1142 if (copyin(uap->sigcntxp, (caddr_t)&uc, sizeof(uc))) 1143 return (EFAULT); 1144 1145 set_mcontext(td, &uc.uc_mcontext); 1146 1147 #if defined(COMPAT_43) 1148 if (sigonstack(tf->tf_special.sp)) 1149 td->td_sigstk.ss_flags |= SS_ONSTACK; 1150 else 1151 td->td_sigstk.ss_flags &= ~SS_ONSTACK; 1152 #endif 1153 kern_sigprocmask(td, SIG_SETMASK, &uc.uc_sigmask, NULL, 0); 1154 1155 return (EJUSTRETURN); 1156 } 1157 1158 #ifdef COMPAT_FREEBSD4 1159 int 1160 freebsd4_sigreturn(struct thread *td, struct freebsd4_sigreturn_args *uap) 1161 { 1162 1163 return sigreturn(td, (struct sigreturn_args *)uap); 1164 } 1165 #endif 1166 1167 /* 1168 * Construct a PCB from a trapframe. This is called from kdb_trap() where 1169 * we want to start a backtrace from the function that caused us to enter 1170 * the debugger. We have the context in the trapframe, but base the trace 1171 * on the PCB. The PCB doesn't have to be perfect, as long as it contains 1172 * enough for a backtrace. 1173 */ 1174 void 1175 makectx(struct trapframe *tf, struct pcb *pcb) 1176 { 1177 1178 pcb->pcb_special = tf->tf_special; 1179 pcb->pcb_special.__spare = ~0UL; /* XXX see unwind.c */ 1180 save_callee_saved(&pcb->pcb_preserved); 1181 save_callee_saved_fp(&pcb->pcb_preserved_fp); 1182 } 1183 1184 int 1185 ia64_flush_dirty(struct thread *td, struct _special *r) 1186 { 1187 struct iovec iov; 1188 struct uio uio; 1189 uint64_t bspst, kstk, rnat; 1190 int error, locked; 1191 1192 if (r->ndirty == 0) 1193 return (0); 1194 1195 kstk = td->td_kstack + (r->bspstore & 0x1ffUL); 1196 if (td == curthread) { 1197 __asm __volatile("mov ar.rsc=0;;"); 1198 __asm __volatile("mov %0=ar.bspstore" : "=r"(bspst)); 1199 /* Make sure we have all the user registers written out. */ 1200 if (bspst - kstk < r->ndirty) { 1201 __asm __volatile("flushrs;;"); 1202 __asm __volatile("mov %0=ar.bspstore" : "=r"(bspst)); 1203 } 1204 __asm __volatile("mov %0=ar.rnat;;" : "=r"(rnat)); 1205 __asm __volatile("mov ar.rsc=3"); 1206 error = copyout((void*)kstk, (void*)r->bspstore, r->ndirty); 1207 kstk += r->ndirty; 1208 r->rnat = (bspst > kstk && (bspst & 0x1ffL) < (kstk & 0x1ffL)) 1209 ? *(uint64_t*)(kstk | 0x1f8L) : rnat; 1210 } else { 1211 locked = PROC_LOCKED(td->td_proc); 1212 if (!locked) 1213 PHOLD(td->td_proc); 1214 iov.iov_base = (void*)(uintptr_t)kstk; 1215 iov.iov_len = r->ndirty; 1216 uio.uio_iov = &iov; 1217 uio.uio_iovcnt = 1; 1218 uio.uio_offset = r->bspstore; 1219 uio.uio_resid = r->ndirty; 1220 uio.uio_segflg = UIO_SYSSPACE; 1221 uio.uio_rw = UIO_WRITE; 1222 uio.uio_td = td; 1223 error = proc_rwmem(td->td_proc, &uio); 1224 /* 1225 * XXX proc_rwmem() doesn't currently return ENOSPC, 1226 * so I think it can bogusly return 0. Neither do 1227 * we allow short writes. 1228 */ 1229 if (uio.uio_resid != 0 && error == 0) 1230 error = ENOSPC; 1231 if (!locked) 1232 PRELE(td->td_proc); 1233 } 1234 1235 r->bspstore += r->ndirty; 1236 r->ndirty = 0; 1237 return (error); 1238 } 1239 1240 int 1241 get_mcontext(struct thread *td, mcontext_t *mc, int flags) 1242 { 1243 struct trapframe *tf; 1244 int error; 1245 1246 tf = td->td_frame; 1247 bzero(mc, sizeof(*mc)); 1248 mc->mc_special = tf->tf_special; 1249 error = ia64_flush_dirty(td, &mc->mc_special); 1250 if (tf->tf_flags & FRAME_SYSCALL) { 1251 mc->mc_flags |= _MC_FLAGS_SYSCALL_CONTEXT; 1252 mc->mc_scratch = tf->tf_scratch; 1253 if (flags & GET_MC_CLEAR_RET) { 1254 mc->mc_scratch.gr8 = 0; 1255 mc->mc_scratch.gr9 = 0; 1256 mc->mc_scratch.gr10 = 0; 1257 mc->mc_scratch.gr11 = 0; 1258 } 1259 } else { 1260 mc->mc_flags |= _MC_FLAGS_ASYNC_CONTEXT; 1261 mc->mc_scratch = tf->tf_scratch; 1262 mc->mc_scratch_fp = tf->tf_scratch_fp; 1263 /* 1264 * XXX If the thread never used the high FP registers, we 1265 * probably shouldn't waste time saving them. 1266 */ 1267 ia64_highfp_save(td); 1268 mc->mc_flags |= _MC_FLAGS_HIGHFP_VALID; 1269 mc->mc_high_fp = td->td_pcb->pcb_high_fp; 1270 } 1271 save_callee_saved(&mc->mc_preserved); 1272 save_callee_saved_fp(&mc->mc_preserved_fp); 1273 return (error); 1274 } 1275 1276 int 1277 set_mcontext(struct thread *td, const mcontext_t *mc) 1278 { 1279 struct _special s; 1280 struct trapframe *tf; 1281 uint64_t psrmask; 1282 1283 tf = td->td_frame; 1284 1285 KASSERT((tf->tf_special.ndirty & ~PAGE_MASK) == 0, 1286 ("Whoa there! We have more than 8KB of dirty registers!")); 1287 1288 s = mc->mc_special; 1289 /* 1290 * Only copy the user mask and the restart instruction bit from 1291 * the new context. 1292 */ 1293 psrmask = IA64_PSR_BE | IA64_PSR_UP | IA64_PSR_AC | IA64_PSR_MFL | 1294 IA64_PSR_MFH | IA64_PSR_RI; 1295 s.psr = (tf->tf_special.psr & ~psrmask) | (s.psr & psrmask); 1296 /* We don't have any dirty registers of the new context. */ 1297 s.ndirty = 0; 1298 if (mc->mc_flags & _MC_FLAGS_ASYNC_CONTEXT) { 1299 /* 1300 * We can get an async context passed to us while we 1301 * entered the kernel through a syscall: sigreturn(2) 1302 * takes contexts that could previously be the result of 1303 * a trap or interrupt. 1304 * Hence, we cannot assert that the trapframe is not 1305 * a syscall frame, but we can assert that it's at 1306 * least an expected syscall. 1307 */ 1308 if (tf->tf_flags & FRAME_SYSCALL) { 1309 KASSERT(tf->tf_scratch.gr15 == SYS_sigreturn, ("foo")); 1310 tf->tf_flags &= ~FRAME_SYSCALL; 1311 } 1312 tf->tf_scratch = mc->mc_scratch; 1313 tf->tf_scratch_fp = mc->mc_scratch_fp; 1314 if (mc->mc_flags & _MC_FLAGS_HIGHFP_VALID) 1315 td->td_pcb->pcb_high_fp = mc->mc_high_fp; 1316 } else { 1317 KASSERT((tf->tf_flags & FRAME_SYSCALL) != 0, ("foo")); 1318 if ((mc->mc_flags & _MC_FLAGS_SYSCALL_CONTEXT) == 0) { 1319 s.cfm = tf->tf_special.cfm; 1320 s.iip = tf->tf_special.iip; 1321 tf->tf_scratch.gr15 = 0; /* Clear syscall nr. */ 1322 } else 1323 tf->tf_scratch = mc->mc_scratch; 1324 } 1325 tf->tf_special = s; 1326 restore_callee_saved(&mc->mc_preserved); 1327 restore_callee_saved_fp(&mc->mc_preserved_fp); 1328 1329 return (0); 1330 } 1331 1332 /* 1333 * Clear registers on exec. 1334 */ 1335 void 1336 exec_setregs(struct thread *td, u_long entry, u_long stack, u_long ps_strings) 1337 { 1338 struct trapframe *tf; 1339 uint64_t *ksttop, *kst; 1340 1341 tf = td->td_frame; 1342 ksttop = (uint64_t*)(td->td_kstack + tf->tf_special.ndirty + 1343 (tf->tf_special.bspstore & 0x1ffUL)); 1344 1345 /* 1346 * We can ignore up to 8KB of dirty registers by masking off the 1347 * lower 13 bits in exception_restore() or epc_syscall(). This 1348 * should be enough for a couple of years, but if there are more 1349 * than 8KB of dirty registers, we lose track of the bottom of 1350 * the kernel stack. The solution is to copy the active part of 1351 * the kernel stack down 1 page (or 2, but not more than that) 1352 * so that we always have less than 8KB of dirty registers. 1353 */ 1354 KASSERT((tf->tf_special.ndirty & ~PAGE_MASK) == 0, 1355 ("Whoa there! We have more than 8KB of dirty registers!")); 1356 1357 bzero(&tf->tf_special, sizeof(tf->tf_special)); 1358 if ((tf->tf_flags & FRAME_SYSCALL) == 0) { /* break syscalls. */ 1359 bzero(&tf->tf_scratch, sizeof(tf->tf_scratch)); 1360 bzero(&tf->tf_scratch_fp, sizeof(tf->tf_scratch_fp)); 1361 tf->tf_special.cfm = (1UL<<63) | (3UL<<7) | 3UL; 1362 tf->tf_special.bspstore = IA64_BACKINGSTORE; 1363 /* 1364 * Copy the arguments onto the kernel register stack so that 1365 * they get loaded by the loadrs instruction. Skip over the 1366 * NaT collection points. 1367 */ 1368 kst = ksttop - 1; 1369 if (((uintptr_t)kst & 0x1ff) == 0x1f8) 1370 *kst-- = 0; 1371 *kst-- = 0; 1372 if (((uintptr_t)kst & 0x1ff) == 0x1f8) 1373 *kst-- = 0; 1374 *kst-- = ps_strings; 1375 if (((uintptr_t)kst & 0x1ff) == 0x1f8) 1376 *kst-- = 0; 1377 *kst = stack; 1378 tf->tf_special.ndirty = (ksttop - kst) << 3; 1379 } else { /* epc syscalls (default). */ 1380 tf->tf_special.cfm = (3UL<<62) | (3UL<<7) | 3UL; 1381 tf->tf_special.bspstore = IA64_BACKINGSTORE + 24; 1382 /* 1383 * Write values for out0, out1 and out2 to the user's backing 1384 * store and arrange for them to be restored into the user's 1385 * initial register frame. 1386 * Assumes that (bspstore & 0x1f8) < 0x1e0. 1387 */ 1388 suword((caddr_t)tf->tf_special.bspstore - 24, stack); 1389 suword((caddr_t)tf->tf_special.bspstore - 16, ps_strings); 1390 suword((caddr_t)tf->tf_special.bspstore - 8, 0); 1391 } 1392 1393 tf->tf_special.iip = entry; 1394 tf->tf_special.sp = (stack & ~15) - 16; 1395 tf->tf_special.rsc = 0xf; 1396 tf->tf_special.fpsr = IA64_FPSR_DEFAULT; 1397 tf->tf_special.psr = IA64_PSR_IC | IA64_PSR_I | IA64_PSR_IT | 1398 IA64_PSR_DT | IA64_PSR_RT | IA64_PSR_DFH | IA64_PSR_BN | 1399 IA64_PSR_CPL_USER; 1400 } 1401 1402 int 1403 ptrace_set_pc(struct thread *td, unsigned long addr) 1404 { 1405 uint64_t slot; 1406 1407 switch (addr & 0xFUL) { 1408 case 0: 1409 slot = IA64_PSR_RI_0; 1410 break; 1411 case 1: 1412 /* XXX we need to deal with MLX bundles here */ 1413 slot = IA64_PSR_RI_1; 1414 break; 1415 case 2: 1416 slot = IA64_PSR_RI_2; 1417 break; 1418 default: 1419 return (EINVAL); 1420 } 1421 1422 td->td_frame->tf_special.iip = addr & ~0x0FULL; 1423 td->td_frame->tf_special.psr = 1424 (td->td_frame->tf_special.psr & ~IA64_PSR_RI) | slot; 1425 return (0); 1426 } 1427 1428 int 1429 ptrace_single_step(struct thread *td) 1430 { 1431 struct trapframe *tf; 1432 1433 /* 1434 * There's no way to set single stepping when we're leaving the 1435 * kernel through the EPC syscall path. The way we solve this is 1436 * by enabling the lower-privilege trap so that we re-enter the 1437 * kernel as soon as the privilege level changes. See trap.c for 1438 * how we proceed from there. 1439 */ 1440 tf = td->td_frame; 1441 if (tf->tf_flags & FRAME_SYSCALL) 1442 tf->tf_special.psr |= IA64_PSR_LP; 1443 else 1444 tf->tf_special.psr |= IA64_PSR_SS; 1445 return (0); 1446 } 1447 1448 int 1449 ptrace_clear_single_step(struct thread *td) 1450 { 1451 struct trapframe *tf; 1452 1453 /* 1454 * Clear any and all status bits we may use to implement single 1455 * stepping. 1456 */ 1457 tf = td->td_frame; 1458 tf->tf_special.psr &= ~IA64_PSR_SS; 1459 tf->tf_special.psr &= ~IA64_PSR_LP; 1460 tf->tf_special.psr &= ~IA64_PSR_TB; 1461 return (0); 1462 } 1463 1464 int 1465 fill_regs(struct thread *td, struct reg *regs) 1466 { 1467 struct trapframe *tf; 1468 1469 tf = td->td_frame; 1470 regs->r_special = tf->tf_special; 1471 regs->r_scratch = tf->tf_scratch; 1472 save_callee_saved(®s->r_preserved); 1473 return (0); 1474 } 1475 1476 int 1477 set_regs(struct thread *td, struct reg *regs) 1478 { 1479 struct trapframe *tf; 1480 int error; 1481 1482 tf = td->td_frame; 1483 error = ia64_flush_dirty(td, &tf->tf_special); 1484 if (!error) { 1485 tf->tf_special = regs->r_special; 1486 tf->tf_special.bspstore += tf->tf_special.ndirty; 1487 tf->tf_special.ndirty = 0; 1488 tf->tf_scratch = regs->r_scratch; 1489 restore_callee_saved(®s->r_preserved); 1490 } 1491 return (error); 1492 } 1493 1494 int 1495 fill_dbregs(struct thread *td, struct dbreg *dbregs) 1496 { 1497 1498 return (ENOSYS); 1499 } 1500 1501 int 1502 set_dbregs(struct thread *td, struct dbreg *dbregs) 1503 { 1504 1505 return (ENOSYS); 1506 } 1507 1508 int 1509 fill_fpregs(struct thread *td, struct fpreg *fpregs) 1510 { 1511 struct trapframe *frame = td->td_frame; 1512 struct pcb *pcb = td->td_pcb; 1513 1514 /* Save the high FP registers. */ 1515 ia64_highfp_save(td); 1516 1517 fpregs->fpr_scratch = frame->tf_scratch_fp; 1518 save_callee_saved_fp(&fpregs->fpr_preserved); 1519 fpregs->fpr_high = pcb->pcb_high_fp; 1520 return (0); 1521 } 1522 1523 int 1524 set_fpregs(struct thread *td, struct fpreg *fpregs) 1525 { 1526 struct trapframe *frame = td->td_frame; 1527 struct pcb *pcb = td->td_pcb; 1528 1529 /* Throw away the high FP registers (should be redundant). */ 1530 ia64_highfp_drop(td); 1531 1532 frame->tf_scratch_fp = fpregs->fpr_scratch; 1533 restore_callee_saved_fp(&fpregs->fpr_preserved); 1534 pcb->pcb_high_fp = fpregs->fpr_high; 1535 return (0); 1536 } 1537 1538 void 1539 ia64_sync_icache(vm_offset_t va, vm_offset_t sz) 1540 { 1541 vm_offset_t lim; 1542 1543 if (!ia64_sync_icache_needed) 1544 return; 1545 1546 lim = va + sz; 1547 while (va < lim) { 1548 ia64_fc_i(va); 1549 va += 32; /* XXX */ 1550 } 1551 1552 ia64_sync_i(); 1553 ia64_srlz_i(); 1554 }
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