Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)
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sys/ia64/ia64/machdep.c
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1 /*- 2 * Copyright (c) 2003,2004 Marcel Moolenaar 3 * Copyright (c) 2000,2001 Doug Rabson 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25 * SUCH DAMAGE. 26 */ 27 28 #include <sys/cdefs.h> 29 __FBSDID("$FreeBSD: releng/8.4/sys/ia64/ia64/machdep.c 235442 2012-05-14 15:05:18Z jhb $"); 30 31 #include "opt_compat.h" 32 #include "opt_ddb.h" 33 #include "opt_kstack_pages.h" 34 #include "opt_sched.h" 35 36 #include <sys/param.h> 37 #include <sys/proc.h> 38 #include <sys/systm.h> 39 #include <sys/bio.h> 40 #include <sys/buf.h> 41 #include <sys/bus.h> 42 #include <sys/cons.h> 43 #include <sys/cpu.h> 44 #include <sys/eventhandler.h> 45 #include <sys/exec.h> 46 #include <sys/imgact.h> 47 #include <sys/kdb.h> 48 #include <sys/kernel.h> 49 #include <sys/linker.h> 50 #include <sys/lock.h> 51 #include <sys/malloc.h> 52 #include <sys/mbuf.h> 53 #include <sys/msgbuf.h> 54 #include <sys/pcpu.h> 55 #include <sys/ptrace.h> 56 #include <sys/random.h> 57 #include <sys/reboot.h> 58 #include <sys/sched.h> 59 #include <sys/signalvar.h> 60 #include <sys/syscall.h> 61 #include <sys/syscallsubr.h> 62 #include <sys/sysctl.h> 63 #include <sys/sysproto.h> 64 #include <sys/ucontext.h> 65 #include <sys/uio.h> 66 #include <sys/uuid.h> 67 #include <sys/vmmeter.h> 68 #include <sys/vnode.h> 69 70 #include <ddb/ddb.h> 71 72 #include <net/netisr.h> 73 74 #include <vm/vm.h> 75 #include <vm/vm_extern.h> 76 #include <vm/vm_kern.h> 77 #include <vm/vm_page.h> 78 #include <vm/vm_map.h> 79 #include <vm/vm_object.h> 80 #include <vm/vm_pager.h> 81 82 #include <machine/bootinfo.h> 83 #include <machine/cpu.h> 84 #include <machine/efi.h> 85 #include <machine/elf.h> 86 #include <machine/fpu.h> 87 #include <machine/intr.h> 88 #include <machine/mca.h> 89 #include <machine/md_var.h> 90 #include <machine/mutex.h> 91 #include <machine/pal.h> 92 #include <machine/pcb.h> 93 #include <machine/reg.h> 94 #include <machine/sal.h> 95 #include <machine/sigframe.h> 96 #ifdef SMP 97 #include <machine/smp.h> 98 #endif 99 #include <machine/unwind.h> 100 #include <machine/vmparam.h> 101 102 SYSCTL_NODE(_hw, OID_AUTO, freq, CTLFLAG_RD, 0, ""); 103 SYSCTL_NODE(_machdep, OID_AUTO, cpu, CTLFLAG_RD, 0, ""); 104 105 static u_int bus_freq; 106 SYSCTL_UINT(_hw_freq, OID_AUTO, bus, CTLFLAG_RD, &bus_freq, 0, 107 "Bus clock frequency"); 108 109 static u_int cpu_freq; 110 SYSCTL_UINT(_hw_freq, OID_AUTO, cpu, CTLFLAG_RD, &cpu_freq, 0, 111 "CPU clock frequency"); 112 113 static u_int itc_freq; 114 SYSCTL_UINT(_hw_freq, OID_AUTO, itc, CTLFLAG_RD, &itc_freq, 0, 115 "ITC frequency"); 116 117 int cold = 1; 118 119 u_int64_t pa_bootinfo; 120 struct bootinfo bootinfo; 121 122 struct pcpu pcpu0; 123 124 extern u_int64_t kernel_text[], _end[]; 125 126 extern u_int64_t ia64_gateway_page[]; 127 extern u_int64_t break_sigtramp[]; 128 extern u_int64_t epc_sigtramp[]; 129 130 struct fpswa_iface *fpswa_iface; 131 132 u_int64_t ia64_pal_base; 133 u_int64_t ia64_port_base; 134 135 u_int64_t ia64_lapic_addr = PAL_PIB_DEFAULT_ADDR; 136 137 struct ia64_pib *ia64_pib; 138 139 static int ia64_sync_icache_needed; 140 141 char machine[] = MACHINE; 142 SYSCTL_STRING(_hw, HW_MACHINE, machine, CTLFLAG_RD, machine, 0, ""); 143 144 static char cpu_model[64]; 145 SYSCTL_STRING(_hw, HW_MODEL, model, CTLFLAG_RD, cpu_model, 0, 146 "The CPU model name"); 147 148 static char cpu_family[64]; 149 SYSCTL_STRING(_hw, OID_AUTO, family, CTLFLAG_RD, cpu_family, 0, 150 "The CPU family name"); 151 152 #ifdef DDB 153 extern vm_offset_t ksym_start, ksym_end; 154 #endif 155 156 157 struct msgbuf *msgbufp = NULL; 158 159 /* Other subsystems (e.g., ACPI) can hook this later. */ 160 void (*cpu_idle_hook)(void) = NULL; 161 162 long Maxmem = 0; 163 long realmem = 0; 164 165 #define PHYSMAP_SIZE (2 * VM_PHYSSEG_MAX) 166 167 vm_paddr_t phys_avail[PHYSMAP_SIZE + 2]; 168 169 /* must be 2 less so 0 0 can signal end of chunks */ 170 #define PHYS_AVAIL_ARRAY_END ((sizeof(phys_avail) / sizeof(vm_offset_t)) - 2) 171 172 struct kva_md_info kmi; 173 174 #define Mhz 1000000L 175 #define Ghz (1000L*Mhz) 176 177 static void 178 identifycpu(void) 179 { 180 char vendor[17]; 181 char *family_name, *model_name; 182 u_int64_t features, tmp; 183 int number, revision, model, family, archrev; 184 185 /* 186 * Assumes little-endian. 187 */ 188 *(u_int64_t *) &vendor[0] = ia64_get_cpuid(0); 189 *(u_int64_t *) &vendor[8] = ia64_get_cpuid(1); 190 vendor[16] = '\0'; 191 192 tmp = ia64_get_cpuid(3); 193 number = (tmp >> 0) & 0xff; 194 revision = (tmp >> 8) & 0xff; 195 model = (tmp >> 16) & 0xff; 196 family = (tmp >> 24) & 0xff; 197 archrev = (tmp >> 32) & 0xff; 198 199 family_name = model_name = "unknown"; 200 switch (family) { 201 case 0x07: 202 family_name = "Itanium"; 203 model_name = "Merced"; 204 break; 205 case 0x1f: 206 family_name = "Itanium 2"; 207 switch (model) { 208 case 0x00: 209 model_name = "McKinley"; 210 break; 211 case 0x01: 212 /* 213 * Deerfield is a low-voltage variant based on the 214 * Madison core. We need circumstantial evidence 215 * (i.e. the clock frequency) to identify those. 216 * Allow for roughly 1% error margin. 217 */ 218 if (cpu_freq > 990 && cpu_freq < 1010) 219 model_name = "Deerfield"; 220 else 221 model_name = "Madison"; 222 break; 223 case 0x02: 224 model_name = "Madison II"; 225 break; 226 } 227 break; 228 case 0x20: 229 ia64_sync_icache_needed = 1; 230 231 family_name = "Itanium 2"; 232 switch (model) { 233 case 0x00: 234 model_name = "Montecito"; 235 break; 236 } 237 break; 238 } 239 snprintf(cpu_family, sizeof(cpu_family), "%s", family_name); 240 snprintf(cpu_model, sizeof(cpu_model), "%s", model_name); 241 242 features = ia64_get_cpuid(4); 243 244 printf("CPU: %s (", model_name); 245 if (cpu_freq) 246 printf("%u MHz ", cpu_freq); 247 printf("%s)\n", family_name); 248 printf(" Origin = \"%s\" Revision = %d\n", vendor, revision); 249 printf(" Features = 0x%b\n", (u_int32_t) features, 250 "\020" 251 "\001LB" /* long branch (brl) instruction. */ 252 "\002SD" /* Spontaneous deferral. */ 253 "\003AO" /* 16-byte atomic operations (ld, st, cmpxchg). */ ); 254 } 255 256 static void 257 cpu_startup(void *dummy) 258 { 259 char nodename[16]; 260 struct pcpu *pc; 261 struct pcpu_stats *pcs; 262 263 /* 264 * Good {morning,afternoon,evening,night}. 265 */ 266 identifycpu(); 267 268 #ifdef PERFMON 269 perfmon_init(); 270 #endif 271 printf("real memory = %ld (%ld MB)\n", ia64_ptob(Maxmem), 272 ia64_ptob(Maxmem) / 1048576); 273 realmem = Maxmem; 274 275 /* 276 * Display any holes after the first chunk of extended memory. 277 */ 278 if (bootverbose) { 279 int indx; 280 281 printf("Physical memory chunk(s):\n"); 282 for (indx = 0; phys_avail[indx + 1] != 0; indx += 2) { 283 long size1 = phys_avail[indx + 1] - phys_avail[indx]; 284 285 printf("0x%08lx - 0x%08lx, %ld bytes (%ld pages)\n", 286 phys_avail[indx], phys_avail[indx + 1] - 1, size1, 287 size1 >> PAGE_SHIFT); 288 } 289 } 290 291 vm_ksubmap_init(&kmi); 292 293 printf("avail memory = %ld (%ld MB)\n", ptoa(cnt.v_free_count), 294 ptoa(cnt.v_free_count) / 1048576); 295 296 if (fpswa_iface == NULL) 297 printf("Warning: no FPSWA package supplied\n"); 298 else 299 printf("FPSWA Revision = 0x%lx, Entry = %p\n", 300 (long)fpswa_iface->if_rev, (void *)fpswa_iface->if_fpswa); 301 302 /* 303 * Set up buffers, so they can be used to read disk labels. 304 */ 305 bufinit(); 306 vm_pager_bufferinit(); 307 308 /* 309 * Traverse the MADT to discover IOSAPIC and Local SAPIC 310 * information. 311 */ 312 ia64_probe_sapics(); 313 ia64_pib = pmap_mapdev(ia64_lapic_addr, sizeof(*ia64_pib)); 314 315 ia64_mca_init(); 316 317 /* 318 * Create sysctl tree for per-CPU information. 319 */ 320 SLIST_FOREACH(pc, &cpuhead, pc_allcpu) { 321 snprintf(nodename, sizeof(nodename), "%u", pc->pc_cpuid); 322 sysctl_ctx_init(&pc->pc_md.sysctl_ctx); 323 pc->pc_md.sysctl_tree = SYSCTL_ADD_NODE(&pc->pc_md.sysctl_ctx, 324 SYSCTL_STATIC_CHILDREN(_machdep_cpu), OID_AUTO, nodename, 325 CTLFLAG_RD, NULL, ""); 326 if (pc->pc_md.sysctl_tree == NULL) 327 continue; 328 329 pcs = &pc->pc_md.stats; 330 331 SYSCTL_ADD_ULONG(&pc->pc_md.sysctl_ctx, 332 SYSCTL_CHILDREN(pc->pc_md.sysctl_tree), OID_AUTO, 333 "nasts", CTLFLAG_RD, &pcs->pcs_nasts, 334 "Number of IPI_AST interrupts"); 335 336 SYSCTL_ADD_ULONG(&pc->pc_md.sysctl_ctx, 337 SYSCTL_CHILDREN(pc->pc_md.sysctl_tree), OID_AUTO, 338 "nclks", CTLFLAG_RD, &pcs->pcs_nclks, 339 "Number of clock interrupts"); 340 341 SYSCTL_ADD_ULONG(&pc->pc_md.sysctl_ctx, 342 SYSCTL_CHILDREN(pc->pc_md.sysctl_tree), OID_AUTO, 343 "nextints", CTLFLAG_RD, &pcs->pcs_nextints, 344 "Number of ExtINT interrupts"); 345 346 SYSCTL_ADD_ULONG(&pc->pc_md.sysctl_ctx, 347 SYSCTL_CHILDREN(pc->pc_md.sysctl_tree), OID_AUTO, 348 "nhighfps", CTLFLAG_RD, &pcs->pcs_nhighfps, 349 "Number of IPI_HIGH_FP interrupts"); 350 351 SYSCTL_ADD_ULONG(&pc->pc_md.sysctl_ctx, 352 SYSCTL_CHILDREN(pc->pc_md.sysctl_tree), OID_AUTO, 353 "nhwints", CTLFLAG_RD, &pcs->pcs_nhwints, 354 "Number of hardware (device) interrupts"); 355 356 SYSCTL_ADD_ULONG(&pc->pc_md.sysctl_ctx, 357 SYSCTL_CHILDREN(pc->pc_md.sysctl_tree), OID_AUTO, 358 "npreempts", CTLFLAG_RD, &pcs->pcs_npreempts, 359 "Number of IPI_PREEMPT interrupts"); 360 361 SYSCTL_ADD_ULONG(&pc->pc_md.sysctl_ctx, 362 SYSCTL_CHILDREN(pc->pc_md.sysctl_tree), OID_AUTO, 363 "nrdvs", CTLFLAG_RD, &pcs->pcs_nrdvs, 364 "Number of IPI_RENDEZVOUS interrupts"); 365 366 SYSCTL_ADD_ULONG(&pc->pc_md.sysctl_ctx, 367 SYSCTL_CHILDREN(pc->pc_md.sysctl_tree), OID_AUTO, 368 "nstops", CTLFLAG_RD, &pcs->pcs_nstops, 369 "Number of IPI_STOP interrupts"); 370 371 SYSCTL_ADD_ULONG(&pc->pc_md.sysctl_ctx, 372 SYSCTL_CHILDREN(pc->pc_md.sysctl_tree), OID_AUTO, 373 "nstrays", CTLFLAG_RD, &pcs->pcs_nstrays, 374 "Number of stray interrupts"); 375 } 376 } 377 SYSINIT(cpu_startup, SI_SUB_CPU, SI_ORDER_FIRST, cpu_startup, NULL); 378 379 void 380 cpu_flush_dcache(void *ptr, size_t len) 381 { 382 vm_offset_t lim, va; 383 384 va = (uintptr_t)ptr & ~31; 385 lim = (uintptr_t)ptr + len; 386 while (va < lim) { 387 ia64_fc(va); 388 va += 32; 389 } 390 391 ia64_srlz_d(); 392 } 393 394 /* Get current clock frequency for the given cpu id. */ 395 int 396 cpu_est_clockrate(int cpu_id, uint64_t *rate) 397 { 398 399 if (pcpu_find(cpu_id) == NULL || rate == NULL) 400 return (EINVAL); 401 *rate = (u_long)cpu_freq * 1000000ul; 402 return (0); 403 } 404 405 void 406 cpu_halt() 407 { 408 409 efi_reset_system(); 410 } 411 412 void 413 cpu_idle(int busy) 414 { 415 struct ia64_pal_result res; 416 417 if (cpu_idle_hook != NULL) 418 (*cpu_idle_hook)(); 419 else 420 res = ia64_call_pal_static(PAL_HALT_LIGHT, 0, 0, 0); 421 } 422 423 int 424 cpu_idle_wakeup(int cpu) 425 { 426 427 return (0); 428 } 429 430 void 431 cpu_reset() 432 { 433 434 efi_reset_system(); 435 } 436 437 void 438 cpu_switch(struct thread *old, struct thread *new, struct mtx *mtx) 439 { 440 struct pcb *oldpcb, *newpcb; 441 442 oldpcb = old->td_pcb; 443 #ifdef COMPAT_FREEBSD32 444 ia32_savectx(oldpcb); 445 #endif 446 if (PCPU_GET(fpcurthread) == old) 447 old->td_frame->tf_special.psr |= IA64_PSR_DFH; 448 if (!savectx(oldpcb)) { 449 atomic_store_rel_ptr(&old->td_lock, mtx); 450 451 newpcb = new->td_pcb; 452 oldpcb->pcb_current_pmap = 453 pmap_switch(newpcb->pcb_current_pmap); 454 455 #if defined(SCHED_ULE) && defined(SMP) 456 while (atomic_load_acq_ptr(&new->td_lock) == &blocked_lock) 457 cpu_spinwait(); 458 #endif 459 460 PCPU_SET(curthread, new); 461 462 #ifdef COMPAT_FREEBSD32 463 ia32_restorectx(newpcb); 464 #endif 465 466 if (PCPU_GET(fpcurthread) == new) 467 new->td_frame->tf_special.psr &= ~IA64_PSR_DFH; 468 restorectx(newpcb); 469 /* We should not get here. */ 470 panic("cpu_switch: restorectx() returned"); 471 /* NOTREACHED */ 472 } 473 } 474 475 void 476 cpu_throw(struct thread *old __unused, struct thread *new) 477 { 478 struct pcb *newpcb; 479 480 newpcb = new->td_pcb; 481 (void)pmap_switch(newpcb->pcb_current_pmap); 482 483 #if defined(SCHED_ULE) && defined(SMP) 484 while (atomic_load_acq_ptr(&new->td_lock) == &blocked_lock) 485 cpu_spinwait(); 486 #endif 487 488 PCPU_SET(curthread, new); 489 490 #ifdef COMPAT_FREEBSD32 491 ia32_restorectx(newpcb); 492 #endif 493 494 restorectx(newpcb); 495 /* We should not get here. */ 496 panic("cpu_throw: restorectx() returned"); 497 /* NOTREACHED */ 498 } 499 500 void 501 cpu_pcpu_init(struct pcpu *pcpu, int cpuid, size_t size) 502 { 503 504 /* 505 * Set pc_acpi_id to "uninitialized". 506 * See sys/dev/acpica/acpi_cpu.c 507 */ 508 pcpu->pc_acpi_id = 0xffffffff; 509 } 510 511 void 512 spinlock_enter(void) 513 { 514 struct thread *td; 515 int intr; 516 517 td = curthread; 518 if (td->td_md.md_spinlock_count == 0) { 519 intr = intr_disable(); 520 td->td_md.md_spinlock_count = 1; 521 td->td_md.md_saved_intr = intr; 522 } else 523 td->td_md.md_spinlock_count++; 524 critical_enter(); 525 } 526 527 void 528 spinlock_exit(void) 529 { 530 struct thread *td; 531 int intr; 532 533 td = curthread; 534 critical_exit(); 535 intr = td->td_md.md_saved_intr; 536 td->td_md.md_spinlock_count--; 537 if (td->td_md.md_spinlock_count == 0) 538 intr_restore(intr); 539 } 540 541 void 542 map_vhpt(uintptr_t vhpt) 543 { 544 pt_entry_t pte; 545 uint64_t psr; 546 547 pte = PTE_PRESENT | PTE_MA_WB | PTE_ACCESSED | PTE_DIRTY | 548 PTE_PL_KERN | PTE_AR_RW; 549 pte |= vhpt & PTE_PPN_MASK; 550 551 __asm __volatile("ptr.d %0,%1" :: "r"(vhpt), 552 "r"(IA64_ID_PAGE_SHIFT<<2)); 553 554 __asm __volatile("mov %0=psr" : "=r"(psr)); 555 __asm __volatile("rsm psr.ic|psr.i"); 556 ia64_srlz_i(); 557 ia64_set_ifa(vhpt); 558 ia64_set_itir(IA64_ID_PAGE_SHIFT << 2); 559 ia64_srlz_d(); 560 __asm __volatile("itr.d dtr[%0]=%1" :: "r"(2), "r"(pte)); 561 __asm __volatile("mov psr.l=%0" :: "r" (psr)); 562 ia64_srlz_i(); 563 } 564 565 void 566 map_pal_code(void) 567 { 568 pt_entry_t pte; 569 uint64_t psr; 570 571 if (ia64_pal_base == 0) 572 return; 573 574 pte = PTE_PRESENT | PTE_MA_WB | PTE_ACCESSED | PTE_DIRTY | 575 PTE_PL_KERN | PTE_AR_RWX; 576 pte |= ia64_pal_base & PTE_PPN_MASK; 577 578 __asm __volatile("ptr.d %0,%1; ptr.i %0,%1" :: 579 "r"(IA64_PHYS_TO_RR7(ia64_pal_base)), "r"(IA64_ID_PAGE_SHIFT<<2)); 580 581 __asm __volatile("mov %0=psr" : "=r"(psr)); 582 __asm __volatile("rsm psr.ic|psr.i"); 583 ia64_srlz_i(); 584 ia64_set_ifa(IA64_PHYS_TO_RR7(ia64_pal_base)); 585 ia64_set_itir(IA64_ID_PAGE_SHIFT << 2); 586 ia64_srlz_d(); 587 __asm __volatile("itr.d dtr[%0]=%1" :: "r"(1), "r"(pte)); 588 ia64_srlz_d(); 589 __asm __volatile("itr.i itr[%0]=%1" :: "r"(1), "r"(pte)); 590 __asm __volatile("mov psr.l=%0" :: "r" (psr)); 591 ia64_srlz_i(); 592 } 593 594 void 595 map_gateway_page(void) 596 { 597 pt_entry_t pte; 598 uint64_t psr; 599 600 pte = PTE_PRESENT | PTE_MA_WB | PTE_ACCESSED | PTE_DIRTY | 601 PTE_PL_KERN | PTE_AR_X_RX; 602 pte |= (uint64_t)ia64_gateway_page & PTE_PPN_MASK; 603 604 __asm __volatile("ptr.d %0,%1; ptr.i %0,%1" :: 605 "r"(VM_MAX_ADDRESS), "r"(PAGE_SHIFT << 2)); 606 607 __asm __volatile("mov %0=psr" : "=r"(psr)); 608 __asm __volatile("rsm psr.ic|psr.i"); 609 ia64_srlz_i(); 610 ia64_set_ifa(VM_MAX_ADDRESS); 611 ia64_set_itir(PAGE_SHIFT << 2); 612 ia64_srlz_d(); 613 __asm __volatile("itr.d dtr[%0]=%1" :: "r"(3), "r"(pte)); 614 ia64_srlz_d(); 615 __asm __volatile("itr.i itr[%0]=%1" :: "r"(3), "r"(pte)); 616 __asm __volatile("mov psr.l=%0" :: "r" (psr)); 617 ia64_srlz_i(); 618 619 /* Expose the mapping to userland in ar.k5 */ 620 ia64_set_k5(VM_MAX_ADDRESS); 621 } 622 623 static u_int 624 freq_ratio(u_long base, u_long ratio) 625 { 626 u_long f; 627 628 f = (base * (ratio >> 32)) / (ratio & 0xfffffffful); 629 return ((f + 500000) / 1000000); 630 } 631 632 static void 633 calculate_frequencies(void) 634 { 635 struct ia64_sal_result sal; 636 struct ia64_pal_result pal; 637 638 sal = ia64_sal_entry(SAL_FREQ_BASE, 0, 0, 0, 0, 0, 0, 0); 639 pal = ia64_call_pal_static(PAL_FREQ_RATIOS, 0, 0, 0); 640 641 if (sal.sal_status == 0 && pal.pal_status == 0) { 642 if (bootverbose) { 643 printf("Platform clock frequency %ld Hz\n", 644 sal.sal_result[0]); 645 printf("Processor ratio %ld/%ld, Bus ratio %ld/%ld, " 646 "ITC ratio %ld/%ld\n", 647 pal.pal_result[0] >> 32, 648 pal.pal_result[0] & ((1L << 32) - 1), 649 pal.pal_result[1] >> 32, 650 pal.pal_result[1] & ((1L << 32) - 1), 651 pal.pal_result[2] >> 32, 652 pal.pal_result[2] & ((1L << 32) - 1)); 653 } 654 cpu_freq = freq_ratio(sal.sal_result[0], pal.pal_result[0]); 655 bus_freq = freq_ratio(sal.sal_result[0], pal.pal_result[1]); 656 itc_freq = freq_ratio(sal.sal_result[0], pal.pal_result[2]); 657 } 658 } 659 660 struct ia64_init_return 661 ia64_init(void) 662 { 663 struct ia64_init_return ret; 664 int phys_avail_cnt; 665 vm_offset_t kernstart, kernend; 666 vm_offset_t kernstartpfn, kernendpfn, pfn0, pfn1; 667 char *p; 668 struct efi_md *md; 669 int metadata_missing; 670 671 /* NO OUTPUT ALLOWED UNTIL FURTHER NOTICE */ 672 673 /* 674 * TODO: Disable interrupts, floating point etc. 675 * Maybe flush cache and tlb 676 */ 677 ia64_set_fpsr(IA64_FPSR_DEFAULT); 678 679 /* 680 * TODO: Get critical system information (if possible, from the 681 * information provided by the boot program). 682 */ 683 684 /* 685 * pa_bootinfo is the physical address of the bootinfo block as 686 * passed to us by the loader and set in locore.s. 687 */ 688 bootinfo = *(struct bootinfo *)(IA64_PHYS_TO_RR7(pa_bootinfo)); 689 690 if (bootinfo.bi_magic != BOOTINFO_MAGIC || bootinfo.bi_version != 1) { 691 bzero(&bootinfo, sizeof(bootinfo)); 692 bootinfo.bi_kernend = (vm_offset_t) round_page(_end); 693 } 694 695 /* 696 * Look for the I/O ports first - we need them for console 697 * probing. 698 */ 699 for (md = efi_md_first(); md != NULL; md = efi_md_next(md)) { 700 switch (md->md_type) { 701 case EFI_MD_TYPE_IOPORT: 702 ia64_port_base = (uintptr_t)pmap_mapdev(md->md_phys, 703 md->md_pages * EFI_PAGE_SIZE); 704 break; 705 case EFI_MD_TYPE_PALCODE: 706 ia64_pal_base = md->md_phys; 707 break; 708 } 709 } 710 711 metadata_missing = 0; 712 if (bootinfo.bi_modulep) 713 preload_metadata = (caddr_t)bootinfo.bi_modulep; 714 else 715 metadata_missing = 1; 716 717 if (envmode == 0 && bootinfo.bi_envp) 718 kern_envp = (caddr_t)bootinfo.bi_envp; 719 else 720 kern_envp = static_env; 721 722 /* 723 * Look at arguments passed to us and compute boothowto. 724 */ 725 boothowto = bootinfo.bi_boothowto; 726 727 if (boothowto & RB_VERBOSE) 728 bootverbose = 1; 729 730 /* 731 * Find the beginning and end of the kernel. 732 */ 733 kernstart = trunc_page(kernel_text); 734 #ifdef DDB 735 ksym_start = bootinfo.bi_symtab; 736 ksym_end = bootinfo.bi_esymtab; 737 kernend = (vm_offset_t)round_page(ksym_end); 738 #else 739 kernend = (vm_offset_t)round_page(_end); 740 #endif 741 /* But if the bootstrap tells us otherwise, believe it! */ 742 if (bootinfo.bi_kernend) 743 kernend = round_page(bootinfo.bi_kernend); 744 745 /* 746 * Setup the PCPU data for the bootstrap processor. It is needed 747 * by printf(). Also, since printf() has critical sections, we 748 * need to initialize at least pc_curthread. 749 */ 750 pcpup = &pcpu0; 751 ia64_set_k4((u_int64_t)pcpup); 752 pcpu_init(pcpup, 0, sizeof(pcpu0)); 753 dpcpu_init((void *)kernend, 0); 754 kernend += DPCPU_SIZE; 755 PCPU_SET(curthread, &thread0); 756 757 /* 758 * Initialize the console before we print anything out. 759 */ 760 cninit(); 761 762 /* OUTPUT NOW ALLOWED */ 763 764 if (ia64_pal_base != 0) { 765 ia64_pal_base &= ~IA64_ID_PAGE_MASK; 766 /* 767 * We use a TR to map the first 256M of memory - this might 768 * cover the palcode too. 769 */ 770 if (ia64_pal_base == 0) 771 printf("PAL code mapped by the kernel's TR\n"); 772 } else 773 printf("PAL code not found\n"); 774 775 /* 776 * Wire things up so we can call the firmware. 777 */ 778 map_pal_code(); 779 efi_boot_minimal(bootinfo.bi_systab); 780 ia64_xiv_init(); 781 ia64_sal_init(); 782 calculate_frequencies(); 783 784 if (metadata_missing) 785 printf("WARNING: loader(8) metadata is missing!\n"); 786 787 /* Get FPSWA interface */ 788 fpswa_iface = (bootinfo.bi_fpswa == 0) ? NULL : 789 (struct fpswa_iface *)IA64_PHYS_TO_RR7(bootinfo.bi_fpswa); 790 791 /* Init basic tunables, including hz */ 792 init_param1(); 793 794 p = getenv("kernelname"); 795 if (p != NULL) { 796 strncpy(kernelname, p, sizeof(kernelname) - 1); 797 freeenv(p); 798 } 799 800 kernstartpfn = atop(IA64_RR_MASK(kernstart)); 801 kernendpfn = atop(IA64_RR_MASK(kernend)); 802 803 /* 804 * Size the memory regions and load phys_avail[] with the results. 805 */ 806 807 /* 808 * Find out how much memory is available, by looking at 809 * the memory descriptors. 810 */ 811 812 #ifdef DEBUG_MD 813 printf("Memory descriptor count: %d\n", mdcount); 814 #endif 815 816 phys_avail_cnt = 0; 817 for (md = efi_md_first(); md != NULL; md = efi_md_next(md)) { 818 #ifdef DEBUG_MD 819 printf("MD %p: type %d pa 0x%lx cnt 0x%lx\n", md, 820 md->md_type, md->md_phys, md->md_pages); 821 #endif 822 823 pfn0 = ia64_btop(round_page(md->md_phys)); 824 pfn1 = ia64_btop(trunc_page(md->md_phys + md->md_pages * 4096)); 825 if (pfn1 <= pfn0) 826 continue; 827 828 if (md->md_type != EFI_MD_TYPE_FREE) 829 continue; 830 831 /* 832 * We have a memory descriptor that describes conventional 833 * memory that is for general use. We must determine if the 834 * loader has put the kernel in this region. 835 */ 836 physmem += (pfn1 - pfn0); 837 if (pfn0 <= kernendpfn && kernstartpfn <= pfn1) { 838 /* 839 * Must compute the location of the kernel 840 * within the segment. 841 */ 842 #ifdef DEBUG_MD 843 printf("Descriptor %p contains kernel\n", mp); 844 #endif 845 if (pfn0 < kernstartpfn) { 846 /* 847 * There is a chunk before the kernel. 848 */ 849 #ifdef DEBUG_MD 850 printf("Loading chunk before kernel: " 851 "0x%lx / 0x%lx\n", pfn0, kernstartpfn); 852 #endif 853 phys_avail[phys_avail_cnt] = ia64_ptob(pfn0); 854 phys_avail[phys_avail_cnt+1] = ia64_ptob(kernstartpfn); 855 phys_avail_cnt += 2; 856 } 857 if (kernendpfn < pfn1) { 858 /* 859 * There is a chunk after the kernel. 860 */ 861 #ifdef DEBUG_MD 862 printf("Loading chunk after kernel: " 863 "0x%lx / 0x%lx\n", kernendpfn, pfn1); 864 #endif 865 phys_avail[phys_avail_cnt] = ia64_ptob(kernendpfn); 866 phys_avail[phys_avail_cnt+1] = ia64_ptob(pfn1); 867 phys_avail_cnt += 2; 868 } 869 } else { 870 /* 871 * Just load this cluster as one chunk. 872 */ 873 #ifdef DEBUG_MD 874 printf("Loading descriptor %d: 0x%lx / 0x%lx\n", i, 875 pfn0, pfn1); 876 #endif 877 phys_avail[phys_avail_cnt] = ia64_ptob(pfn0); 878 phys_avail[phys_avail_cnt+1] = ia64_ptob(pfn1); 879 phys_avail_cnt += 2; 880 881 } 882 } 883 phys_avail[phys_avail_cnt] = 0; 884 885 Maxmem = physmem; 886 init_param2(physmem); 887 888 /* 889 * Initialize error message buffer (at end of core). 890 */ 891 msgbufp = (struct msgbuf *)pmap_steal_memory(msgbufsize); 892 msgbufinit(msgbufp, msgbufsize); 893 894 proc_linkup0(&proc0, &thread0); 895 /* 896 * Init mapping for kernel stack for proc 0 897 */ 898 thread0.td_kstack = pmap_steal_memory(KSTACK_PAGES * PAGE_SIZE); 899 thread0.td_kstack_pages = KSTACK_PAGES; 900 901 mutex_init(); 902 903 /* 904 * Initialize the rest of proc 0's PCB. 905 * 906 * Set the kernel sp, reserving space for an (empty) trapframe, 907 * and make proc0's trapframe pointer point to it for sanity. 908 * Initialise proc0's backing store to start after u area. 909 */ 910 cpu_thread_alloc(&thread0); 911 thread0.td_frame->tf_flags = FRAME_SYSCALL; 912 thread0.td_pcb->pcb_special.sp = 913 (u_int64_t)thread0.td_frame - 16; 914 thread0.td_pcb->pcb_special.bspstore = thread0.td_kstack; 915 916 /* 917 * Initialize the virtual memory system. 918 */ 919 pmap_bootstrap(); 920 921 /* 922 * Initialize debuggers, and break into them if appropriate. 923 */ 924 kdb_init(); 925 926 #ifdef KDB 927 if (boothowto & RB_KDB) 928 kdb_enter(KDB_WHY_BOOTFLAGS, 929 "Boot flags requested debugger\n"); 930 #endif 931 932 ia64_set_tpr(0); 933 ia64_srlz_d(); 934 935 ret.bspstore = thread0.td_pcb->pcb_special.bspstore; 936 ret.sp = thread0.td_pcb->pcb_special.sp; 937 return (ret); 938 } 939 940 uint64_t 941 ia64_get_hcdp(void) 942 { 943 944 return (bootinfo.bi_hcdp); 945 } 946 947 void 948 bzero(void *buf, size_t len) 949 { 950 caddr_t p = buf; 951 952 while (((vm_offset_t) p & (sizeof(u_long) - 1)) && len) { 953 *p++ = 0; 954 len--; 955 } 956 while (len >= sizeof(u_long) * 8) { 957 *(u_long*) p = 0; 958 *((u_long*) p + 1) = 0; 959 *((u_long*) p + 2) = 0; 960 *((u_long*) p + 3) = 0; 961 len -= sizeof(u_long) * 8; 962 *((u_long*) p + 4) = 0; 963 *((u_long*) p + 5) = 0; 964 *((u_long*) p + 6) = 0; 965 *((u_long*) p + 7) = 0; 966 p += sizeof(u_long) * 8; 967 } 968 while (len >= sizeof(u_long)) { 969 *(u_long*) p = 0; 970 len -= sizeof(u_long); 971 p += sizeof(u_long); 972 } 973 while (len) { 974 *p++ = 0; 975 len--; 976 } 977 } 978 979 u_int 980 ia64_itc_freq(void) 981 { 982 983 return (itc_freq); 984 } 985 986 void 987 DELAY(int n) 988 { 989 u_int64_t start, end, now; 990 991 sched_pin(); 992 993 start = ia64_get_itc(); 994 end = start + itc_freq * n; 995 /* printf("DELAY from 0x%lx to 0x%lx\n", start, end); */ 996 do { 997 now = ia64_get_itc(); 998 } while (now < end || (now > start && end < start)); 999 1000 sched_unpin(); 1001 } 1002 1003 /* 1004 * Send an interrupt (signal) to a process. 1005 */ 1006 void 1007 sendsig(sig_t catcher, ksiginfo_t *ksi, sigset_t *mask) 1008 { 1009 struct proc *p; 1010 struct thread *td; 1011 struct trapframe *tf; 1012 struct sigacts *psp; 1013 struct sigframe sf, *sfp; 1014 u_int64_t sbs, sp; 1015 int oonstack; 1016 int sig; 1017 u_long code; 1018 1019 td = curthread; 1020 p = td->td_proc; 1021 PROC_LOCK_ASSERT(p, MA_OWNED); 1022 sig = ksi->ksi_signo; 1023 code = ksi->ksi_code; 1024 psp = p->p_sigacts; 1025 mtx_assert(&psp->ps_mtx, MA_OWNED); 1026 tf = td->td_frame; 1027 sp = tf->tf_special.sp; 1028 oonstack = sigonstack(sp); 1029 sbs = 0; 1030 1031 /* save user context */ 1032 bzero(&sf, sizeof(struct sigframe)); 1033 sf.sf_uc.uc_sigmask = *mask; 1034 sf.sf_uc.uc_stack = td->td_sigstk; 1035 sf.sf_uc.uc_stack.ss_flags = (td->td_pflags & TDP_ALTSTACK) 1036 ? ((oonstack) ? SS_ONSTACK : 0) : SS_DISABLE; 1037 1038 /* 1039 * Allocate and validate space for the signal handler 1040 * context. Note that if the stack is in P0 space, the 1041 * call to grow() is a nop, and the useracc() check 1042 * will fail if the process has not already allocated 1043 * the space with a `brk'. 1044 */ 1045 if ((td->td_pflags & TDP_ALTSTACK) != 0 && !oonstack && 1046 SIGISMEMBER(psp->ps_sigonstack, sig)) { 1047 sbs = (u_int64_t)td->td_sigstk.ss_sp; 1048 sbs = (sbs + 15) & ~15; 1049 sfp = (struct sigframe *)(sbs + td->td_sigstk.ss_size); 1050 #if defined(COMPAT_43) 1051 td->td_sigstk.ss_flags |= SS_ONSTACK; 1052 #endif 1053 } else 1054 sfp = (struct sigframe *)sp; 1055 sfp = (struct sigframe *)((u_int64_t)(sfp - 1) & ~15); 1056 1057 /* Fill in the siginfo structure for POSIX handlers. */ 1058 if (SIGISMEMBER(psp->ps_siginfo, sig)) { 1059 sf.sf_si = ksi->ksi_info; 1060 sf.sf_si.si_signo = sig; 1061 /* 1062 * XXX this shouldn't be here after code in trap.c 1063 * is fixed 1064 */ 1065 sf.sf_si.si_addr = (void*)tf->tf_special.ifa; 1066 code = (u_int64_t)&sfp->sf_si; 1067 } 1068 1069 mtx_unlock(&psp->ps_mtx); 1070 PROC_UNLOCK(p); 1071 1072 get_mcontext(td, &sf.sf_uc.uc_mcontext, 0); 1073 1074 /* Copy the frame out to userland. */ 1075 if (copyout(&sf, sfp, sizeof(sf)) != 0) { 1076 /* 1077 * Process has trashed its stack; give it an illegal 1078 * instruction to halt it in its tracks. 1079 */ 1080 PROC_LOCK(p); 1081 sigexit(td, SIGILL); 1082 return; 1083 } 1084 1085 if ((tf->tf_flags & FRAME_SYSCALL) == 0) { 1086 tf->tf_special.psr &= ~IA64_PSR_RI; 1087 tf->tf_special.iip = ia64_get_k5() + 1088 ((uint64_t)break_sigtramp - (uint64_t)ia64_gateway_page); 1089 } else 1090 tf->tf_special.iip = ia64_get_k5() + 1091 ((uint64_t)epc_sigtramp - (uint64_t)ia64_gateway_page); 1092 1093 /* 1094 * Setup the trapframe to return to the signal trampoline. We pass 1095 * information to the trampoline in the following registers: 1096 * 1097 * gp new backing store or NULL 1098 * r8 signal number 1099 * r9 signal code or siginfo pointer 1100 * r10 signal handler (function descriptor) 1101 */ 1102 tf->tf_special.sp = (u_int64_t)sfp - 16; 1103 tf->tf_special.gp = sbs; 1104 tf->tf_special.bspstore = sf.sf_uc.uc_mcontext.mc_special.bspstore; 1105 tf->tf_special.ndirty = 0; 1106 tf->tf_special.rnat = sf.sf_uc.uc_mcontext.mc_special.rnat; 1107 tf->tf_scratch.gr8 = sig; 1108 tf->tf_scratch.gr9 = code; 1109 tf->tf_scratch.gr10 = (u_int64_t)catcher; 1110 1111 PROC_LOCK(p); 1112 mtx_lock(&psp->ps_mtx); 1113 } 1114 1115 /* 1116 * System call to cleanup state after a signal 1117 * has been taken. Reset signal mask and 1118 * stack state from context left by sendsig (above). 1119 * Return to previous pc and psl as specified by 1120 * context left by sendsig. Check carefully to 1121 * make sure that the user has not modified the 1122 * state to gain improper privileges. 1123 * 1124 * MPSAFE 1125 */ 1126 int 1127 sigreturn(struct thread *td, 1128 struct sigreturn_args /* { 1129 ucontext_t *sigcntxp; 1130 } */ *uap) 1131 { 1132 ucontext_t uc; 1133 struct trapframe *tf; 1134 struct pcb *pcb; 1135 1136 tf = td->td_frame; 1137 pcb = td->td_pcb; 1138 1139 /* 1140 * Fetch the entire context structure at once for speed. 1141 * We don't use a normal argument to simplify RSE handling. 1142 */ 1143 if (copyin(uap->sigcntxp, (caddr_t)&uc, sizeof(uc))) 1144 return (EFAULT); 1145 1146 set_mcontext(td, &uc.uc_mcontext); 1147 1148 #if defined(COMPAT_43) 1149 if (sigonstack(tf->tf_special.sp)) 1150 td->td_sigstk.ss_flags |= SS_ONSTACK; 1151 else 1152 td->td_sigstk.ss_flags &= ~SS_ONSTACK; 1153 #endif 1154 kern_sigprocmask(td, SIG_SETMASK, &uc.uc_sigmask, NULL, 0); 1155 1156 return (EJUSTRETURN); 1157 } 1158 1159 #ifdef COMPAT_FREEBSD4 1160 int 1161 freebsd4_sigreturn(struct thread *td, struct freebsd4_sigreturn_args *uap) 1162 { 1163 1164 return sigreturn(td, (struct sigreturn_args *)uap); 1165 } 1166 #endif 1167 1168 /* 1169 * Construct a PCB from a trapframe. This is called from kdb_trap() where 1170 * we want to start a backtrace from the function that caused us to enter 1171 * the debugger. We have the context in the trapframe, but base the trace 1172 * on the PCB. The PCB doesn't have to be perfect, as long as it contains 1173 * enough for a backtrace. 1174 */ 1175 void 1176 makectx(struct trapframe *tf, struct pcb *pcb) 1177 { 1178 1179 pcb->pcb_special = tf->tf_special; 1180 pcb->pcb_special.__spare = ~0UL; /* XXX see unwind.c */ 1181 save_callee_saved(&pcb->pcb_preserved); 1182 save_callee_saved_fp(&pcb->pcb_preserved_fp); 1183 } 1184 1185 int 1186 ia64_flush_dirty(struct thread *td, struct _special *r) 1187 { 1188 struct iovec iov; 1189 struct uio uio; 1190 uint64_t bspst, kstk, rnat; 1191 int error, locked; 1192 1193 if (r->ndirty == 0) 1194 return (0); 1195 1196 kstk = td->td_kstack + (r->bspstore & 0x1ffUL); 1197 if (td == curthread) { 1198 __asm __volatile("mov ar.rsc=0;;"); 1199 __asm __volatile("mov %0=ar.bspstore" : "=r"(bspst)); 1200 /* Make sure we have all the user registers written out. */ 1201 if (bspst - kstk < r->ndirty) { 1202 __asm __volatile("flushrs;;"); 1203 __asm __volatile("mov %0=ar.bspstore" : "=r"(bspst)); 1204 } 1205 __asm __volatile("mov %0=ar.rnat;;" : "=r"(rnat)); 1206 __asm __volatile("mov ar.rsc=3"); 1207 error = copyout((void*)kstk, (void*)r->bspstore, r->ndirty); 1208 kstk += r->ndirty; 1209 r->rnat = (bspst > kstk && (bspst & 0x1ffL) < (kstk & 0x1ffL)) 1210 ? *(uint64_t*)(kstk | 0x1f8L) : rnat; 1211 } else { 1212 locked = PROC_LOCKED(td->td_proc); 1213 if (!locked) 1214 PHOLD(td->td_proc); 1215 iov.iov_base = (void*)(uintptr_t)kstk; 1216 iov.iov_len = r->ndirty; 1217 uio.uio_iov = &iov; 1218 uio.uio_iovcnt = 1; 1219 uio.uio_offset = r->bspstore; 1220 uio.uio_resid = r->ndirty; 1221 uio.uio_segflg = UIO_SYSSPACE; 1222 uio.uio_rw = UIO_WRITE; 1223 uio.uio_td = td; 1224 error = proc_rwmem(td->td_proc, &uio); 1225 /* 1226 * XXX proc_rwmem() doesn't currently return ENOSPC, 1227 * so I think it can bogusly return 0. Neither do 1228 * we allow short writes. 1229 */ 1230 if (uio.uio_resid != 0 && error == 0) 1231 error = ENOSPC; 1232 if (!locked) 1233 PRELE(td->td_proc); 1234 } 1235 1236 r->bspstore += r->ndirty; 1237 r->ndirty = 0; 1238 return (error); 1239 } 1240 1241 int 1242 get_mcontext(struct thread *td, mcontext_t *mc, int flags) 1243 { 1244 struct trapframe *tf; 1245 int error; 1246 1247 tf = td->td_frame; 1248 bzero(mc, sizeof(*mc)); 1249 mc->mc_special = tf->tf_special; 1250 error = ia64_flush_dirty(td, &mc->mc_special); 1251 if (tf->tf_flags & FRAME_SYSCALL) { 1252 mc->mc_flags |= _MC_FLAGS_SYSCALL_CONTEXT; 1253 mc->mc_scratch = tf->tf_scratch; 1254 if (flags & GET_MC_CLEAR_RET) { 1255 mc->mc_scratch.gr8 = 0; 1256 mc->mc_scratch.gr9 = 0; 1257 mc->mc_scratch.gr10 = 0; 1258 mc->mc_scratch.gr11 = 0; 1259 } 1260 } else { 1261 mc->mc_flags |= _MC_FLAGS_ASYNC_CONTEXT; 1262 mc->mc_scratch = tf->tf_scratch; 1263 mc->mc_scratch_fp = tf->tf_scratch_fp; 1264 /* 1265 * XXX If the thread never used the high FP registers, we 1266 * probably shouldn't waste time saving them. 1267 */ 1268 ia64_highfp_save(td); 1269 mc->mc_flags |= _MC_FLAGS_HIGHFP_VALID; 1270 mc->mc_high_fp = td->td_pcb->pcb_high_fp; 1271 } 1272 save_callee_saved(&mc->mc_preserved); 1273 save_callee_saved_fp(&mc->mc_preserved_fp); 1274 return (error); 1275 } 1276 1277 int 1278 set_mcontext(struct thread *td, const mcontext_t *mc) 1279 { 1280 struct _special s; 1281 struct trapframe *tf; 1282 uint64_t psrmask; 1283 1284 tf = td->td_frame; 1285 1286 KASSERT((tf->tf_special.ndirty & ~PAGE_MASK) == 0, 1287 ("Whoa there! We have more than 8KB of dirty registers!")); 1288 1289 s = mc->mc_special; 1290 /* 1291 * Only copy the user mask and the restart instruction bit from 1292 * the new context. 1293 */ 1294 psrmask = IA64_PSR_BE | IA64_PSR_UP | IA64_PSR_AC | IA64_PSR_MFL | 1295 IA64_PSR_MFH | IA64_PSR_RI; 1296 s.psr = (tf->tf_special.psr & ~psrmask) | (s.psr & psrmask); 1297 /* We don't have any dirty registers of the new context. */ 1298 s.ndirty = 0; 1299 if (mc->mc_flags & _MC_FLAGS_ASYNC_CONTEXT) { 1300 /* 1301 * We can get an async context passed to us while we 1302 * entered the kernel through a syscall: sigreturn(2) 1303 * takes contexts that could previously be the result of 1304 * a trap or interrupt. 1305 * Hence, we cannot assert that the trapframe is not 1306 * a syscall frame, but we can assert that it's at 1307 * least an expected syscall. 1308 */ 1309 if (tf->tf_flags & FRAME_SYSCALL) { 1310 KASSERT(tf->tf_scratch.gr15 == SYS_sigreturn, ("foo")); 1311 tf->tf_flags &= ~FRAME_SYSCALL; 1312 } 1313 tf->tf_scratch = mc->mc_scratch; 1314 tf->tf_scratch_fp = mc->mc_scratch_fp; 1315 if (mc->mc_flags & _MC_FLAGS_HIGHFP_VALID) 1316 td->td_pcb->pcb_high_fp = mc->mc_high_fp; 1317 } else { 1318 KASSERT((tf->tf_flags & FRAME_SYSCALL) != 0, ("foo")); 1319 if ((mc->mc_flags & _MC_FLAGS_SYSCALL_CONTEXT) == 0) { 1320 s.cfm = tf->tf_special.cfm; 1321 s.iip = tf->tf_special.iip; 1322 tf->tf_scratch.gr15 = 0; /* Clear syscall nr. */ 1323 } else 1324 tf->tf_scratch = mc->mc_scratch; 1325 } 1326 tf->tf_special = s; 1327 restore_callee_saved(&mc->mc_preserved); 1328 restore_callee_saved_fp(&mc->mc_preserved_fp); 1329 1330 return (0); 1331 } 1332 1333 /* 1334 * Clear registers on exec. 1335 */ 1336 void 1337 exec_setregs(struct thread *td, u_long entry, u_long stack, u_long ps_strings) 1338 { 1339 struct trapframe *tf; 1340 uint64_t *ksttop, *kst; 1341 1342 tf = td->td_frame; 1343 ksttop = (uint64_t*)(td->td_kstack + tf->tf_special.ndirty + 1344 (tf->tf_special.bspstore & 0x1ffUL)); 1345 1346 /* 1347 * We can ignore up to 8KB of dirty registers by masking off the 1348 * lower 13 bits in exception_restore() or epc_syscall(). This 1349 * should be enough for a couple of years, but if there are more 1350 * than 8KB of dirty registers, we lose track of the bottom of 1351 * the kernel stack. The solution is to copy the active part of 1352 * the kernel stack down 1 page (or 2, but not more than that) 1353 * so that we always have less than 8KB of dirty registers. 1354 */ 1355 KASSERT((tf->tf_special.ndirty & ~PAGE_MASK) == 0, 1356 ("Whoa there! We have more than 8KB of dirty registers!")); 1357 1358 bzero(&tf->tf_special, sizeof(tf->tf_special)); 1359 if ((tf->tf_flags & FRAME_SYSCALL) == 0) { /* break syscalls. */ 1360 bzero(&tf->tf_scratch, sizeof(tf->tf_scratch)); 1361 bzero(&tf->tf_scratch_fp, sizeof(tf->tf_scratch_fp)); 1362 tf->tf_special.cfm = (1UL<<63) | (3UL<<7) | 3UL; 1363 tf->tf_special.bspstore = IA64_BACKINGSTORE; 1364 /* 1365 * Copy the arguments onto the kernel register stack so that 1366 * they get loaded by the loadrs instruction. Skip over the 1367 * NaT collection points. 1368 */ 1369 kst = ksttop - 1; 1370 if (((uintptr_t)kst & 0x1ff) == 0x1f8) 1371 *kst-- = 0; 1372 *kst-- = 0; 1373 if (((uintptr_t)kst & 0x1ff) == 0x1f8) 1374 *kst-- = 0; 1375 *kst-- = ps_strings; 1376 if (((uintptr_t)kst & 0x1ff) == 0x1f8) 1377 *kst-- = 0; 1378 *kst = stack; 1379 tf->tf_special.ndirty = (ksttop - kst) << 3; 1380 } else { /* epc syscalls (default). */ 1381 tf->tf_special.cfm = (3UL<<62) | (3UL<<7) | 3UL; 1382 tf->tf_special.bspstore = IA64_BACKINGSTORE + 24; 1383 /* 1384 * Write values for out0, out1 and out2 to the user's backing 1385 * store and arrange for them to be restored into the user's 1386 * initial register frame. 1387 * Assumes that (bspstore & 0x1f8) < 0x1e0. 1388 */ 1389 suword((caddr_t)tf->tf_special.bspstore - 24, stack); 1390 suword((caddr_t)tf->tf_special.bspstore - 16, ps_strings); 1391 suword((caddr_t)tf->tf_special.bspstore - 8, 0); 1392 } 1393 1394 tf->tf_special.iip = entry; 1395 tf->tf_special.sp = (stack & ~15) - 16; 1396 tf->tf_special.rsc = 0xf; 1397 tf->tf_special.fpsr = IA64_FPSR_DEFAULT; 1398 tf->tf_special.psr = IA64_PSR_IC | IA64_PSR_I | IA64_PSR_IT | 1399 IA64_PSR_DT | IA64_PSR_RT | IA64_PSR_DFH | IA64_PSR_BN | 1400 IA64_PSR_CPL_USER; 1401 } 1402 1403 int 1404 ptrace_set_pc(struct thread *td, unsigned long addr) 1405 { 1406 uint64_t slot; 1407 1408 switch (addr & 0xFUL) { 1409 case 0: 1410 slot = IA64_PSR_RI_0; 1411 break; 1412 case 1: 1413 /* XXX we need to deal with MLX bundles here */ 1414 slot = IA64_PSR_RI_1; 1415 break; 1416 case 2: 1417 slot = IA64_PSR_RI_2; 1418 break; 1419 default: 1420 return (EINVAL); 1421 } 1422 1423 td->td_frame->tf_special.iip = addr & ~0x0FULL; 1424 td->td_frame->tf_special.psr = 1425 (td->td_frame->tf_special.psr & ~IA64_PSR_RI) | slot; 1426 return (0); 1427 } 1428 1429 int 1430 ptrace_single_step(struct thread *td) 1431 { 1432 struct trapframe *tf; 1433 1434 /* 1435 * There's no way to set single stepping when we're leaving the 1436 * kernel through the EPC syscall path. The way we solve this is 1437 * by enabling the lower-privilege trap so that we re-enter the 1438 * kernel as soon as the privilege level changes. See trap.c for 1439 * how we proceed from there. 1440 */ 1441 tf = td->td_frame; 1442 if (tf->tf_flags & FRAME_SYSCALL) 1443 tf->tf_special.psr |= IA64_PSR_LP; 1444 else 1445 tf->tf_special.psr |= IA64_PSR_SS; 1446 return (0); 1447 } 1448 1449 int 1450 ptrace_clear_single_step(struct thread *td) 1451 { 1452 struct trapframe *tf; 1453 1454 /* 1455 * Clear any and all status bits we may use to implement single 1456 * stepping. 1457 */ 1458 tf = td->td_frame; 1459 tf->tf_special.psr &= ~IA64_PSR_SS; 1460 tf->tf_special.psr &= ~IA64_PSR_LP; 1461 tf->tf_special.psr &= ~IA64_PSR_TB; 1462 return (0); 1463 } 1464 1465 int 1466 fill_regs(struct thread *td, struct reg *regs) 1467 { 1468 struct trapframe *tf; 1469 1470 tf = td->td_frame; 1471 regs->r_special = tf->tf_special; 1472 regs->r_scratch = tf->tf_scratch; 1473 save_callee_saved(®s->r_preserved); 1474 return (0); 1475 } 1476 1477 int 1478 set_regs(struct thread *td, struct reg *regs) 1479 { 1480 struct trapframe *tf; 1481 int error; 1482 1483 tf = td->td_frame; 1484 error = ia64_flush_dirty(td, &tf->tf_special); 1485 if (!error) { 1486 tf->tf_special = regs->r_special; 1487 tf->tf_special.bspstore += tf->tf_special.ndirty; 1488 tf->tf_special.ndirty = 0; 1489 tf->tf_scratch = regs->r_scratch; 1490 restore_callee_saved(®s->r_preserved); 1491 } 1492 return (error); 1493 } 1494 1495 int 1496 fill_dbregs(struct thread *td, struct dbreg *dbregs) 1497 { 1498 1499 return (ENOSYS); 1500 } 1501 1502 int 1503 set_dbregs(struct thread *td, struct dbreg *dbregs) 1504 { 1505 1506 return (ENOSYS); 1507 } 1508 1509 int 1510 fill_fpregs(struct thread *td, struct fpreg *fpregs) 1511 { 1512 struct trapframe *frame = td->td_frame; 1513 struct pcb *pcb = td->td_pcb; 1514 1515 /* Save the high FP registers. */ 1516 ia64_highfp_save(td); 1517 1518 fpregs->fpr_scratch = frame->tf_scratch_fp; 1519 save_callee_saved_fp(&fpregs->fpr_preserved); 1520 fpregs->fpr_high = pcb->pcb_high_fp; 1521 return (0); 1522 } 1523 1524 int 1525 set_fpregs(struct thread *td, struct fpreg *fpregs) 1526 { 1527 struct trapframe *frame = td->td_frame; 1528 struct pcb *pcb = td->td_pcb; 1529 1530 /* Throw away the high FP registers (should be redundant). */ 1531 ia64_highfp_drop(td); 1532 1533 frame->tf_scratch_fp = fpregs->fpr_scratch; 1534 restore_callee_saved_fp(&fpregs->fpr_preserved); 1535 pcb->pcb_high_fp = fpregs->fpr_high; 1536 return (0); 1537 } 1538 1539 void 1540 ia64_sync_icache(vm_offset_t va, vm_offset_t sz) 1541 { 1542 vm_offset_t lim; 1543 1544 if (!ia64_sync_icache_needed) 1545 return; 1546 1547 lim = va + sz; 1548 while (va < lim) { 1549 ia64_fc_i(va); 1550 va += 32; /* XXX */ 1551 } 1552 1553 ia64_sync_i(); 1554 ia64_srlz_i(); 1555 }
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