The Design and Implementation of the FreeBSD Operating System, Second Edition
Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)


[ source navigation ] [ diff markup ] [ identifier search ] [ freetext search ] [ file search ] [ list types ] [ track identifier ]

FreeBSD/Linux Kernel Cross Reference
sys/include/ibm/cmos.h

Version: -  FREEBSD  -  FREEBSD-13-STABLE  -  FREEBSD-13-0  -  FREEBSD-12-STABLE  -  FREEBSD-12-0  -  FREEBSD-11-STABLE  -  FREEBSD-11-0  -  FREEBSD-10-STABLE  -  FREEBSD-10-0  -  FREEBSD-9-STABLE  -  FREEBSD-9-0  -  FREEBSD-8-STABLE  -  FREEBSD-8-0  -  FREEBSD-7-STABLE  -  FREEBSD-7-0  -  FREEBSD-6-STABLE  -  FREEBSD-6-0  -  FREEBSD-5-STABLE  -  FREEBSD-5-0  -  FREEBSD-4-STABLE  -  FREEBSD-3-STABLE  -  FREEBSD22  -  l41  -  OPENBSD  -  linux-2.6  -  MK84  -  PLAN9  -  xnu-8792 
SearchContext: -  none  -  3  -  10 

    1 /*
    2 ibm/cmos.h
    3 
    4 Created:        Dec 1998 by Philip Homburg <philip@cs.vu.nl>
    5 
    6 Definitions for the CMOS/realtime clock. Based on the datasheet for the
    7 Dallas DS12887, compatible with the Motorola MC146818
    8 */
    9 
   10 #define RTC_INDEX       0x70    /* Bit 7 = NMI enable (1) / disable (0)
   11                                  * bits 0..6 index
   12                                  */
   13 #define RTC_IO          0x71    /* Data register, 
   14                                  * Note: the operation following a write to
   15                                  * RTC_INDEX should an access (read or write)
   16                                  * to RTC_IO
   17                                  */
   18 
   19 #define RTC_SEC         0x0     /* Seconds register */
   20 #define RTC_SEC_ALRM    0x1     /* Seconds register for alarm */
   21 #define RTC_MIN         0x2     /* Minutes register */
   22 #define RTC_MIN_ALRM    0x3     /* Minutes register for alarm */
   23 #define RTC_HOUR        0x4     /* Hours register */
   24 #define RTC_HOUR_ALRM   0x5     /* Hours register for alarm */
   25 #define RTC_WDAY        0x6     /* Day of the week, 1..7, Sunday = 1 */
   26 #define RTC_MDAY        0x7     /* Day of the month, 1..31 */
   27 #define RTC_MONTH       0x8     /* Month, 1..12 */
   28 #define RTC_YEAR        0x9     /* Year, 0..99 */
   29 #define RTC_REG_A       0xA
   30 #define         RTC_A_UIP       0x80    /* Update in progress. When clear,
   31                                          * no update will occur for 244
   32                                          * micro seconds.
   33                                          */
   34 #define         RTC_A_DV        0x70    /* Divider bits, valid values are: */
   35 #define             RTC_A_DV_OK     0x20        /* Normal */
   36 #define             RTC_A_DV_STOP   0x70        /* Stop, a re-start starts
   37                                                  * halfway through a cycle,
   38                                                  * i.e. the update occurs after
   39                                                  * 500ms.
   40                                                  */
   41 #define         RTC_A_RS        0x0F    /* Int. freq */
   42                                     /*  0       None 
   43                                      *  1        256 Hz
   44                                      *  2        128 Hz
   45                                      *  3       8192 Hz
   46                                      *  4       4096 Hz
   47                                      *  5       2048 Hz
   48                                      *  6       1024 Hz
   49                                      *  7        512 Hz
   50                                      *  8        256 Hz
   51                                      *  9        128 Hz
   52                                      * 10         64 Hz
   53                                      * 11         32 Hz
   54                                      * 12         16 Hz
   55                                      * 13          8 Hz
   56                                      * 14          4 Hz
   57                                      * 15          2 Hz
   58                                      */
   59 #define             RTC_A_RS_DEF    6   /* Default freq. */
   60 #define RTC_REG_B       0xB
   61 #define         RTC_B_SET       0x80    /* Inhibit updates */
   62 #define         RTC_B_PIE       0x40    /* Enable periodic interrupts */
   63 #define         RTC_B_AIE       0x20    /* Enable alarm interrupts */
   64 #define         RTC_B_UIE       0x10    /* Enable update ended interrupts */
   65 #define         RTC_B_SQWE      0x08    /* Enable square wave output */
   66 #define         RTC_B_DM_BCD    0x04    /* Data is in BCD (otherwise binary) */
   67 #define         RTC_B_24        0x02    /* Count hours in 24-hour mode */
   68 #define         RTC_B_DSE       0x01    /* Automatic (wrong) daylight savings
   69                                          * updates
   70                                          */
   71 #define RTC_REG_C       0xC
   72 
   73 /* Contents of the general purpose CMOS RAM (source IBM reference manual) */
   74 #define CMOS_STATUS     0xE
   75 #define         CS_LOST_POWER   0x80    /* Chip lost power */
   76 #define         CS_BAD_CHKSUM   0x40    /* Checksum is incorrect */
   77 #define         CS_BAD_CONFIG   0x20    /* Bad configuration info */
   78 #define         CS_BAD_MEMSIZE  0x10    /* Wrong memory size of CMOS */
   79 #define         CS_BAD_HD       0x08    /* Harddisk failed */
   80 #define         CS_BAD_TIME     0x04    /* CMOS time is invalid */
   81                                         /* bits 0 and 1 are reserved */
   82 
   83 /*
   84  * $PchId: cmos.h,v 1.1 1998/12/16 09:14:21 philip Exp $
   85  */

Cache object: 883ba9fb10542b7a05af54628ea3de7d


[ source navigation ] [ diff markup ] [ identifier search ] [ freetext search ] [ file search ] [ list types ] [ track identifier ]


This page is part of the FreeBSD/Linux Linux Kernel Cross-Reference, and was automatically generated using a modified version of the LXR engine.