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FreeBSD/Linux Kernel Cross Reference
sys/isa/rtc.h

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    1 /*-
    2  * Copyright (c) 1990 The Regents of the University of California.
    3  * All rights reserved.
    4  *
    5  * This code is derived from software contributed to Berkeley by
    6  * William Jolitz.
    7  *
    8  * Redistribution and use in source and binary forms, with or without
    9  * modification, are permitted provided that the following conditions
   10  * are met:
   11  * 1. Redistributions of source code must retain the above copyright
   12  *    notice, this list of conditions and the following disclaimer.
   13  * 2. Redistributions in binary form must reproduce the above copyright
   14  *    notice, this list of conditions and the following disclaimer in the
   15  *    documentation and/or other materials provided with the distribution.
   16  * 4. Neither the name of the University nor the names of its contributors
   17  *    may be used to endorse or promote products derived from this software
   18  *    without specific prior written permission.
   19  *
   20  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
   21  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
   22  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
   23  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
   24  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
   25  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
   26  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
   27  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
   28  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
   29  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
   30  * SUCH DAMAGE.
   31  *
   32  *      from: @(#)rtc.h 7.1 (Berkeley) 5/12/91
   33  * $FreeBSD: releng/7.4/sys/isa/rtc.h 128019 2004-04-07 20:46:16Z imp $
   34  */
   35 
   36 #ifndef _I386_ISA_RTC_H_
   37 #define _I386_ISA_RTC_H_ 1
   38 
   39 /*
   40  * MC146818 RTC Register locations
   41  */
   42 
   43 #define RTC_SEC         0x00    /* seconds */
   44 #define RTC_SECALRM     0x01    /* seconds alarm */
   45 #define RTC_MIN         0x02    /* minutes */
   46 #define RTC_MINALRM     0x03    /* minutes alarm */
   47 #define RTC_HRS         0x04    /* hours */
   48 #define RTC_HRSALRM     0x05    /* hours alarm */
   49 #define RTC_WDAY        0x06    /* week day */
   50 #define RTC_DAY         0x07    /* day of month */
   51 #define RTC_MONTH       0x08    /* month of year */
   52 #define RTC_YEAR        0x09    /* month of year */
   53 
   54 #define RTC_STATUSA     0x0a    /* status register A */
   55 #define  RTCSA_TUP       0x80   /* time update, don't look now */
   56 #define  RTCSA_RESET     0x70   /* reset divider */
   57 #define  RTCSA_DIVIDER   0x20   /* divider correct for 32768 Hz */
   58 #define  RTCSA_8192      0x03   /* 8192 Hz interrupt */
   59 #define  RTCSA_4096      0x04
   60 #define  RTCSA_2048      0x05
   61 #define  RTCSA_1024      0x06   /* default for profiling */
   62 #define  RTCSA_PROF      RTCSA_1024
   63 #define  RTC_PROFRATE    1024
   64 #define  RTCSA_512       0x07
   65 #define  RTCSA_256       0x08
   66 #define  RTCSA_128       0x09
   67 #define  RTCSA_NOPROF    RTCSA_128
   68 #define  RTC_NOPROFRATE  128
   69 #define  RTCSA_64        0x0a
   70 #define  RTCSA_32        0x0b   /* 32 Hz interrupt */
   71 
   72 #define RTC_STATUSB     0x0b    /* status register B */
   73 #define  RTCSB_DST       0x01   /* USA Daylight Savings Time enable */
   74 #define  RTCSB_24HR      0x02   /* 0 = 12 hours, 1 = 24 hours */
   75 #define  RTCSB_BCD       0x04   /* 0 = BCD, 1 = Binary coded time */
   76 #define  RTCSB_SQWE      0x08   /* 1 = output sqare wave at SQW pin */
   77 #define  RTCSB_UINTR     0x10   /* 1 = enable update-ended interrupt */
   78 #define  RTCSB_AINTR     0x20   /* 1 = enable alarm interrupt */
   79 #define  RTCSB_PINTR     0x40   /* 1 = enable periodic clock interrupt */
   80 #define  RTCSB_HALT      0x80   /* stop clock updates */
   81 
   82 #define RTC_INTR        0x0c    /* status register C (R) interrupt source */
   83 #define  RTCIR_UPDATE    0x10   /* update intr */
   84 #define  RTCIR_ALARM     0x20   /* alarm intr */
   85 #define  RTCIR_PERIOD    0x40   /* periodic intr */
   86 #define  RTCIR_INT       0x80   /* interrupt output signal */
   87 
   88 #define RTC_STATUSD     0x0d    /* status register D (R) Lost Power */
   89 #define  RTCSD_PWR       0x80   /* clock power OK */
   90 
   91 #define RTC_DIAG        0x0e    /* status register E - bios diagnostic */
   92 #define RTCDG_BITS      "\020\010clock_battery\007ROM_cksum\006config_unit\005memory_size\004fixed_disk\003invalid_time"
   93 
   94 #define RTC_RESET       0x0f    /* status register F - reset code byte */
   95 #define  RTCRS_RST       0x00           /* normal reset */
   96 #define  RTCRS_LOAD      0x04           /* load system */
   97 
   98 #define RTC_FDISKETTE   0x10    /* diskette drive type in upper/lower nibble */
   99 #define  RTCFDT_NONE     0              /* none present */
  100 #define  RTCFDT_360K     0x10           /* 360K */
  101 #define  RTCFDT_12M      0x20           /* 1.2M */
  102 #define  RTCFDT_720K     0x30           /* 720K */
  103 #define  RTCFDT_144M     0x40           /* 1.44M */
  104 #define  RTCFDT_288M_1   0x50           /* 2.88M, some BIOSes */
  105 #define  RTCFDT_288M     0x60           /* 2.88M */
  106 
  107 #define RTC_BASELO      0x15    /* low byte of basemem size */
  108 #define RTC_BASEHI      0x16    /* high byte of basemem size */
  109 #define RTC_EXTLO       0x17    /* low byte of extended mem size */
  110 #define RTC_EXTHI       0x18    /* low byte of extended mem size */
  111 
  112 #define RTC_CENTURY     0x32    /* current century */
  113 #endif /* _I386_ISA_RTC_H_ */

Cache object: 3c954f4499bf5af8c646defe11abbd30


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