1 /*-
2 * Copyright (c) 2008 Sam Leffler. All rights reserved.
3 *
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions
6 * are met:
7 * 1. Redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer.
9 * 2. Redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution.
12 *
13 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
14 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
15 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
16 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
17 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
18 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
19 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
20 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
21 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
22 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
23 */
24
25 /*
26 * AR71XX attachment driver for the USB Enhanced Host Controller.
27 */
28
29 #include <sys/cdefs.h>
30 __FBSDID("$FreeBSD: releng/8.2/sys/mips/atheros/ar71xx_ehci.c 215938 2010-11-27 12:26:40Z jchandra $");
31
32 #include "opt_bus.h"
33
34 #include <sys/param.h>
35 #include <sys/systm.h>
36 #include <sys/bus.h>
37 #include <sys/rman.h>
38 #include <sys/condvar.h>
39 #include <sys/kernel.h>
40 #include <sys/module.h>
41
42 #include <machine/bus.h>
43
44 #include <dev/usb/usb.h>
45 #include <dev/usb/usbdi.h>
46
47 #include <dev/usb/usb_core.h>
48 #include <dev/usb/usb_busdma.h>
49 #include <dev/usb/usb_process.h>
50 #include <dev/usb/usb_util.h>
51
52 #include <dev/usb/usb_controller.h>
53 #include <dev/usb/usb_bus.h>
54 #include <dev/usb/controller/ehci.h>
55 #include <dev/usb/controller/ehcireg.h>
56
57 #include <mips/atheros/ar71xx_bus_space_reversed.h>
58
59 #define EHCI_HC_DEVSTR "AR71XX Integrated USB 2.0 controller"
60
61 struct ar71xx_ehci_softc {
62 ehci_softc_t base; /* storage for EHCI code */
63 };
64
65 static device_attach_t ar71xx_ehci_attach;
66 static device_detach_t ar71xx_ehci_detach;
67 static device_shutdown_t ar71xx_ehci_shutdown;
68 static device_suspend_t ar71xx_ehci_suspend;
69 static device_resume_t ar71xx_ehci_resume;
70
71 bs_r_1_proto(reversed);
72 bs_w_1_proto(reversed);
73
74 static int
75 ar71xx_ehci_suspend(device_t self)
76 {
77 ehci_softc_t *sc = device_get_softc(self);
78 int err;
79
80 err = bus_generic_suspend(self);
81 if (err)
82 return (err);
83 ehci_suspend(sc);
84 return (0);
85 }
86
87 static int
88 ar71xx_ehci_resume(device_t self)
89 {
90 ehci_softc_t *sc = device_get_softc(self);
91
92 ehci_resume(sc);
93
94 bus_generic_resume(self);
95
96 return (0);
97 }
98
99 static int
100 ar71xx_ehci_shutdown(device_t self)
101 {
102 ehci_softc_t *sc = device_get_softc(self);
103 int err;
104
105 err = bus_generic_shutdown(self);
106 if (err)
107 return (err);
108 ehci_shutdown(sc);
109
110 return (0);
111 }
112
113 static int
114 ar71xx_ehci_probe(device_t self)
115 {
116
117 device_set_desc(self, EHCI_HC_DEVSTR);
118
119 return (BUS_PROBE_DEFAULT);
120 }
121
122 static int
123 ar71xx_ehci_attach(device_t self)
124 {
125 struct ar71xx_ehci_softc *isc = device_get_softc(self);
126 ehci_softc_t *sc = &isc->base;
127 int err;
128 int rid;
129
130 /* initialise some bus fields */
131 sc->sc_bus.parent = self;
132 sc->sc_bus.devices = sc->sc_devices;
133 sc->sc_bus.devices_max = EHCI_MAX_DEVICES;
134
135 /* get all DMA memory */
136 if (usb_bus_mem_alloc_all(&sc->sc_bus,
137 USB_GET_DMA_TAG(self), &ehci_iterate_hw_softc)) {
138 return (ENOMEM);
139 }
140
141 sc->sc_bus.usbrev = USB_REV_2_0;
142
143 /* NB: hints fix the memory location and irq */
144
145 rid = 0;
146 sc->sc_io_res = bus_alloc_resource_any(self, SYS_RES_MEMORY, &rid, RF_ACTIVE);
147 if (!sc->sc_io_res) {
148 device_printf(self, "Could not map memory\n");
149 goto error;
150 }
151
152 /*
153 * Craft special resource for bus space ops that handle
154 * byte-alignment of non-word addresses.
155 */
156 sc->sc_io_tag = ar71xx_bus_space_reversed;
157 sc->sc_io_hdl = rman_get_bushandle(sc->sc_io_res);
158 sc->sc_io_size = rman_get_size(sc->sc_io_res);
159
160 rid = 0;
161 sc->sc_irq_res = bus_alloc_resource_any(self, SYS_RES_IRQ, &rid,
162 RF_ACTIVE);
163 if (sc->sc_irq_res == NULL) {
164 device_printf(self, "Could not allocate irq\n");
165 goto error;
166 }
167 sc->sc_bus.bdev = device_add_child(self, "usbus", -1);
168 if (!sc->sc_bus.bdev) {
169 device_printf(self, "Could not add USB device\n");
170 goto error;
171 }
172 device_set_ivars(sc->sc_bus.bdev, &sc->sc_bus);
173 device_set_desc(sc->sc_bus.bdev, EHCI_HC_DEVSTR);
174
175 sprintf(sc->sc_vendor, "Atheros");
176
177
178 err = bus_setup_intr(self, sc->sc_irq_res, INTR_TYPE_BIO | INTR_MPSAFE,
179 NULL, (driver_intr_t *)ehci_interrupt, sc, &sc->sc_intr_hdl);
180 if (err) {
181 device_printf(self, "Could not setup irq, %d\n", err);
182 sc->sc_intr_hdl = NULL;
183 goto error;
184 }
185
186 /*
187 * Arrange to force Host mode, select big-endian byte alignment,
188 * and arrange to not terminate reset operations (the adapter
189 * will ignore it if we do but might as well save a reg write).
190 * Also, the controller has an embedded Transaction Translator
191 * which means port speed must be read from the Port Status
192 * register following a port enable.
193 */
194 sc->sc_flags = EHCI_SCFLG_SETMODE;
195 (void) ehci_reset(sc);
196
197 err = ehci_init(sc);
198 if (!err) {
199 err = device_probe_and_attach(sc->sc_bus.bdev);
200 }
201 if (err) {
202 device_printf(self, "USB init failed err=%d\n", err);
203 goto error;
204 }
205 return (0);
206
207 error:
208 ar71xx_ehci_detach(self);
209 return (ENXIO);
210 }
211
212 static int
213 ar71xx_ehci_detach(device_t self)
214 {
215 struct ar71xx_ehci_softc *isc = device_get_softc(self);
216 ehci_softc_t *sc = &isc->base;
217 device_t bdev;
218 int err;
219
220 if (sc->sc_bus.bdev) {
221 bdev = sc->sc_bus.bdev;
222 device_detach(bdev);
223 device_delete_child(self, bdev);
224 }
225 /* during module unload there are lots of children leftover */
226 device_delete_all_children(self);
227
228 /*
229 * disable interrupts that might have been switched on in ehci_init
230 */
231 if (sc->sc_io_res) {
232 EWRITE4(sc, EHCI_USBINTR, 0);
233 }
234
235 if (sc->sc_irq_res && sc->sc_intr_hdl) {
236 /*
237 * only call ehci_detach() after ehci_init()
238 */
239 ehci_detach(sc);
240
241 err = bus_teardown_intr(self, sc->sc_irq_res, sc->sc_intr_hdl);
242
243 if (err)
244 /* XXX or should we panic? */
245 device_printf(self, "Could not tear down irq, %d\n",
246 err);
247 sc->sc_intr_hdl = NULL;
248 }
249
250 if (sc->sc_irq_res) {
251 bus_release_resource(self, SYS_RES_IRQ, 0, sc->sc_irq_res);
252 sc->sc_irq_res = NULL;
253 }
254 if (sc->sc_io_res) {
255 bus_release_resource(self, SYS_RES_MEMORY, 0,
256 sc->sc_io_res);
257 sc->sc_io_res = NULL;
258 }
259 usb_bus_mem_free_all(&sc->sc_bus, &ehci_iterate_hw_softc);
260
261 return (0);
262 }
263
264 static device_method_t ehci_methods[] = {
265 /* Device interface */
266 DEVMETHOD(device_probe, ar71xx_ehci_probe),
267 DEVMETHOD(device_attach, ar71xx_ehci_attach),
268 DEVMETHOD(device_detach, ar71xx_ehci_detach),
269 DEVMETHOD(device_suspend, ar71xx_ehci_suspend),
270 DEVMETHOD(device_resume, ar71xx_ehci_resume),
271 DEVMETHOD(device_shutdown, ar71xx_ehci_shutdown),
272
273 /* Bus interface */
274 DEVMETHOD(bus_print_child, bus_generic_print_child),
275
276 {0, 0}
277 };
278
279 static driver_t ehci_driver = {
280 "ehci",
281 ehci_methods,
282 sizeof(struct ar71xx_ehci_softc),
283 };
284
285 static devclass_t ehci_devclass;
286
287 DRIVER_MODULE(ehci, nexus, ehci_driver, ehci_devclass, 0, 0);
288 MODULE_DEPEND(ehci, usb, 1, 1, 1);
Cache object: 72a6b1a311c5a70068bf25e6541f9c4c
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