ar71xx_gpio.c

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    1 /*-
    2  * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
    3  *
    4  * Copyright (c) 2009, Oleksandr Tymoshenko <gonzo@FreeBSD.org>
    5  * Copyright (c) 2009, Luiz Otavio O Souza. 
    6  * All rights reserved.
    7  *
    8  * Redistribution and use in source and binary forms, with or without
    9  * modification, are permitted provided that the following conditions
   10  * are met:
   11  * 1. Redistributions of source code must retain the above copyright
   12  *    notice unmodified, this list of conditions, and the following
   13  *    disclaimer.
   14  * 2. Redistributions in binary form must reproduce the above copyright
   15  *    notice, this list of conditions and the following disclaimer in the
   16  *    documentation and/or other materials provided with the distribution.
   17  *
   18  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
   19  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
   20  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
   21  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
   22  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
   23  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
   24  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
   25  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
   26  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
   27  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
   28  * SUCH DAMAGE.
   29  */
   30 
   31 /*
   32  * GPIO driver for AR71xx 
   33  */
   34 
   35 #include <sys/cdefs.h>
   36 __FBSDID("$FreeBSD$");
   37 
   38 #include <sys/param.h>
   39 #include <sys/systm.h>
   40 #include <sys/bus.h>
   41 
   42 #include <sys/kernel.h>
   43 #include <sys/module.h>
   44 #include <sys/rman.h>
   45 #include <sys/lock.h>
   46 #include <sys/malloc.h>
   47 #include <sys/mutex.h>
   48 #include <sys/gpio.h>
   49 
   50 #include <machine/bus.h>
   51 #include <machine/resource.h>
   52 #include <mips/atheros/ar71xxreg.h>
   53 #include <mips/atheros/ar71xx_setup.h>
   54 #include <mips/atheros/ar71xx_cpudef.h>
   55 #include <mips/atheros/ar71xx_gpiovar.h>
   56 #include <dev/gpio/gpiobusvar.h>
   57 #include <mips/atheros/ar933xreg.h>
   58 #include <mips/atheros/ar934xreg.h>
   59 #include <mips/atheros/qca953xreg.h>
   60 #include <mips/atheros/qca955xreg.h>
   61 
   62 #include "gpio_if.h"
   63 
   64 #define DEFAULT_CAPS    (GPIO_PIN_INPUT | GPIO_PIN_OUTPUT)
   65 
   66 /*
   67  * Helpers
   68  */
   69 static void ar71xx_gpio_function_enable(struct ar71xx_gpio_softc *sc, 
   70     uint32_t mask);
   71 static void ar71xx_gpio_function_disable(struct ar71xx_gpio_softc *sc, 
   72     uint32_t mask);
   73 static void ar71xx_gpio_pin_configure(struct ar71xx_gpio_softc *sc, 
   74     struct gpio_pin *pin, uint32_t flags);
   75 
   76 /*
   77  * Driver stuff
   78  */
   79 static int ar71xx_gpio_probe(device_t dev);
   80 static int ar71xx_gpio_attach(device_t dev);
   81 static int ar71xx_gpio_detach(device_t dev);
   82 static int ar71xx_gpio_filter(void *arg);
   83 static void ar71xx_gpio_intr(void *arg);
   84 
   85 /*
   86  * GPIO interface
   87  */
   88 static device_t ar71xx_gpio_get_bus(device_t);
   89 static int ar71xx_gpio_pin_max(device_t dev, int *maxpin);
   90 static int ar71xx_gpio_pin_getcaps(device_t dev, uint32_t pin, uint32_t *caps);
   91 static int ar71xx_gpio_pin_getflags(device_t dev, uint32_t pin, uint32_t
   92     *flags);
   93 static int ar71xx_gpio_pin_getname(device_t dev, uint32_t pin, char *name);
   94 static int ar71xx_gpio_pin_setflags(device_t dev, uint32_t pin, uint32_t flags);
   95 static int ar71xx_gpio_pin_set(device_t dev, uint32_t pin, unsigned int value);
   96 static int ar71xx_gpio_pin_get(device_t dev, uint32_t pin, unsigned int *val);
   97 static int ar71xx_gpio_pin_toggle(device_t dev, uint32_t pin);
   98 
   99 /*
  100  * Enable/disable the GPIO function control space.
  101  *
  102  * This is primarily for the AR71xx, which has SPI CS1/CS2, UART, SLIC, I2S
  103  * as GPIO pin options.
  104  */
  105 static void
  106 ar71xx_gpio_function_enable(struct ar71xx_gpio_softc *sc, uint32_t mask)
  107 {
  108 
  109         /*
  110          * XXX TODO: refactor this out into a per-chipset method.
  111          */
  112         if (ar71xx_soc == AR71XX_SOC_AR9341 ||
  113             ar71xx_soc == AR71XX_SOC_AR9342 ||
  114             ar71xx_soc == AR71XX_SOC_AR9344 ||
  115             ar71xx_soc == AR71XX_SOC_QCA9533 ||
  116             ar71xx_soc == AR71XX_SOC_QCA9533_V2 ||
  117             ar71xx_soc == AR71XX_SOC_QCA9556 ||
  118             ar71xx_soc == AR71XX_SOC_QCA9558)
  119                 GPIO_SET_BITS(sc, AR934X_GPIO_REG_FUNC, mask);
  120         else
  121                 GPIO_SET_BITS(sc, AR71XX_GPIO_FUNCTION, mask);
  122 }
  123 
  124 static void
  125 ar71xx_gpio_function_disable(struct ar71xx_gpio_softc *sc, uint32_t mask)
  126 {
  127 
  128         /*
  129          * XXX TODO: refactor this out into a per-chipset method.
  130          */
  131         if (ar71xx_soc == AR71XX_SOC_AR9341 ||
  132             ar71xx_soc == AR71XX_SOC_AR9342 ||
  133             ar71xx_soc == AR71XX_SOC_AR9344 ||
  134             ar71xx_soc == AR71XX_SOC_QCA9533 ||
  135             ar71xx_soc == AR71XX_SOC_QCA9533_V2 ||
  136             ar71xx_soc == AR71XX_SOC_QCA9556 ||
  137             ar71xx_soc == AR71XX_SOC_QCA9558)
  138                 GPIO_CLEAR_BITS(sc, AR934X_GPIO_REG_FUNC, mask);
  139         else
  140                 GPIO_CLEAR_BITS(sc, AR71XX_GPIO_FUNCTION, mask);
  141 }
  142 
  143 /*
  144  * On most platforms, GPIO_OE is a bitmap where the bit set
  145  * means "enable output."
  146  *
  147  * On AR934x and QCA953x, it's the opposite - the bit set means
  148  * "input enable".
  149  */
  150 static int
  151 ar71xx_gpio_oe_is_high(void)
  152 {
  153         switch (ar71xx_soc) {
  154         case AR71XX_SOC_AR9341:
  155         case AR71XX_SOC_AR9342:
  156         case AR71XX_SOC_AR9344:
  157         case AR71XX_SOC_QCA9533:
  158         case AR71XX_SOC_QCA9533_V2:
  159                 return 0;
  160         default:
  161                 return 1;
  162         }
  163 }
  164 
  165 static void
  166 ar71xx_gpio_oe_set_output(struct ar71xx_gpio_softc *sc, int b)
  167 {
  168         uint32_t mask;
  169 
  170         mask = 1 << b;
  171 
  172         if (ar71xx_gpio_oe_is_high())
  173                 GPIO_SET_BITS(sc, AR71XX_GPIO_OE, mask);
  174         else
  175                 GPIO_CLEAR_BITS(sc, AR71XX_GPIO_OE, mask);
  176 }
  177 
  178 static void
  179 ar71xx_gpio_oe_set_input(struct ar71xx_gpio_softc *sc, int b)
  180 {
  181         uint32_t mask;
  182 
  183         mask = 1 << b;
  184 
  185         if (ar71xx_gpio_oe_is_high())
  186                 GPIO_CLEAR_BITS(sc, AR71XX_GPIO_OE, mask);
  187         else
  188                 GPIO_SET_BITS(sc, AR71XX_GPIO_OE, mask);
  189 }
  190 
  191 static void
  192 ar71xx_gpio_pin_configure(struct ar71xx_gpio_softc *sc, struct gpio_pin *pin,
  193     unsigned int flags)
  194 {
  195 
  196         /*
  197          * Manage input/output
  198          */
  199         if (flags & (GPIO_PIN_INPUT|GPIO_PIN_OUTPUT)) {
  200                 pin->gp_flags &= ~(GPIO_PIN_INPUT|GPIO_PIN_OUTPUT);
  201                 if (flags & GPIO_PIN_OUTPUT) {
  202                         pin->gp_flags |= GPIO_PIN_OUTPUT;
  203                         ar71xx_gpio_oe_set_output(sc, pin->gp_pin);
  204                 } else {
  205                         pin->gp_flags |= GPIO_PIN_INPUT;
  206                         ar71xx_gpio_oe_set_input(sc, pin->gp_pin);
  207                 }
  208         }
  209 }
  210 
  211 static device_t
  212 ar71xx_gpio_get_bus(device_t dev)
  213 {
  214         struct ar71xx_gpio_softc *sc;
  215 
  216         sc = device_get_softc(dev);
  217 
  218         return (sc->busdev);
  219 }
  220 
  221 static int
  222 ar71xx_gpio_pin_max(device_t dev, int *maxpin)
  223 {
  224 
  225         switch (ar71xx_soc) {
  226                 case AR71XX_SOC_AR9130:
  227                 case AR71XX_SOC_AR9132:
  228                         *maxpin = AR91XX_GPIO_PINS - 1;
  229                         break;
  230                 case AR71XX_SOC_AR7240:
  231                 case AR71XX_SOC_AR7242:
  232                         *maxpin = AR724X_GPIO_PINS - 1;
  233                         break;
  234                 case AR71XX_SOC_AR7241:
  235                         *maxpin = AR7241_GPIO_PINS - 1;
  236                         break;
  237                 case AR71XX_SOC_AR9330:
  238                 case AR71XX_SOC_AR9331:
  239                         *maxpin = AR933X_GPIO_COUNT - 1;
  240                         break;
  241                 case AR71XX_SOC_AR9341:
  242                 case AR71XX_SOC_AR9342:
  243                 case AR71XX_SOC_AR9344:
  244                         *maxpin = AR934X_GPIO_COUNT - 1;
  245                         break;
  246                 case AR71XX_SOC_QCA9533:
  247                 case AR71XX_SOC_QCA9533_V2:
  248                         *maxpin = QCA953X_GPIO_COUNT - 1;
  249                         break;
  250                 case AR71XX_SOC_QCA9556:
  251                 case AR71XX_SOC_QCA9558:
  252                         *maxpin = QCA955X_GPIO_COUNT - 1;
  253                         break;
  254                 default:
  255                         *maxpin = AR71XX_GPIO_PINS - 1;
  256         }
  257         return (0);
  258 }
  259 
  260 static int
  261 ar71xx_gpio_pin_getcaps(device_t dev, uint32_t pin, uint32_t *caps)
  262 {
  263         struct ar71xx_gpio_softc *sc = device_get_softc(dev);
  264         int i;
  265 
  266         for (i = 0; i < sc->gpio_npins; i++) {
  267                 if (sc->gpio_pins[i].gp_pin == pin)
  268                         break;
  269         }
  270 
  271         if (i >= sc->gpio_npins)
  272                 return (EINVAL);
  273 
  274         GPIO_LOCK(sc);
  275         *caps = sc->gpio_pins[i].gp_caps;
  276         GPIO_UNLOCK(sc);
  277 
  278         return (0);
  279 }
  280 
  281 static int
  282 ar71xx_gpio_pin_getflags(device_t dev, uint32_t pin, uint32_t *flags)
  283 {
  284         struct ar71xx_gpio_softc *sc = device_get_softc(dev);
  285         int i;
  286 
  287         for (i = 0; i < sc->gpio_npins; i++) {
  288                 if (sc->gpio_pins[i].gp_pin == pin)
  289                         break;
  290         }
  291 
  292         if (i >= sc->gpio_npins)
  293                 return (EINVAL);
  294 
  295         GPIO_LOCK(sc);
  296         *flags = sc->gpio_pins[i].gp_flags;
  297         GPIO_UNLOCK(sc);
  298 
  299         return (0);
  300 }
  301 
  302 static int
  303 ar71xx_gpio_pin_getname(device_t dev, uint32_t pin, char *name)
  304 {
  305         struct ar71xx_gpio_softc *sc = device_get_softc(dev);
  306         int i;
  307 
  308         for (i = 0; i < sc->gpio_npins; i++) {
  309                 if (sc->gpio_pins[i].gp_pin == pin)
  310                         break;
  311         }
  312 
  313         if (i >= sc->gpio_npins)
  314                 return (EINVAL);
  315 
  316         GPIO_LOCK(sc);
  317         memcpy(name, sc->gpio_pins[i].gp_name, GPIOMAXNAME);
  318         GPIO_UNLOCK(sc);
  319 
  320         return (0);
  321 }
  322 
  323 static int
  324 ar71xx_gpio_pin_setflags(device_t dev, uint32_t pin, uint32_t flags)
  325 {
  326         int i;
  327         struct ar71xx_gpio_softc *sc = device_get_softc(dev);
  328 
  329         for (i = 0; i < sc->gpio_npins; i++) {
  330                 if (sc->gpio_pins[i].gp_pin == pin)
  331                         break;
  332         }
  333 
  334         if (i >= sc->gpio_npins)
  335                 return (EINVAL);
  336 
  337         ar71xx_gpio_pin_configure(sc, &sc->gpio_pins[i], flags);
  338 
  339         return (0);
  340 }
  341 
  342 static int
  343 ar71xx_gpio_pin_set(device_t dev, uint32_t pin, unsigned int value)
  344 {
  345         struct ar71xx_gpio_softc *sc = device_get_softc(dev);
  346         int i;
  347 
  348         for (i = 0; i < sc->gpio_npins; i++) {
  349                 if (sc->gpio_pins[i].gp_pin == pin)
  350                         break;
  351         }
  352 
  353         if (i >= sc->gpio_npins)
  354                 return (EINVAL);
  355 
  356         if (value)
  357                 GPIO_WRITE(sc, AR71XX_GPIO_SET, (1 << pin));
  358         else
  359                 GPIO_WRITE(sc, AR71XX_GPIO_CLEAR, (1 << pin));
  360 
  361         return (0);
  362 }
  363 
  364 static int
  365 ar71xx_gpio_pin_get(device_t dev, uint32_t pin, unsigned int *val)
  366 {
  367         struct ar71xx_gpio_softc *sc = device_get_softc(dev);
  368         int i;
  369 
  370         for (i = 0; i < sc->gpio_npins; i++) {
  371                 if (sc->gpio_pins[i].gp_pin == pin)
  372                         break;
  373         }
  374 
  375         if (i >= sc->gpio_npins)
  376                 return (EINVAL);
  377 
  378         *val = (GPIO_READ(sc, AR71XX_GPIO_IN) & (1 << pin)) ? 1 : 0;
  379 
  380         return (0);
  381 }
  382 
  383 static int
  384 ar71xx_gpio_pin_toggle(device_t dev, uint32_t pin)
  385 {
  386         int res, i;
  387         struct ar71xx_gpio_softc *sc = device_get_softc(dev);
  388 
  389         for (i = 0; i < sc->gpio_npins; i++) {
  390                 if (sc->gpio_pins[i].gp_pin == pin)
  391                         break;
  392         }
  393 
  394         if (i >= sc->gpio_npins)
  395                 return (EINVAL);
  396 
  397         res = (GPIO_READ(sc, AR71XX_GPIO_IN) & (1 << pin)) ? 1 : 0;
  398         if (res)
  399                 GPIO_WRITE(sc, AR71XX_GPIO_CLEAR, (1 << pin));
  400         else
  401                 GPIO_WRITE(sc, AR71XX_GPIO_SET, (1 << pin));
  402 
  403         return (0);
  404 }
  405 
  406 static int
  407 ar71xx_gpio_filter(void *arg)
  408 {
  409 
  410         /* TODO: something useful */
  411         return (FILTER_STRAY);
  412 }
  413 
  414 static void
  415 ar71xx_gpio_intr(void *arg)
  416 {
  417         struct ar71xx_gpio_softc *sc = arg;
  418         GPIO_LOCK(sc);
  419         /* TODO: something useful */
  420         GPIO_UNLOCK(sc);
  421 }
  422 
  423 static int
  424 ar71xx_gpio_probe(device_t dev)
  425 {
  426 
  427         device_set_desc(dev, "Atheros AR71XX GPIO driver");
  428         return (0);
  429 }
  430 
  431 static int
  432 ar71xx_gpio_attach(device_t dev)
  433 {
  434         struct ar71xx_gpio_softc *sc = device_get_softc(dev);
  435         int i, j, maxpin;
  436         int mask, pinon;
  437         uint32_t oe;
  438 
  439         KASSERT((device_get_unit(dev) == 0),
  440             ("ar71xx_gpio: Only one gpio module supported"));
  441 
  442         mtx_init(&sc->gpio_mtx, device_get_nameunit(dev), NULL, MTX_DEF);
  443 
  444         /* Map control/status registers. */
  445         sc->gpio_mem_rid = 0;
  446         sc->gpio_mem_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY,
  447             &sc->gpio_mem_rid, RF_ACTIVE);
  448 
  449         if (sc->gpio_mem_res == NULL) {
  450                 device_printf(dev, "couldn't map memory\n");
  451                 ar71xx_gpio_detach(dev);
  452                 return (ENXIO);
  453         }
  454 
  455         if ((sc->gpio_irq_res = bus_alloc_resource_any(dev, SYS_RES_IRQ, 
  456             &sc->gpio_irq_rid, RF_SHAREABLE | RF_ACTIVE)) == NULL) {
  457                 device_printf(dev, "unable to allocate IRQ resource\n");
  458                 ar71xx_gpio_detach(dev);
  459                 return (ENXIO);
  460         }
  461 
  462         if ((bus_setup_intr(dev, sc->gpio_irq_res, INTR_TYPE_MISC, 
  463             ar71xx_gpio_filter, ar71xx_gpio_intr, sc, &sc->gpio_ih))) {
  464                 device_printf(dev,
  465                     "WARNING: unable to register interrupt handler\n");
  466                 ar71xx_gpio_detach(dev);
  467                 return (ENXIO);
  468         }
  469 
  470         sc->dev = dev;
  471 
  472         /* Enable function bits that are required */
  473         if (resource_int_value(device_get_name(dev), device_get_unit(dev),
  474             "function_set", &mask) == 0) {
  475                 device_printf(dev, "function_set: 0x%x\n", mask);
  476                 ar71xx_gpio_function_enable(sc, mask);
  477         }
  478         /* Disable function bits that are required */
  479         if (resource_int_value(device_get_name(dev), device_get_unit(dev),
  480             "function_clear", &mask) == 0) {
  481                 device_printf(dev, "function_clear: 0x%x\n", mask);
  482                 ar71xx_gpio_function_disable(sc, mask);
  483         }
  484 
  485         /* Disable interrupts for all pins. */
  486         GPIO_WRITE(sc, AR71XX_GPIO_INT_MASK, 0);
  487 
  488         /* Initialise all pins specified in the mask, up to the pin count */
  489         (void) ar71xx_gpio_pin_max(dev, &maxpin);
  490         if (resource_int_value(device_get_name(dev), device_get_unit(dev),
  491             "pinmask", &mask) != 0)
  492                 mask = 0;
  493         if (resource_int_value(device_get_name(dev), device_get_unit(dev),
  494             "pinon", &pinon) != 0)
  495                 pinon = 0;
  496         device_printf(dev, "gpio pinmask=0x%x\n", mask);
  497         for (j = 0; j <= maxpin; j++) {
  498                 if ((mask & (1 << j)) == 0)
  499                         continue;
  500                 sc->gpio_npins++;
  501         }
  502         /* Iniatilize the GPIO pins, keep the loader settings. */
  503         oe = GPIO_READ(sc, AR71XX_GPIO_OE);
  504         /*
  505          * For AR934x and QCA953x, the meaning of oe is inverted;
  506          * so flip it the right way around so we can parse the GPIO
  507          * state.
  508          */
  509         if (!ar71xx_gpio_oe_is_high())
  510                 oe = ~oe;
  511 
  512         sc->gpio_pins = malloc(sizeof(*sc->gpio_pins) * sc->gpio_npins,
  513             M_DEVBUF, M_WAITOK | M_ZERO);
  514         for (i = 0, j = 0; j <= maxpin; j++) {
  515                 if ((mask & (1 << j)) == 0)
  516                         continue;
  517                 snprintf(sc->gpio_pins[i].gp_name, GPIOMAXNAME,
  518                     "pin %d", j);
  519                 sc->gpio_pins[i].gp_pin = j;
  520                 sc->gpio_pins[i].gp_caps = DEFAULT_CAPS;
  521                 if (oe & (1 << j))
  522                         sc->gpio_pins[i].gp_flags = GPIO_PIN_OUTPUT;
  523                 else
  524                         sc->gpio_pins[i].gp_flags = GPIO_PIN_INPUT;
  525                 i++;
  526         }
  527 
  528         /* Turn on the hinted pins. */
  529         for (i = 0; i < sc->gpio_npins; i++) {
  530                 j = sc->gpio_pins[i].gp_pin;
  531                 if ((pinon & (1 << j)) != 0) {
  532                         ar71xx_gpio_pin_setflags(dev, j, GPIO_PIN_OUTPUT);
  533                         ar71xx_gpio_pin_set(dev, j, 1);
  534                 }
  535         }
  536 
  537         /*
  538          * Search through the function hints, in case there's some
  539          * overrides such as LNA control.
  540          *
  541          * hint.gpio.X.func.<pin>.gpiofunc=<func value>
  542          * hint.gpio.X.func.<pin>.gpiomode=1 (for output, default low)
  543          */
  544         for (i = 0; i <= maxpin; i++) {
  545                 char buf[32];
  546                 int gpiofunc, gpiomode;
  547 
  548                 snprintf(buf, 32, "func.%d.gpiofunc", i);
  549                 if (resource_int_value(device_get_name(dev),
  550                     device_get_unit(dev),
  551                     buf,
  552                     &gpiofunc) != 0)
  553                         continue;
  554                 /* Get the mode too */
  555                 snprintf(buf, 32, "func.%d.gpiomode", i);
  556                 if (resource_int_value(device_get_name(dev),
  557                     device_get_unit(dev),
  558                     buf,
  559                     &gpiomode) != 0)
  560                         continue;
  561 
  562                 /* We only handle mode=1 (output) for now */
  563                 if (gpiomode != 1)
  564                         continue;
  565 
  566                 device_printf(dev, "%s: GPIO %d: func=%d, mode=%d\n",
  567                     __func__,
  568                     i,
  569                     gpiofunc,
  570                     gpiomode);
  571 
  572                 /* Set pin value = 0, so it stays low by default */
  573                 oe = GPIO_READ(sc, AR71XX_GPIO_OUT);
  574                 oe &= ~ (1 << i);
  575                 GPIO_WRITE(sc, AR71XX_GPIO_OUT, oe);
  576 
  577                 /* Set output */
  578                 ar71xx_gpio_oe_set_output(sc, i);
  579 
  580                 /* Finally: Set the output config */
  581                 ar71xx_gpio_ouput_configure(i, gpiofunc);
  582         }
  583 
  584         sc->busdev = gpiobus_attach_bus(dev);
  585         if (sc->busdev == NULL) {
  586                 ar71xx_gpio_detach(dev);
  587                 return (ENXIO);
  588         }
  589 
  590         return (0);
  591 }
  592 
  593 static int
  594 ar71xx_gpio_detach(device_t dev)
  595 {
  596         struct ar71xx_gpio_softc *sc = device_get_softc(dev);
  597 
  598         KASSERT(mtx_initialized(&sc->gpio_mtx), ("gpio mutex not initialized"));
  599 
  600         gpiobus_detach_bus(dev);
  601         if (sc->gpio_ih)
  602                 bus_teardown_intr(dev, sc->gpio_irq_res, sc->gpio_ih);
  603         if (sc->gpio_irq_res)
  604                 bus_release_resource(dev, SYS_RES_IRQ, sc->gpio_irq_rid,
  605                     sc->gpio_irq_res);
  606         if (sc->gpio_mem_res)
  607                 bus_release_resource(dev, SYS_RES_MEMORY, sc->gpio_mem_rid,
  608                     sc->gpio_mem_res);
  609         if (sc->gpio_pins)
  610                 free(sc->gpio_pins, M_DEVBUF);
  611         mtx_destroy(&sc->gpio_mtx);
  612 
  613         return(0);
  614 }
  615 
  616 static device_method_t ar71xx_gpio_methods[] = {
  617         DEVMETHOD(device_probe, ar71xx_gpio_probe),
  618         DEVMETHOD(device_attach, ar71xx_gpio_attach),
  619         DEVMETHOD(device_detach, ar71xx_gpio_detach),
  620 
  621         /* GPIO protocol */
  622         DEVMETHOD(gpio_get_bus, ar71xx_gpio_get_bus),
  623         DEVMETHOD(gpio_pin_max, ar71xx_gpio_pin_max),
  624         DEVMETHOD(gpio_pin_getname, ar71xx_gpio_pin_getname),
  625         DEVMETHOD(gpio_pin_getflags, ar71xx_gpio_pin_getflags),
  626         DEVMETHOD(gpio_pin_getcaps, ar71xx_gpio_pin_getcaps),
  627         DEVMETHOD(gpio_pin_setflags, ar71xx_gpio_pin_setflags),
  628         DEVMETHOD(gpio_pin_get, ar71xx_gpio_pin_get),
  629         DEVMETHOD(gpio_pin_set, ar71xx_gpio_pin_set),
  630         DEVMETHOD(gpio_pin_toggle, ar71xx_gpio_pin_toggle),
  631         {0, 0},
  632 };
  633 
  634 static driver_t ar71xx_gpio_driver = {
  635         "gpio",
  636         ar71xx_gpio_methods,
  637         sizeof(struct ar71xx_gpio_softc),
  638 };
  639 static devclass_t ar71xx_gpio_devclass;
  640 
  641 DRIVER_MODULE(ar71xx_gpio, apb, ar71xx_gpio_driver, ar71xx_gpio_devclass, 0, 0);
Cache object: 010962a742e9e14b86ca7bb94e9b9e94
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FreeBSD/Linux Kernel Cross Reference sys/mips/atheros/ar71xx_gpio.c

FreeBSD/Linux Kernel Cross Reference
sys/mips/atheros/ar71xx_gpio.c
