The Design and Implementation of the FreeBSD Operating System, Second Edition
Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)


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FreeBSD/Linux Kernel Cross Reference
sys/mips/atheros/ar71xx_ohci.c

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    1 /*-
    2  * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
    3  *
    4  * Copyright (c) 2009, Oleksandr Tymoshenko <gonzo@FreeBSD.org>
    5  * All rights reserved.
    6  *
    7  * Redistribution and use in source and binary forms, with or without
    8  * modification, are permitted provided that the following conditions
    9  * are met:
   10  * 1. Redistributions of source code must retain the above copyright
   11  *    notice unmodified, this list of conditions, and the following
   12  *    disclaimer.
   13  * 2. Redistributions in binary form must reproduce the above copyright
   14  *    notice, this list of conditions and the following disclaimer in the
   15  *    documentation and/or other materials provided with the distribution.
   16  *
   17  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
   18  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
   19  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
   20  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
   21  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
   22  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
   23  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
   24  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
   25  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
   26  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
   27  * SUCH DAMAGE.
   28  */
   29 
   30 #include <sys/cdefs.h>
   31 __FBSDID("$FreeBSD: stable/12/sys/mips/atheros/ar71xx_ohci.c 326259 2017-11-27 15:07:26Z pfg $");
   32 
   33 #include <sys/param.h>
   34 #include <sys/systm.h>
   35 #include <sys/bus.h>
   36 #include <sys/rman.h>
   37 #include <sys/condvar.h>
   38 #include <sys/kernel.h>
   39 #include <sys/module.h>
   40 
   41 #include <dev/usb/usb.h>
   42 #include <dev/usb/usbdi.h>
   43 
   44 #include <dev/usb/usb_core.h>
   45 #include <dev/usb/usb_busdma.h>
   46 #include <dev/usb/usb_process.h>
   47 #include <dev/usb/usb_util.h>
   48 
   49 #include <dev/usb/usb_controller.h>
   50 #include <dev/usb/usb_bus.h>
   51 #include <dev/usb/controller/ohci.h>
   52 #include <dev/usb/controller/ohcireg.h>
   53 
   54 #include <mips/atheros/ar71xxreg.h> /* for stuff in ar71xx_cpudef.h */
   55 #include <mips/atheros/ar71xx_cpudef.h>
   56 
   57 static int ar71xx_ohci_attach(device_t dev);
   58 static int ar71xx_ohci_detach(device_t dev);
   59 static int ar71xx_ohci_probe(device_t dev);
   60 
   61 struct ar71xx_ohci_softc
   62 {
   63         struct ohci_softc sc_ohci;
   64 };
   65 
   66 static int
   67 ar71xx_ohci_probe(device_t dev)
   68 {
   69         device_set_desc(dev, "AR71XX integrated OHCI controller");
   70         return (BUS_PROBE_DEFAULT);
   71 }
   72 
   73 static void
   74 ar71xx_ohci_intr(void *arg)
   75 {
   76 
   77         /* XXX TODO: should really see if this was our interrupt.. */
   78         ar71xx_device_flush_ddr(AR71XX_CPU_DDR_FLUSH_USB);
   79         ohci_interrupt(arg);
   80 }
   81 
   82 
   83 static int
   84 ar71xx_ohci_attach(device_t dev)
   85 {
   86         struct ar71xx_ohci_softc *sc = device_get_softc(dev);
   87         int err;
   88         int rid;
   89 
   90         /* initialise some bus fields */
   91         sc->sc_ohci.sc_bus.parent = dev;
   92         sc->sc_ohci.sc_bus.devices = sc->sc_ohci.sc_devices;
   93         sc->sc_ohci.sc_bus.devices_max = OHCI_MAX_DEVICES;
   94         sc->sc_ohci.sc_bus.dma_bits = 32;
   95 
   96         /* get all DMA memory */
   97         if (usb_bus_mem_alloc_all(&sc->sc_ohci.sc_bus,
   98             USB_GET_DMA_TAG(dev), &ohci_iterate_hw_softc)) {
   99                 return (ENOMEM);
  100         }
  101 
  102         sc->sc_ohci.sc_dev = dev;
  103 
  104         rid = 0;
  105         sc->sc_ohci.sc_io_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid,
  106             RF_ACTIVE);
  107         if (sc->sc_ohci.sc_io_res == NULL) {
  108                 err = ENOMEM;
  109                 goto error;
  110         }
  111         sc->sc_ohci.sc_io_tag = rman_get_bustag(sc->sc_ohci.sc_io_res);
  112         sc->sc_ohci.sc_io_hdl = rman_get_bushandle(sc->sc_ohci.sc_io_res);
  113         sc->sc_ohci.sc_io_size = rman_get_size(sc->sc_ohci.sc_io_res);
  114 
  115         rid = 0;
  116         sc->sc_ohci.sc_irq_res = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid,
  117             RF_ACTIVE);
  118         if (sc->sc_ohci.sc_irq_res == NULL) {
  119                 err = ENOMEM;
  120                 goto error;
  121         }
  122         sc->sc_ohci.sc_bus.bdev = device_add_child(dev, "usbus", -1);
  123         if (sc->sc_ohci.sc_bus.bdev == NULL) {
  124                 err = ENOMEM;
  125                 goto error;
  126         }
  127         device_set_ivars(sc->sc_ohci.sc_bus.bdev, &sc->sc_ohci.sc_bus);
  128 
  129         err = bus_setup_intr(dev, sc->sc_ohci.sc_irq_res, 
  130             INTR_TYPE_BIO | INTR_MPSAFE, NULL, 
  131             ar71xx_ohci_intr, sc, &sc->sc_ohci.sc_intr_hdl);
  132         if (err) {
  133                 err = ENXIO;
  134                 goto error;
  135         }
  136 
  137         strlcpy(sc->sc_ohci.sc_vendor, "Atheros", sizeof(sc->sc_ohci.sc_vendor));
  138 
  139         bus_space_write_4(sc->sc_ohci.sc_io_tag, sc->sc_ohci.sc_io_hdl, OHCI_CONTROL, 0);
  140 
  141         err = ohci_init(&sc->sc_ohci);
  142         if (!err)
  143                 err = device_probe_and_attach(sc->sc_ohci.sc_bus.bdev);
  144 
  145         if (err)
  146                 goto error;
  147         return (0);
  148 
  149 error:
  150         if (err) {
  151                 ar71xx_ohci_detach(dev);
  152                 return (err);
  153         }
  154         return (err);
  155 }
  156 
  157 static int
  158 ar71xx_ohci_detach(device_t dev)
  159 {
  160         struct ar71xx_ohci_softc *sc = device_get_softc(dev);
  161 
  162         /* during module unload there are lots of children leftover */
  163         device_delete_children(dev);
  164 
  165         /*
  166          * Put the controller into reset, then disable clocks and do
  167          * the MI tear down.  We have to disable the clocks/hardware
  168          * after we do the rest of the teardown.  We also disable the
  169          * clocks in the opposite order we acquire them, but that
  170          * doesn't seem to be absolutely necessary.  We free up the
  171          * clocks after we disable them, so the system could, in
  172          * theory, reuse them.
  173          */
  174         bus_space_write_4(sc->sc_ohci.sc_io_tag, sc->sc_ohci.sc_io_hdl,
  175             OHCI_CONTROL, 0);
  176 
  177         if (sc->sc_ohci.sc_intr_hdl) {
  178                 bus_teardown_intr(dev, sc->sc_ohci.sc_irq_res, sc->sc_ohci.sc_intr_hdl);
  179                 sc->sc_ohci.sc_intr_hdl = NULL;
  180         }
  181 
  182         if (sc->sc_ohci.sc_irq_res && sc->sc_ohci.sc_intr_hdl) {
  183                 /*
  184                  * only call ohci_detach() after ohci_init()
  185                  */
  186                 ohci_detach(&sc->sc_ohci);
  187 
  188                 bus_release_resource(dev, SYS_RES_IRQ, 0, sc->sc_ohci.sc_irq_res);
  189                 sc->sc_ohci.sc_irq_res = NULL;
  190         }
  191         if (sc->sc_ohci.sc_io_res) {
  192                 bus_release_resource(dev, SYS_RES_MEMORY, 0, sc->sc_ohci.sc_io_res);
  193                 sc->sc_ohci.sc_io_res = NULL;
  194                 sc->sc_ohci.sc_io_tag = 0;
  195                 sc->sc_ohci.sc_io_hdl = 0;
  196         }
  197         usb_bus_mem_free_all(&sc->sc_ohci.sc_bus, &ohci_iterate_hw_softc);
  198 
  199         return (0);
  200 }
  201 
  202 static device_method_t ohci_methods[] = {
  203         /* Device interface */
  204         DEVMETHOD(device_probe, ar71xx_ohci_probe),
  205         DEVMETHOD(device_attach, ar71xx_ohci_attach),
  206         DEVMETHOD(device_detach, ar71xx_ohci_detach),
  207         DEVMETHOD(device_suspend, bus_generic_suspend),
  208         DEVMETHOD(device_resume, bus_generic_resume),
  209         DEVMETHOD(device_shutdown, bus_generic_shutdown),
  210 
  211         DEVMETHOD_END
  212 };
  213 
  214 static driver_t ohci_driver = {
  215         .name = "ohci",
  216         .methods = ohci_methods,
  217         .size = sizeof(struct ar71xx_ohci_softc),
  218 };
  219 
  220 static devclass_t ohci_devclass;
  221 
  222 DRIVER_MODULE(ohci, apb, ohci_driver, ohci_devclass, 0, 0);

Cache object: 7517d823d00ce13e5000fb513d1cb680


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