The Design and Implementation of the FreeBSD Operating System, Second Edition
Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)


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FreeBSD/Linux Kernel Cross Reference
sys/mips/atheros/ar724x_chip.c

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    1 /*-
    2  * Copyright (c) 2010 Adrian Chadd
    3  * All rights reserved.
    4  *
    5  * Redistribution and use in source and binary forms, with or without
    6  * modification, are permitted provided that the following conditions
    7  * are met:
    8  * 1. Redistributions of source code must retain the above copyright
    9  *    notice, this list of conditions and the following disclaimer.
   10  * 2. Redistributions in binary form must reproduce the above copyright
   11  *    notice, this list of conditions and the following disclaimer in the
   12  *    documentation and/or other materials provided with the distribution.
   13  *
   14  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
   15  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
   16  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
   17  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
   18  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
   19  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
   20  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
   21  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
   22  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
   23  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
   24  * SUCH DAMAGE.
   25  */
   26 
   27 #include <sys/cdefs.h>
   28 __FBSDID("$FreeBSD$");
   29 
   30 #include <sys/param.h>
   31 #include <machine/cpuregs.h>
   32 
   33 #include <mips/sentry5/s5reg.h>
   34 
   35 #include "opt_ddb.h"
   36 
   37 #include <sys/param.h>
   38 #include <sys/conf.h>
   39 #include <sys/kernel.h>
   40 #include <sys/systm.h>
   41 #include <sys/bus.h>
   42 #include <sys/cons.h>
   43 #include <sys/kdb.h>
   44 #include <sys/reboot.h>
   45  
   46 #include <vm/vm.h>
   47 #include <vm/vm_page.h>
   48  
   49 #include <net/ethernet.h>
   50  
   51 #include <machine/clock.h>
   52 #include <machine/cpu.h>
   53 #include <machine/hwfunc.h>
   54 #include <machine/md_var.h>
   55 #include <machine/trap.h>
   56 #include <machine/vmparam.h>
   57  
   58 #include <mips/atheros/ar71xxreg.h>
   59 #include <mips/atheros/ar724xreg.h>
   60 
   61 #include <mips/atheros/ar71xx_cpudef.h>
   62 #include <mips/atheros/ar724x_chip.h>
   63 
   64 static void
   65 ar724x_chip_detect_mem_size(void)
   66 {
   67 }
   68 
   69 static void
   70 ar724x_chip_detect_sys_frequency(void)
   71 {
   72         uint32_t pll;
   73         uint32_t freq;
   74         uint32_t div;
   75          
   76         pll = ATH_READ_REG(AR724X_PLL_REG_CPU_CONFIG);
   77         
   78         div = ((pll >> AR724X_PLL_DIV_SHIFT) & AR724X_PLL_DIV_MASK);
   79         freq = div * AR724X_BASE_FREQ;
   80 
   81         div = ((pll >> AR724X_PLL_REF_DIV_SHIFT) & AR724X_PLL_REF_DIV_MASK);
   82         freq *= div;
   83         
   84         u_ar71xx_cpu_freq = freq;
   85         
   86         div = ((pll >> AR724X_DDR_DIV_SHIFT) & AR724X_DDR_DIV_MASK) + 1;
   87         u_ar71xx_ddr_freq = freq / div;
   88         
   89         div = (((pll >> AR724X_AHB_DIV_SHIFT) & AR724X_AHB_DIV_MASK) + 1) * 2;
   90         u_ar71xx_ahb_freq = u_ar71xx_cpu_freq / div;
   91 }
   92 
   93 static void
   94 ar724x_chip_device_stop(uint32_t mask)
   95 {
   96         uint32_t mask_inv, reg;
   97 
   98         mask_inv = mask & AR724X_RESET_MODULE_USB_OHCI_DLL;
   99         reg = ATH_READ_REG(AR724X_RESET_REG_RESET_MODULE);
  100         reg |= mask;
  101         reg &= ~mask_inv;
  102         ATH_WRITE_REG(AR724X_RESET_REG_RESET_MODULE, reg);
  103 }
  104 
  105 static void
  106 ar724x_chip_device_start(uint32_t mask)
  107 {
  108         uint32_t mask_inv, reg;
  109 
  110         mask_inv = mask & AR724X_RESET_MODULE_USB_OHCI_DLL;
  111         reg = ATH_READ_REG(AR724X_RESET_REG_RESET_MODULE);
  112         reg &= ~mask;
  113         reg |= mask_inv;
  114         ATH_WRITE_REG(AR724X_RESET_REG_RESET_MODULE, reg);
  115 }
  116 
  117 static int
  118 ar724x_chip_device_stopped(uint32_t mask)
  119 {
  120         uint32_t reg;
  121 
  122         reg = ATH_READ_REG(AR724X_RESET_REG_RESET_MODULE);
  123         return ((reg & mask) == mask);
  124 }
  125 
  126 static void
  127 ar724x_chip_set_pll_ge0(int speed)
  128 {
  129 }
  130 
  131 static void
  132 ar724x_chip_set_pll_ge1(int speed)
  133 {
  134 }
  135 
  136 static void
  137 ar724x_chip_ddr_flush_ge0(void)
  138 {
  139 }
  140 
  141 static void
  142 ar724x_chip_ddr_flush_ge1(void)
  143 {
  144 }
  145 
  146 static uint32_t
  147 ar724x_chip_get_eth_pll(unsigned int mac, int speed)
  148 {
  149         return 0;
  150 }
  151 
  152 struct ar71xx_cpu_def ar724x_chip_def = {
  153         &ar724x_chip_detect_mem_size,
  154         &ar724x_chip_detect_sys_frequency,
  155         &ar724x_chip_device_stop,
  156         &ar724x_chip_device_start,
  157         &ar724x_chip_device_stopped,
  158         &ar724x_chip_set_pll_ge0,
  159         &ar724x_chip_set_pll_ge1,
  160         &ar724x_chip_ddr_flush_ge0,
  161         &ar724x_chip_ddr_flush_ge1,
  162         &ar724x_chip_get_eth_pll,
  163         NULL,           /* ar71xx_chip_irq_flush_ip2 */
  164         NULL            /* ar71xx_chip_init_usb_peripheral */
  165 };

Cache object: 265df61d511c5c9976030f71c4f0d027


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