The Design and Implementation of the FreeBSD Operating System, Second Edition
Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)


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FreeBSD/Linux Kernel Cross Reference
sys/mips/atheros/ar91xxreg.h

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    1 /*-
    2  * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
    3  *
    4  * Copyright (c) 2010 Adrian Chadd
    5  * All rights reserved.
    6  *
    7  * Redistribution and use in source and binary forms, with or without
    8  * modification, are permitted provided that the following conditions
    9  * are met:
   10  * 1. Redistributions of source code must retain the above copyright
   11  *    notice, this list of conditions and the following disclaimer.
   12  * 2. Redistributions in binary form must reproduce the above copyright
   13  *    notice, this list of conditions and the following disclaimer in the
   14  *    documentation and/or other materials provided with the distribution.
   15  *
   16  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
   17  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
   18  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
   19  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
   20  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
   21  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
   22  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
   23  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
   24  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
   25  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
   26  * SUCH DAMAGE.
   27  */
   28 
   29 /* $FreeBSD: stable/12/sys/mips/atheros/ar91xxreg.h 326259 2017-11-27 15:07:26Z pfg $ */
   30 
   31 #ifndef __AR91XX_REG_H__
   32 #define __AR91XX_REG_H__
   33 
   34 #define AR91XX_BASE_FREQ                5000000
   35 
   36 /* reset block */
   37 #define AR91XX_RESET_REG_RESET_MODULE   AR71XX_RST_BLOCK_BASE + 0x1c
   38 
   39 #define AR91XX_RST_RESET_MODULE_USBSUS_OVERRIDE (1 << 10)
   40 #define AR91XX_RST_RESET_MODULE_AMBA2WMAC       (1 << 22)
   41 
   42 /* PLL block */
   43 #define AR91XX_PLL_REG_CPU_CONFIG       AR71XX_PLL_CPU_BASE + 0x00
   44 #define AR91XX_PLL_REG_ETH_CONFIG       AR71XX_PLL_CPU_BASE + 0x04
   45 #define AR91XX_PLL_REG_ETH0_INT_CLOCK   AR71XX_PLL_CPU_BASE + 0x14
   46 #define AR91XX_PLL_REG_ETH1_INT_CLOCK   AR71XX_PLL_CPU_BASE + 0x18
   47 
   48 #define AR91XX_PLL_DIV_SHIFT            0
   49 #define AR91XX_PLL_DIV_MASK             0x3ff
   50 #define AR91XX_DDR_DIV_SHIFT            22
   51 #define AR91XX_DDR_DIV_MASK             0x3
   52 #define AR91XX_AHB_DIV_SHIFT            19
   53 #define AR91XX_AHB_DIV_MASK             0x1
   54 
   55 #define AR91XX_ETH0_PLL_SHIFT           20
   56 #define AR91XX_ETH1_PLL_SHIFT           22
   57 
   58 #define AR91XX_PLL_VAL_1000             0x1a000000
   59 #define AR91XX_PLL_VAL_100              0x13000a44
   60 #define AR91XX_PLL_VAL_10               0x00441099
   61 
   62 /* DDR block */
   63 #define AR91XX_DDR_CTRLBASE             (AR71XX_APB_BASE + 0)
   64 #define AR91XX_DDR_CTRL_SIZE            0x10000
   65 #define AR91XX_DDR_REG_FLUSH_GE0        AR91XX_DDR_CTRLBASE + 0x7c
   66 #define AR91XX_DDR_REG_FLUSH_GE1        AR91XX_DDR_CTRLBASE + 0x80
   67 #define AR91XX_DDR_REG_FLUSH_USB        AR91XX_DDR_CTRLBASE + 0x84
   68 #define AR91XX_DDR_REG_FLUSH_WMAC       AR91XX_DDR_CTRLBASE + 0x88
   69 
   70 /* WMAC stuff */
   71 #define AR91XX_WMAC_BASE                (AR71XX_APB_BASE + 0x000C0000)
   72 #define AR91XX_WMAC_SIZE                0x30000
   73 
   74 /* GPIO stuff */
   75 #define AR91XX_GPIO_FUNC_WMAC_LED_EN    (1 << 22)
   76 #define AR91XX_GPIO_FUNC_EXP_PORT_CS_EN (1 << 21)
   77 #define AR91XX_GPIO_FUNC_I2S_REFCLKEN   (1 << 20)
   78 #define AR91XX_GPIO_FUNC_I2S_MCKEN      (1 << 19)
   79 #define AR91XX_GPIO_FUNC_I2S1_EN        (1 << 18)
   80 #define AR91XX_GPIO_FUNC_I2S0_EN        (1 << 17)
   81 #define AR91XX_GPIO_FUNC_SLIC_EN        (1 << 16)
   82 #define AR91XX_GPIO_FUNC_UART_RTSCTS_EN (1 << 9)
   83 #define AR91XX_GPIO_FUNC_UART_EN        (1 << 8)
   84 #define AR91XX_GPIO_FUNC_USB_CLK_EN     (1 << 4)
   85 
   86 #endif

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