The Design and Implementation of the FreeBSD Operating System, Second Edition
Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)


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FreeBSD/Linux Kernel Cross Reference
sys/mips/atheros/ar933x_uart.h

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    1 /*-
    2  * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
    3  *
    4  * Copyright (c) 2012 Adrian Chadd <adrian@FreeBSD.org>
    5  * All rights reserved.
    6  *
    7  * Redistribution and use in source and binary forms, with or without
    8  * modification, are permitted provided that the following conditions
    9  * are met:
   10  * 1. Redistributions of source code must retain the above copyright
   11  *    notice, this list of conditions and the following disclaimer.
   12  * 2. Redistributions in binary form must reproduce the above copyright
   13  *    notice, this list of conditions and the following disclaimer in the
   14  *    documentation and/or other materials provided with the distribution.
   15  *
   16  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
   17  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
   18  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
   19  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
   20  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
   21  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
   22  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
   23  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
   24  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
   25  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
   26  * SUCH DAMAGE.
   27  *
   28  * $FreeBSD: stable/12/sys/mips/atheros/ar933x_uart.h 326259 2017-11-27 15:07:26Z pfg $
   29  */
   30 
   31 /*
   32  *  Atheros AR933x SoC UART registers
   33  */
   34 #ifndef __AR933X_UART_H__
   35 #define __AR933X_UART_H__
   36 
   37 #define AR933X_UART_REGS_SIZE           20
   38 #define AR933X_UART_FIFO_SIZE           16
   39 
   40 #define AR933X_UART_DATA_REG            0x00
   41 #define AR933X_UART_CS_REG              0x04
   42 #define AR933X_UART_CLOCK_REG           0x08
   43 #define AR933X_UART_INT_REG             0x0c
   44 #define AR933X_UART_INT_EN_REG          0x10
   45 
   46 #define AR933X_UART_DATA_TX_RX_MASK     0xff
   47 #define AR933X_UART_DATA_RX_CSR         (1 << 8)
   48 #define AR933X_UART_DATA_TX_CSR         (1 << 9)
   49 
   50 #define AR933X_UART_CS_PARITY_S         0
   51 #define AR933X_UART_CS_PARITY_M         0x3
   52 #define   AR933X_UART_CS_PARITY_NONE    0
   53 #define   AR933X_UART_CS_PARITY_ODD     1
   54 #define   AR933X_UART_CS_PARITY_EVEN    2
   55 #define AR933X_UART_CS_IF_MODE_S        2
   56 #define AR933X_UART_CS_IF_MODE_M        0x3
   57 #define   AR933X_UART_CS_IF_MODE_NONE   0
   58 #define   AR933X_UART_CS_IF_MODE_DTE    1
   59 #define   AR933X_UART_CS_IF_MODE_DCE    2
   60 #define AR933X_UART_CS_FLOW_CTRL_S      4
   61 #define AR933X_UART_CS_FLOW_CTRL_M      0x3
   62 #define AR933X_UART_CS_DMA_EN           (1 << 6)
   63 #define AR933X_UART_CS_TX_READY_ORIDE   (1 << 7)
   64 #define AR933X_UART_CS_RX_READY_ORIDE   (1 << 8)
   65 #define AR933X_UART_CS_TX_READY         (1 << 9)
   66 #define AR933X_UART_CS_RX_BREAK         (1 << 10)
   67 #define AR933X_UART_CS_TX_BREAK         (1 << 11)
   68 #define AR933X_UART_CS_HOST_INT         (1 << 12)
   69 #define AR933X_UART_CS_HOST_INT_EN      (1 << 13)
   70 #define AR933X_UART_CS_TX_BUSY          (1 << 14)
   71 #define AR933X_UART_CS_RX_BUSY          (1 << 15)
   72 
   73 #define AR933X_UART_CLOCK_SCALE_M       0xff
   74 #define AR933X_UART_CLOCK_SCALE_S       16
   75 #define AR933X_UART_CLOCK_STEP_M        0xffff
   76 #define AR933X_UART_CLOCK_STEP_S        0
   77 
   78 #define AR933X_UART_MAX_SCALE           0xff
   79 #define AR933X_UART_MAX_STEP            0xffff
   80 
   81 #define AR933X_UART_INT_RX_VALID        (1 << 0)
   82 #define AR933X_UART_INT_TX_READY        (1 << 1)
   83 #define AR933X_UART_INT_RX_FRAMING_ERR  (1 << 2)
   84 #define AR933X_UART_INT_RX_OFLOW_ERR    (1 << 3)
   85 #define AR933X_UART_INT_TX_OFLOW_ERR    (1 << 4)
   86 #define AR933X_UART_INT_RX_PARITY_ERR   (1 << 5)
   87 #define AR933X_UART_INT_RX_BREAK_ON     (1 << 6)
   88 #define AR933X_UART_INT_RX_BREAK_OFF    (1 << 7)
   89 #define AR933X_UART_INT_RX_FULL         (1 << 8)
   90 #define AR933X_UART_INT_TX_EMPTY        (1 << 9)
   91 #define AR933X_UART_INT_ALLINTS         0x3ff
   92 
   93 #endif /* __AR933X_UART_H__ */

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