The Design and Implementation of the FreeBSD Operating System, Second Edition
Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)


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FreeBSD/Linux Kernel Cross Reference
sys/mips/atheros/ar934x_nfcreg.h

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    1 /*
    2  * Copyright (c) 2014 Adrian Chadd <adrian@FreeBSD.org>.
    3  *  All rights reserved.
    4  *
    5  * Redistribution and use in source and binary forms, with or without
    6  * modification, are permitted provided that the following conditions
    7  * are met:
    8  * 1. Redistributions of source code must retain the above copyright
    9  *    notice, this list of conditions and the following disclaimer.
   10  * 2. Redistributions in binary form must reproduce the above copyright
   11  *    notice, this list of conditions and the following disclaimer in the
   12  *    documentation and/or other materials provided with the distribution.
   13  *
   14  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
   15  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
   16  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
   17  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
   18  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
   19  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
   20  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
   21  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
   22  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
   23  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
   24  * SUCH DAMAGE.
   25  *
   26  * $FreeBSD: releng/11.2/sys/mips/atheros/ar934x_nfcreg.h 263295 2014-03-18 12:18:35Z adrian $
   27  */
   28 /*
   29  * Register definitions for the built-in NAND controller
   30  * of the Atheros AR934x and QCA955x SoCs.
   31  *
   32  * This file is based on the AR934x SoC driver from OpenWRT.
   33  *
   34  * Copyright (C) 2011-2013 Gabor Juhos <juhosg@openwrt.org>
   35  *
   36  * Used with permission.
   37  */
   38 #ifndef __AR934X_NFCREG_H__
   39 #define __AR934X_NFCREG_H__
   40 
   41 #define BIT(x)          (1 << (x))
   42 
   43 #define AR934X_NFC_REG_CMD              0x00
   44 #define AR934X_NFC_REG_CTRL             0x04
   45 #define AR934X_NFC_REG_STATUS           0x08
   46 #define AR934X_NFC_REG_INT_MASK         0x0c
   47 #define AR934X_NFC_REG_INT_STATUS       0x10
   48 #define AR934X_NFC_REG_ECC_CTRL         0x14
   49 #define AR934X_NFC_REG_ECC_OFFSET       0x18
   50 #define AR934X_NFC_REG_ADDR0_0          0x1c
   51 #define AR934X_NFC_REG_ADDR0_1          0x24
   52 #define AR934X_NFC_REG_ADDR1_0          0x20
   53 #define AR934X_NFC_REG_ADDR1_1          0x28
   54 #define AR934X_NFC_REG_SPARE_SIZE       0x30
   55 #define AR934X_NFC_REG_PROTECT          0x38
   56 #define AR934X_NFC_REG_LOOKUP_EN        0x40
   57 #define AR934X_NFC_REG_LOOKUP(_x)       (0x44 + (_i) * 4)
   58 #define AR934X_NFC_REG_DMA_ADDR         0x64
   59 #define AR934X_NFC_REG_DMA_COUNT        0x68
   60 #define AR934X_NFC_REG_DMA_CTRL         0x6c
   61 #define AR934X_NFC_REG_MEM_CTRL         0x80
   62 #define AR934X_NFC_REG_DATA_SIZE        0x84
   63 #define AR934X_NFC_REG_READ_STATUS      0x88
   64 #define AR934X_NFC_REG_TIME_SEQ         0x8c
   65 #define AR934X_NFC_REG_TIMINGS_ASYN     0x90
   66 #define AR934X_NFC_REG_TIMINGS_SYN      0x94
   67 #define AR934X_NFC_REG_FIFO_DATA        0x98
   68 #define AR934X_NFC_REG_TIME_MODE        0x9c
   69 #define AR934X_NFC_REG_DMA_ADDR_OFFS    0xa0
   70 #define AR934X_NFC_REG_FIFO_INIT        0xb0
   71 #define AR934X_NFC_REG_GEN_SEQ_CTRL     0xb4
   72 
   73 #define AR934X_NFC_CMD_CMD_SEQ_S                0
   74 #define AR934X_NFC_CMD_CMD_SEQ_M                0x3f
   75 #define   AR934X_NFC_CMD_SEQ_1C                 0x00
   76 #define   AR934X_NFC_CMD_SEQ_ERASE              0x0e
   77 #define   AR934X_NFC_CMD_SEQ_12                 0x0c
   78 #define   AR934X_NFC_CMD_SEQ_1C1AXR             0x21
   79 #define   AR934X_NFC_CMD_SEQ_S                  0x24
   80 #define   AR934X_NFC_CMD_SEQ_1C3AXR             0x27
   81 #define   AR934X_NFC_CMD_SEQ_1C5A1CXR           0x2a
   82 #define   AR934X_NFC_CMD_SEQ_18                 0x32
   83 #define AR934X_NFC_CMD_INPUT_SEL_SIU            0
   84 #define AR934X_NFC_CMD_INPUT_SEL_DMA            BIT(6)
   85 #define AR934X_NFC_CMD_ADDR_SEL_0               0
   86 #define AR934X_NFC_CMD_ADDR_SEL_1               BIT(7)
   87 #define AR934X_NFC_CMD_CMD0_S                   8
   88 #define AR934X_NFC_CMD_CMD0_M                   0xff
   89 #define AR934X_NFC_CMD_CMD1_S                   16
   90 #define AR934X_NFC_CMD_CMD1_M                   0xff
   91 #define AR934X_NFC_CMD_CMD2_S                   24
   92 #define AR934X_NFC_CMD_CMD2_M                   0xff
   93 
   94 #define AR934X_NFC_CTRL_ADDR_CYCLE0_M           0x7
   95 #define AR934X_NFC_CTRL_ADDR_CYCLE0_S           0
   96 #define AR934X_NFC_CTRL_SPARE_EN                BIT(3)
   97 #define AR934X_NFC_CTRL_INT_EN                  BIT(4)
   98 #define AR934X_NFC_CTRL_ECC_EN                  BIT(5)
   99 #define AR934X_NFC_CTRL_BLOCK_SIZE_S            6
  100 #define AR934X_NFC_CTRL_BLOCK_SIZE_M            0x3
  101 #define   AR934X_NFC_CTRL_BLOCK_SIZE_32         0
  102 #define   AR934X_NFC_CTRL_BLOCK_SIZE_64         1
  103 #define   AR934X_NFC_CTRL_BLOCK_SIZE_128        2
  104 #define   AR934X_NFC_CTRL_BLOCK_SIZE_256        3
  105 #define AR934X_NFC_CTRL_PAGE_SIZE_S             8
  106 #define AR934X_NFC_CTRL_PAGE_SIZE_M             0x7
  107 #define   AR934X_NFC_CTRL_PAGE_SIZE_256         0
  108 #define   AR934X_NFC_CTRL_PAGE_SIZE_512         1
  109 #define   AR934X_NFC_CTRL_PAGE_SIZE_1024        2
  110 #define   AR934X_NFC_CTRL_PAGE_SIZE_2048        3
  111 #define   AR934X_NFC_CTRL_PAGE_SIZE_4096        4
  112 #define   AR934X_NFC_CTRL_PAGE_SIZE_8192        5
  113 #define   AR934X_NFC_CTRL_PAGE_SIZE_16384       6
  114 #define AR934X_NFC_CTRL_CUSTOM_SIZE_EN          BIT(11)
  115 #define AR934X_NFC_CTRL_IO_WIDTH_8BITS          0
  116 #define AR934X_NFC_CTRL_IO_WIDTH_16BITS         BIT(12)
  117 #define AR934X_NFC_CTRL_LOOKUP_EN               BIT(13)
  118 #define AR934X_NFC_CTRL_PROT_EN                 BIT(14)
  119 #define AR934X_NFC_CTRL_WORK_MODE_ASYNC         0
  120 #define AR934X_NFC_CTRL_WORK_MODE_SYNC          BIT(15)
  121 #define AR934X_NFC_CTRL_ADDR0_AUTO_INC          BIT(16)
  122 #define AR934X_NFC_CTRL_ADDR1_AUTO_INC          BIT(17)
  123 #define AR934X_NFC_CTRL_ADDR_CYCLE1_M           0x7
  124 #define AR934X_NFC_CTRL_ADDR_CYCLE1_S           18
  125 #define AR934X_NFC_CTRL_SMALL_PAGE              BIT(21)
  126 
  127 #define AR934X_NFC_DMA_CTRL_DMA_START           BIT(7)
  128 #define AR934X_NFC_DMA_CTRL_DMA_DIR_WRITE       0
  129 #define AR934X_NFC_DMA_CTRL_DMA_DIR_READ        BIT(6)
  130 #define AR934X_NFC_DMA_CTRL_DMA_MODE_SG         BIT(5)
  131 #define AR934X_NFC_DMA_CTRL_DMA_BURST_S         2
  132 #define AR934X_NFC_DMA_CTRL_DMA_BURST_0         0
  133 #define AR934X_NFC_DMA_CTRL_DMA_BURST_1         1
  134 #define AR934X_NFC_DMA_CTRL_DMA_BURST_2         2
  135 #define AR934X_NFC_DMA_CTRL_DMA_BURST_3         3
  136 #define AR934X_NFC_DMA_CTRL_DMA_BURST_4         4
  137 #define AR934X_NFC_DMA_CTRL_DMA_BURST_5         5
  138 #define AR934X_NFC_DMA_CTRL_ERR_FLAG            BIT(1)
  139 #define AR934X_NFC_DMA_CTRL_DMA_READY           BIT(0)
  140 
  141 #define AR934X_NFC_INT_DEV_RDY(_x)              BIT(4 + (_x))
  142 #define AR934X_NFC_INT_CMD_END                  BIT(1)
  143 
  144 #define AR934X_NFC_ECC_CTRL_ERR_THRES_S         8
  145 #define AR934X_NFC_ECC_CTRL_ERR_THRES_M         0x1f
  146 #define AR934X_NFC_ECC_CTRL_ECC_CAP_S           5
  147 #define AR934X_NFC_ECC_CTRL_ECC_CAP_M           0x7
  148 #define AR934X_NFC_ECC_CTRL_ECC_CAP_2           0
  149 #define AR934X_NFC_ECC_CTRL_ECC_CAP_4           1
  150 #define AR934X_NFC_ECC_CTRL_ECC_CAP_6           2
  151 #define AR934X_NFC_ECC_CTRL_ECC_CAP_8           3
  152 #define AR934X_NFC_ECC_CTRL_ECC_CAP_10          4
  153 #define AR934X_NFC_ECC_CTRL_ECC_CAP_12          5
  154 #define AR934X_NFC_ECC_CTRL_ECC_CAP_14          6
  155 #define AR934X_NFC_ECC_CTRL_ECC_CAP_16          7
  156 #define AR934X_NFC_ECC_CTRL_ERR_OVER            BIT(2)
  157 #define AR934X_NFC_ECC_CTRL_ERR_UNCORRECT       BIT(1)
  158 #define AR934X_NFC_ECC_CTRL_ERR_CORRECT         BIT(0)
  159 
  160 #define AR934X_NFC_ECC_OFFS_OFSET_M             0xffff
  161 
  162 /* default timing values */
  163 #define AR934X_NFC_TIME_SEQ_DEFAULT     0x7fff
  164 #define AR934X_NFC_TIMINGS_ASYN_DEFAULT 0x22
  165 #define AR934X_NFC_TIMINGS_SYN_DEFAULT  0xf
  166 
  167 #define AR934X_NFC_ID_BUF_SIZE          8
  168 #define AR934X_NFC_DEV_READY_TIMEOUT    25 /* msecs */
  169 #define AR934X_NFC_DMA_READY_TIMEOUT    25 /* msecs */
  170 #define AR934X_NFC_DONE_TIMEOUT         1000
  171 #define AR934X_NFC_DMA_RETRIES          20
  172 
  173 #define AR934X_NFC_IRQ_MASK             AR934X_NFC_INT_DEV_RDY(0)
  174 
  175 #define  AR934X_NFC_GENSEQ_SMALL_PAGE_READ      0x30043
  176 
  177 #endif /* __AR934X_NFCREG_H__ */

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