The Design and Implementation of the FreeBSD Operating System, Second Edition
Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)


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FreeBSD/Linux Kernel Cross Reference
sys/mips/atheros/if_argevar.h

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    1 /*-
    2  * Copyright (c) 2009, Oleksandr Tymoshenko
    3  * All rights reserved.
    4  *
    5  * Redistribution and use in source and binary forms, with or without
    6  * modification, are permitted provided that the following conditions
    7  * are met:
    8  * 1. Redistributions of source code must retain the above copyright
    9  *    notice unmodified, this list of conditions, and the following
   10  *    disclaimer.
   11  * 2. Redistributions in binary form must reproduce the above copyright
   12  *    notice, this list of conditions and the following disclaimer in the
   13  *    documentation and/or other materials provided with the distribution.
   14  *
   15  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
   16  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
   17  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
   18  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
   19  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
   20  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
   21  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
   22  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
   23  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
   24  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
   25  * SUCH DAMAGE.
   26  *
   27  * $FreeBSD: stable/8/sys/mips/atheros/if_argevar.h 215938 2010-11-27 12:26:40Z jchandra $
   28  */
   29 
   30 #ifndef __IF_ARGEVAR_H__
   31 #define __IF_ARGEVAR_H__
   32 
   33 #define ARGE_NPHY               32
   34 #define ARGE_TX_RING_COUNT      128
   35 #define ARGE_RX_RING_COUNT      128
   36 #define ARGE_RX_DMA_SIZE        ARGE_RX_RING_COUNT * sizeof(struct arge_desc)
   37 #define ARGE_TX_DMA_SIZE        ARGE_TX_RING_COUNT * sizeof(struct arge_desc)
   38 #define ARGE_MAXFRAGS           8
   39 #define ARGE_RING_ALIGN         sizeof(struct arge_desc)
   40 #define ARGE_RX_ALIGN           sizeof(uint32_t)
   41 #define ARGE_MAXFRAGS           8
   42 #define ARGE_TX_RING_ADDR(sc, i)        \
   43     ((sc)->arge_rdata.arge_tx_ring_paddr + sizeof(struct arge_desc) * (i))
   44 #define ARGE_RX_RING_ADDR(sc, i)        \
   45     ((sc)->arge_rdata.arge_rx_ring_paddr + sizeof(struct arge_desc) * (i))
   46 #define ARGE_INC(x,y)           (x) = (((x) + 1) % y)
   47 
   48 
   49 #define ARGE_MII_TIMEOUT        1000
   50 
   51 #define ARGE_LOCK(_sc)          mtx_lock(&(_sc)->arge_mtx)
   52 #define ARGE_UNLOCK(_sc)        mtx_unlock(&(_sc)->arge_mtx)
   53 #define ARGE_LOCK_ASSERT(_sc)   mtx_assert(&(_sc)->arge_mtx, MA_OWNED)
   54 
   55 /*
   56  * register space access macros
   57  */
   58 #define ARGE_WRITE(sc, reg, val)        do {    \
   59                 bus_write_4(sc->arge_res, (reg), (val)); \
   60         } while (0)
   61 
   62 #define ARGE_READ(sc, reg)       bus_read_4(sc->arge_res, (reg))
   63 
   64 #define ARGE_SET_BITS(sc, reg, bits)    \
   65         ARGE_WRITE(sc, reg, ARGE_READ(sc, (reg)) | (bits))
   66 
   67 #define ARGE_CLEAR_BITS(sc, reg, bits)  \
   68         ARGE_WRITE(sc, reg, ARGE_READ(sc, (reg)) & ~(bits))
   69 
   70 /*
   71  * MII registers access macros
   72  */
   73 #define ARGE_MII_READ(reg) \
   74         *((volatile uint32_t *)MIPS_PHYS_TO_KSEG1((AR71XX_MII_BASE + reg)))
   75 
   76 #define ARGE_MII_WRITE(reg, val) \
   77         *((volatile uint32_t *)MIPS_PHYS_TO_KSEG1((AR71XX_MII_BASE + reg))) = (val)
   78 
   79 
   80 #define ARGE_DESC_EMPTY         (1 << 31)
   81 #define ARGE_DESC_MORE          (1 << 24)
   82 #define ARGE_DESC_SIZE_MASK     ((1 << 12) - 1)
   83 #define ARGE_DMASIZE(len)       ((len) & ARGE_DESC_SIZE_MASK)
   84 struct arge_desc {
   85         uint32_t        packet_addr;
   86         uint32_t        packet_ctrl;
   87         uint32_t        next_desc;
   88         uint32_t        padding;
   89 };
   90 
   91 struct arge_txdesc {
   92         struct mbuf     *tx_m;
   93         bus_dmamap_t    tx_dmamap;
   94 };
   95 
   96 struct arge_rxdesc {
   97         struct mbuf             *rx_m;
   98         bus_dmamap_t            rx_dmamap;
   99         struct arge_desc        *desc;
  100 };
  101 
  102 struct arge_chain_data {
  103         bus_dma_tag_t           arge_parent_tag;
  104         bus_dma_tag_t           arge_tx_tag;
  105         struct arge_txdesc      arge_txdesc[ARGE_TX_RING_COUNT];
  106         bus_dma_tag_t           arge_rx_tag;
  107         struct arge_rxdesc      arge_rxdesc[ARGE_RX_RING_COUNT];
  108         bus_dma_tag_t           arge_tx_ring_tag;
  109         bus_dma_tag_t           arge_rx_ring_tag;
  110         bus_dmamap_t            arge_tx_ring_map;
  111         bus_dmamap_t            arge_rx_ring_map;
  112         bus_dmamap_t            arge_rx_sparemap;
  113         int                     arge_tx_pkts;
  114         int                     arge_tx_prod;
  115         int                     arge_tx_cons;
  116         int                     arge_tx_cnt;
  117         int                     arge_rx_cons;
  118 };
  119 
  120 struct arge_ring_data {
  121         struct arge_desc        *arge_rx_ring;
  122         struct arge_desc        *arge_tx_ring;
  123         bus_addr_t              arge_rx_ring_paddr;
  124         bus_addr_t              arge_tx_ring_paddr;
  125 };
  126 
  127 struct arge_softc {
  128         struct ifnet            *arge_ifp;      /* interface info */
  129         device_t                arge_dev;
  130         struct ifmedia          arge_ifmedia;
  131         /*
  132          * Media & duples settings for multiPHY MAC
  133          */
  134         uint32_t                arge_media_type;
  135         uint32_t                arge_duplex_mode;
  136         struct resource         *arge_res;
  137         int                     arge_rid;
  138         struct resource         *arge_irq;
  139         void                    *arge_intrhand;
  140         device_t                arge_miibus;
  141         bus_dma_tag_t           arge_parent_tag;
  142         bus_dma_tag_t           arge_tag;
  143         struct mtx              arge_mtx;
  144         struct callout          arge_stat_callout;
  145         struct task             arge_link_task;
  146         struct arge_chain_data  arge_cdata;
  147         struct arge_ring_data   arge_rdata;
  148         int                     arge_link_status;
  149         int                     arge_detach;
  150         uint32_t                arge_intr_status;
  151         int                     arge_mac_unit;
  152         int                     arge_phymask;
  153         int                     arge_if_flags;
  154         uint32_t                arge_debug;
  155         struct {
  156                 uint32_t        tx_pkts_unaligned;
  157                 uint32_t        tx_pkts_aligned;
  158         } stats;
  159 };
  160 
  161 #endif /* __IF_ARGEVAR_H__ */

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