The Design and Implementation of the FreeBSD Operating System, Second Edition
Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)


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FreeBSD/Linux Kernel Cross Reference
sys/mips/broadcom/bcm_bmipsreg.h

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    1 /*-
    2  * Copyright (c) 2016 Landon Fuller <landonf@FreeBSD.org>
    3  * All rights reserved.
    4  *
    5  * Redistribution and use in source and binary forms, with or without
    6  * modification, are permitted provided that the following conditions
    7  * are met:
    8  * 1. Redistributions of source code must retain the above copyright
    9  *    notice, this list of conditions and the following disclaimer,
   10  *    without modification.
   11  * 2. Redistributions in binary form must reproduce at minimum a disclaimer
   12  *    similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any
   13  *    redistribution must be conditioned upon including a substantially
   14  *    similar Disclaimer requirement for further binary redistribution.
   15  *
   16  * NO WARRANTY
   17  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
   18  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
   19  * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY
   20  * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL
   21  * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY,
   22  * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
   23  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
   24  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER
   25  * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
   26  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
   27  * THE POSSIBILITY OF SUCH DAMAGES.
   28  * 
   29  * $FreeBSD: stable/12/sys/mips/broadcom/bcm_bmipsreg.h 305953 2016-09-18 21:28:09Z landonf $
   30  */
   31 
   32 #ifndef _MIPS_BROADCOM_BMIPSREG_H_
   33 #define _MIPS_BROADCOM_BMIPSREG_H_
   34 
   35 /*
   36  * Common BMIPS32/BMIPS3300 Registers
   37  */
   38 #define BCM_BMIPS_CORECTL               0x00    /**< core control */
   39 #define   BCM_BMIPS_CORECTL_FORCE_RST   0x01    /**< force reset */
   40 #define   BCM_BMIPS_CORECTL_NO_FLSH_EXC 0x02    /**< flash exception disable */
   41 #define BCM_BMIPS_INTR_STATUS           0x20    /**< interrupt status */
   42 #define BCM_BMIPS_INTR_MASK             0x24    /**< interrupt mask */
   43 #define   BCM_BMIPS_TIMER_INTMASK       0x01    /**< timer interrupt mask */
   44 #define BCM_BMIPS_TIMER_CTRL            0x28    /**< timer interval (?) */
   45 
   46 /*
   47  * Broadcom BMIPS32 (BHND_COREID_MIPS)
   48  */
   49 
   50 #define BCM_BMIPS32_CORECTL             BCM_BMIPS_CORECTL
   51 #define BCM_BMIPS32_BIST_STATUS         0x04    /**< built-in self-test status */
   52 #define BCM_BMIPS32_INTR_STATUS         BCM_BMIPS_INTR_STATUS
   53 #define BCM_BMIPS32_INTR_MASK           BCM_BMIPS_INTR_MASK
   54 #define BCM_BMIPS32_TIMER_CTRL          BCM_BMIPS_TIMER_CTRL
   55 
   56 /*
   57  * Broadcom BMIPS3300+ (BHND_COREID_MIPS33)
   58  */
   59 
   60 #define BCM_BMIPS33_CORECTL             BCM_BMIPS_CORECTL
   61 #define BCM_BMIPS33_BIST_CTRL           0x04    /**< build-in self-test control */
   62 #define   BCM_BMIPS33_BIST_CTRL_DUMP    0x01    /**< BIST dump */
   63 #define   BCM_BMIPS33_BIST_CTRL_DEBUG   0x02    /**< BIST debug */
   64 #define   BCM_BMIPS33_BIST_CTRL_HOLD    0x04    /**< BIST hold */
   65 #define BCM_BMIPS33_BIST_STATUS         0x08    /**< built-in self-test status */
   66 #define BCM_BMIPS33_INTR_STATUS         BCM_BMIPS_INTR_STATUS
   67 #define BCM_BMIPS33_INTR_MASK           BCM_BMIPS_INTR_MASK
   68 #define BCM_BMIPS33_TIMER_CTRL          BCM_BMIPS_TIMER_CTRL
   69 #define BCM_BMIPS33_TEST_MUX_SEL        0x30    /**< test multiplexer select (?) */
   70 #define BCM_BMIPS33_TEST_MUX_EN         0x34    /**< test multiplexer enable (?) */
   71 #define BCM_BMIPS33_EJTAG_GPIO_EN       0x2C    /**< ejtag gpio enable */
   72 
   73 #endif /* _MIPS_BROADCOM_BMIPSREG_H_ */

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