The Design and Implementation of the FreeBSD Operating System, Second Edition
Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)


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FreeBSD/Linux Kernel Cross Reference
sys/mips/broadcom/bcm_mips74kreg.h

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    1 /*-
    2  * Copyright (c) 2016 Landon Fuller <landonf@FreeBSD.org>
    3  * All rights reserved.
    4  *
    5  * Redistribution and use in source and binary forms, with or without
    6  * modification, are permitted provided that the following conditions
    7  * are met:
    8  * 1. Redistributions of source code must retain the above copyright
    9  *    notice, this list of conditions and the following disclaimer,
   10  *    without modification.
   11  * 2. Redistributions in binary form must reproduce at minimum a disclaimer
   12  *    similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any
   13  *    redistribution must be conditioned upon including a substantially
   14  *    similar Disclaimer requirement for further binary redistribution.
   15  *
   16  * NO WARRANTY
   17  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
   18  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
   19  * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY
   20  * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL
   21  * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY,
   22  * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
   23  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
   24  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER
   25  * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
   26  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
   27  * THE POSSIBILITY OF SUCH DAMAGES.
   28  * 
   29  * $FreeBSD: stable/12/sys/mips/broadcom/bcm_mips74kreg.h 326079 2017-11-21 23:15:20Z landonf $
   30  */
   31 
   32 #ifndef _MIPS_BROADCOM_MIPS74KREG_H_
   33 #define _MIPS_BROADCOM_MIPS74KREG_H_
   34 
   35 #define BCM_MIPS74K_CORECTL             0x00    /**< core control */
   36 #define BCM_MIPS74K_EXCBASE             0x04    /**< exception base */
   37 
   38 #define BCM_MIPS74K_BIST_STATUS         0x0C    /**< built-in self-test status */
   39 #define BCM_MIPS74K_INTR_STATUS         0x10    /**< interrupt status */
   40 
   41 /* INTR(0-5)_MASK map bcma(4) OOB interrupt bus lines to MIPS hardware
   42  * interrupts. */
   43 #define BCM_MIPS74K_INTR0_SEL           0x14    /**< IRQ0 OOBSEL mask */
   44 #define BCM_MIPS74K_INTR1_SEL           0x18    /**< IRQ1 OOBSEL mask */
   45 #define BCM_MIPS74K_INTR2_SEL           0x1C    /**< IRQ2 OOBSEL mask */
   46 #define BCM_MIPS74K_INTR3_SEL           0x20    /**< IRQ3 OOBSEL mask */
   47 #define BCM_MIPS74K_INTR4_SEL           0x24    /**< IRQ4 OOBSEL mask */
   48 #define BCM_MIPS74K_INTR5_SEL           0x28    /**< IRQ5 OOBSEL mask */
   49 #define BCM_MIPS74K_NUM_INTR            6       /**< routable CPU interrupt count */
   50 
   51 #define BCM_MIPS74K_INTR_SEL(_intr)     \
   52         (BCM_MIPS74K_INTR0_SEL + ((_intr) * 4))
   53 #define BCM_MIPS74K_INTR_SEL_FLAG(_i)   (1<<_i)
   54 
   55 #define BCM_MIPS74K_TIMER_IVEC          31      /**< MIPS timer's bus interrupt vector */
   56 
   57 #define BCM_MIPS74K_NMI_MASK            0x2C    /**< nmi mask */
   58 
   59 #define BCM_MIPS74K_GPIO_SEL            0x40    /**< gpio select */
   60 #define BCM_MIPS74K_GPIO_OUT            0x44    /**< gpio output enable */
   61 #define BCM_MIPS74K_GPIO_EN             0x48    /**< gpio enable */
   62 
   63 /** The MIPS timer interrupt IRQ assignment */
   64 #define BCM_MIPS74K_GET_TIMER_IRQ()     \
   65          ((mips_rd_intctl() & MIPS_INTCTL_IPTI_MASK) >> MIPS_INTCTL_IPTI_SHIFT)
   66 
   67 
   68 #endif /* _MIPS_BROADCOM_MIPS74KREG_H_ */

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