1 /*-
2 * Copyright (c) 2016 Michael Zhilin <mizhka@gmail.com>
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer,
10 * without modification.
11 * 2. Redistributions in binary form must reproduce at minimum a disclaimer
12 * similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any
13 * redistribution must be conditioned upon including a substantially
14 * similar Disclaimer requirement for further binary redistribution.
15 *
16 * NO WARRANTY
17 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
18 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
19 * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY
20 * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL
21 * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY,
22 * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
23 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
24 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER
25 * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
26 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
27 * THE POSSIBILITY OF SUCH DAMAGES.
28 *
29 * $FreeBSD: releng/11.1/sys/mips/broadcom/bcm_mipscore.h 299992 2016-05-16 23:54:28Z adrian $
30 */
31
32 #ifndef _BHND_CORES_MIPS_MIPSCOREVAR_H_
33 #define _BHND_CORES_MIPS_MIPSCOREVAR_H_
34
35 #define MIPSCORE_MAX_RSPEC 2
36
37 struct mipscore_softc {
38 device_t dev; /* CPU device */
39 uint32_t devid;
40 struct resource_spec rspec[MIPSCORE_MAX_RSPEC];
41 struct bhnd_resource *res[MIPSCORE_MAX_RSPEC];
42 };
43
44 struct mipscore_regs {
45 uint32_t corecontrol;
46 uint32_t exceptionbase;
47 uint32_t PAD1[1]; /* unmapped address */
48 uint32_t biststatus;
49 uint32_t intstatus;
50 uint32_t intmask[6];
51 uint32_t nmimask;
52 uint32_t PAD2[4]; /* unmapped addresses */
53 uint32_t gpioselect;
54 uint32_t gpiooutput;
55 uint32_t gpioenable;
56 uint32_t PAD3[101]; /* unmapped addresses */
57 uint32_t clkcontrolstatus;
58 };
59
60 #endif /* _BHND_CORES_MIPS_MIPSCOREVAR_H_ */
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