Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)
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FreeBSD/Linux Kernel Cross Reference
sys/mips/cavium/cvmx_config.h
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1 /***********************license start*************** 2 * Copyright (c) 2003-2008 Cavium Networks (support@cavium.com). All rights 3 * reserved. 4 * 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions are 8 * met: 9 * 10 * * Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 13 * * Redistributions in binary form must reproduce the above 14 * copyright notice, this list of conditions and the following 15 * disclaimer in the documentation and/or other materials provided 16 * with the distribution. 17 * 18 * * Neither the name of Cavium Networks nor the names of 19 * its contributors may be used to endorse or promote products 20 * derived from this software without specific prior written 21 * permission. 22 * 23 * TO THE MAXIMUM EXTENT PERMITTED BY LAW, THE SOFTWARE IS PROVIDED "AS IS" 24 * AND WITH ALL FAULTS AND CAVIUM NETWORKS MAKES NO PROMISES, REPRESENTATIONS 25 * OR WARRANTIES, EITHER EXPRESS, IMPLIED, STATUTORY, OR OTHERWISE, WITH 26 * RESPECT TO THE SOFTWARE, INCLUDING ITS CONDITION, ITS CONFORMITY TO ANY 27 * REPRESENTATION OR DESCRIPTION, OR THE EXISTENCE OF ANY LATENT OR PATENT 28 * DEFECTS, AND CAVIUM SPECIFICALLY DISCLAIMS ALL IMPLIED (IF ANY) WARRANTIES 29 * OF TITLE, MERCHANTABILITY, NONINFRINGEMENT, FITNESS FOR A PARTICULAR 30 * PURPOSE, LACK OF VIRUSES, ACCURACY OR COMPLETENESS, QUIET ENJOYMENT, QUIET 31 * POSSESSION OR CORRESPONDENCE TO DESCRIPTION. THE ENTIRE RISK ARISING OUT 32 * OF USE OR PERFORMANCE OF THE SOFTWARE LIES WITH YOU. 33 * 34 * 35 * For any questions regarding licensing please contact marketing@caviumnetworks.com 36 * 37 ***********************license end**************************************/ 38 /* $FreeBSD: releng/11.2/sys/mips/cavium/cvmx_config.h 331722 2018-03-29 02:50:57Z eadler $ */ 39 40 #ifndef _CVMX_CONFIG_H 41 #define _CVMX_CONFIG_H 42 43 #include "opt_cvmx.h" 44 45 #include <sys/types.h> 46 #include <sys/param.h> 47 #include <sys/systm.h> 48 #include <sys/mbuf.h> 49 50 #include <vm/vm.h> 51 #include <vm/pmap.h> 52 53 #include <machine/stdarg.h> 54 55 #define asm __asm 56 57 #define CVMX_DONT_INCLUDE_CONFIG 58 59 /* Define to enable the use of simple executive packet output functions. 60 ** For packet I/O setup enable the helper functions below. 61 */ 62 #define CVMX_ENABLE_PKO_FUNCTIONS 63 64 /* Define to enable the use of simple executive helper functions. These 65 ** include many hardware setup functions. See cvmx-helper.[ch] for 66 ** details. 67 */ 68 #define CVMX_ENABLE_HELPER_FUNCTIONS 69 70 /* CVMX_HELPER_FIRST_MBUFF_SKIP is the number of bytes to reserve before 71 ** the beginning of the packet. If necessary, override the default 72 ** here. See the IPD section of the hardware manual for MBUFF SKIP 73 ** details.*/ 74 #define CVMX_HELPER_FIRST_MBUFF_SKIP 184 75 76 /* CVMX_HELPER_NOT_FIRST_MBUFF_SKIP is the number of bytes to reserve in each 77 ** chained packet element. If necessary, override the default here */ 78 #define CVMX_HELPER_NOT_FIRST_MBUFF_SKIP 0 79 80 /* CVMX_HELPER_ENABLE_BACK_PRESSURE controls whether back pressure is enabled 81 ** for all input ports. This controls if IPD sends backpressure to all ports if 82 ** Octeon's FPA pools don't have enough packet or work queue entries. Even when 83 ** this is off, it is still possible to get backpressure from individual 84 ** hardware ports. When configuring backpressure, also check 85 ** CVMX_HELPER_DISABLE_*_BACKPRESSURE below. If necessary, override the default 86 ** here */ 87 #define CVMX_HELPER_ENABLE_BACK_PRESSURE 1 88 89 /* CVMX_HELPER_ENABLE_IPD controls if the IPD is enabled in the helper 90 ** function. Once it is enabled the hardware starts accepting packets. You 91 ** might want to skip the IPD enable if configuration changes are need 92 ** from the default helper setup. If necessary, override the default here */ 93 #define CVMX_HELPER_ENABLE_IPD 1 94 95 /* CVMX_HELPER_INPUT_TAG_TYPE selects the type of tag that the IPD assigns 96 ** to incoming packets. */ 97 #define CVMX_HELPER_INPUT_TAG_TYPE CVMX_POW_TAG_TYPE_ORDERED 98 99 /* The following select which fields are used by the PIP to generate 100 ** the tag on INPUT 101 ** 0: don't include 102 ** 1: include */ 103 #define CVMX_HELPER_INPUT_TAG_IPV6_SRC_IP 0 104 #define CVMX_HELPER_INPUT_TAG_IPV6_DST_IP 0 105 #define CVMX_HELPER_INPUT_TAG_IPV6_SRC_PORT 0 106 #define CVMX_HELPER_INPUT_TAG_IPV6_DST_PORT 0 107 #define CVMX_HELPER_INPUT_TAG_IPV6_NEXT_HEADER 0 108 #define CVMX_HELPER_INPUT_TAG_IPV4_SRC_IP 0 109 #define CVMX_HELPER_INPUT_TAG_IPV4_DST_IP 0 110 #define CVMX_HELPER_INPUT_TAG_IPV4_SRC_PORT 0 111 #define CVMX_HELPER_INPUT_TAG_IPV4_DST_PORT 0 112 #define CVMX_HELPER_INPUT_TAG_IPV4_PROTOCOL 0 113 #define CVMX_HELPER_INPUT_TAG_INPUT_PORT 1 114 115 /* Select skip mode for input ports */ 116 #define CVMX_HELPER_INPUT_PORT_SKIP_MODE CVMX_PIP_PORT_CFG_MODE_SKIPL2 117 118 /* Define the number of queues per output port */ 119 #define CVMX_HELPER_PKO_QUEUES_PER_PORT_INTERFACE0 1 120 #define CVMX_HELPER_PKO_QUEUES_PER_PORT_INTERFACE1 1 121 122 /* Configure PKO to use per-core queues (PKO lockless operation). 123 ** Please see the related SDK documentation for PKO that illustrates 124 ** how to enable and configure this option. */ 125 //#define CVMX_ENABLE_PKO_LOCKLESS_OPERATION 1 126 //#define CVMX_HELPER_PKO_MAX_PORTS_INTERFACE0 8 127 //#define CVMX_HELPER_PKO_MAX_PORTS_INTERFACE1 8 128 129 /* Force backpressure to be disabled. This overrides all other 130 ** backpressure configuration */ 131 #define CVMX_HELPER_DISABLE_RGMII_BACKPRESSURE 1 132 133 /* Disable the SPI4000's processing of backpressure packets and backpressure 134 ** generation. When this is 1, the SPI4000 will not stop sending packets when 135 ** receiving backpressure. It will also not generate backpressure packets when 136 ** its internal FIFOs are full. */ 137 #define CVMX_HELPER_DISABLE_SPI4000_BACKPRESSURE 1 138 139 /* CVMX_HELPER_SPI_TIMEOUT is used to determine how long the SPI initialization 140 ** routines wait for SPI training. You can override the value using 141 ** executive-config.h if necessary */ 142 #define CVMX_HELPER_SPI_TIMEOUT 10 143 144 /* Select the number of low latency memory ports (interfaces) that 145 ** will be configured. Valid values are 1 and 2. 146 */ 147 #define CVMX_LLM_CONFIG_NUM_PORTS 2 148 149 /* Enable the fix for PKI-100 errata ("Size field is 8 too large in WQE and next 150 ** pointers"). If CVMX_ENABLE_LEN_M8_FIX is set to 0, the fix for this errata will 151 ** not be enabled. 152 ** 0: Fix is not enabled 153 ** 1: Fix is enabled, if supported by hardware 154 */ 155 #define CVMX_ENABLE_LEN_M8_FIX 1 156 157 #if defined(CVMX_ENABLE_HELPER_FUNCTIONS) && !defined(CVMX_ENABLE_PKO_FUNCTIONS) 158 #define CVMX_ENABLE_PKO_FUNCTIONS 159 #endif 160 161 /* Enable debug and informational printfs */ 162 #define CVMX_CONFIG_ENABLE_DEBUG_PRINTS 1 163 164 /************************* Config Specific Defines ************************/ 165 #define CVMX_LLM_NUM_PORTS 1 166 #define CVMX_PKO_QUEUES_PER_PORT_INTERFACE0 1 /**< PKO queues per port for interface 0 (ports 0-15) */ 167 #define CVMX_PKO_QUEUES_PER_PORT_INTERFACE1 1 /**< PKO queues per port for interface 1 (ports 16-31) */ 168 #define CVMX_PKO_MAX_PORTS_INTERFACE0 CVMX_HELPER_PKO_MAX_PORTS_INTERFACE0 /**< Limit on the number of PKO ports enabled for interface 0 */ 169 #define CVMX_PKO_MAX_PORTS_INTERFACE1 CVMX_HELPER_PKO_MAX_PORTS_INTERFACE1 /**< Limit on the number of PKO ports enabled for interface 1 */ 170 #define CVMX_PKO_QUEUES_PER_PORT_PCI 1 /**< PKO queues per port for PCI (ports 32-35) */ 171 #define CVMX_PKO_QUEUES_PER_PORT_LOOP 1 /**< PKO queues per port for Loop devices (ports 36-39) */ 172 173 /************************* FPA allocation *********************************/ 174 /* Pool sizes in bytes, must be multiple of a cache line */ 175 #define CVMX_FPA_POOL_0_SIZE (15 * CVMX_CACHE_LINE_SIZE) 176 #define CVMX_FPA_POOL_1_SIZE (1 * CVMX_CACHE_LINE_SIZE) 177 #define CVMX_FPA_POOL_2_SIZE (8 * CVMX_CACHE_LINE_SIZE) 178 #define CVMX_FPA_POOL_3_SIZE (0 * CVMX_CACHE_LINE_SIZE) 179 #define CVMX_FPA_POOL_4_SIZE (0 * CVMX_CACHE_LINE_SIZE) 180 #define CVMX_FPA_POOL_5_SIZE (0 * CVMX_CACHE_LINE_SIZE) 181 #define CVMX_FPA_POOL_6_SIZE (0 * CVMX_CACHE_LINE_SIZE) 182 #define CVMX_FPA_POOL_7_SIZE (0 * CVMX_CACHE_LINE_SIZE) 183 184 /* Pools in use */ 185 #define CVMX_FPA_PACKET_POOL (0) /**< Packet buffers */ 186 #define CVMX_FPA_PACKET_POOL_SIZE CVMX_FPA_POOL_0_SIZE 187 #define CVMX_FPA_WQE_POOL (1) /**< Work queue entrys */ 188 #define CVMX_FPA_WQE_POOL_SIZE CVMX_FPA_POOL_1_SIZE 189 #define CVMX_FPA_OUTPUT_BUFFER_POOL (2) /**< PKO queue command buffers */ 190 #define CVMX_FPA_OUTPUT_BUFFER_POOL_SIZE CVMX_FPA_POOL_2_SIZE 191 192 /************************* FAU allocation ********************************/ 193 #define CVMX_FAU_REG_END 2048 194 195 #define CVMX_SCR_SCRATCH 0 196 197 #endif /* !_CVMX_CONFIG_H */
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