Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)
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FreeBSD/Linux Kernel Cross Reference
sys/mips/cavium/cvmx_config.h
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1 /***********************license start*************** 2 * SPDX-License-Identifier: BSD-3-Clause 3 * 4 * Copyright (c) 2003-2008 Cavium Networks (support@cavium.com). All rights 5 * reserved. 6 * 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions are 10 * met: 11 * 12 * * Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer. 14 * 15 * * Redistributions in binary form must reproduce the above 16 * copyright notice, this list of conditions and the following 17 * disclaimer in the documentation and/or other materials provided 18 * with the distribution. 19 * 20 * * Neither the name of Cavium Networks nor the names of 21 * its contributors may be used to endorse or promote products 22 * derived from this software without specific prior written 23 * permission. 24 * 25 * TO THE MAXIMUM EXTENT PERMITTED BY LAW, THE SOFTWARE IS PROVIDED "AS IS" 26 * AND WITH ALL FAULTS AND CAVIUM NETWORKS MAKES NO PROMISES, REPRESENTATIONS 27 * OR WARRANTIES, EITHER EXPRESS, IMPLIED, STATUTORY, OR OTHERWISE, WITH 28 * RESPECT TO THE SOFTWARE, INCLUDING ITS CONDITION, ITS CONFORMITY TO ANY 29 * REPRESENTATION OR DESCRIPTION, OR THE EXISTENCE OF ANY LATENT OR PATENT 30 * DEFECTS, AND CAVIUM SPECIFICALLY DISCLAIMS ALL IMPLIED (IF ANY) WARRANTIES 31 * OF TITLE, MERCHANTABILITY, NONINFRINGEMENT, FITNESS FOR A PARTICULAR 32 * PURPOSE, LACK OF VIRUSES, ACCURACY OR COMPLETENESS, QUIET ENJOYMENT, QUIET 33 * POSSESSION OR CORRESPONDENCE TO DESCRIPTION. THE ENTIRE RISK ARISING OUT 34 * OF USE OR PERFORMANCE OF THE SOFTWARE LIES WITH YOU. 35 * 36 * 37 * For any questions regarding licensing please contact marketing@caviumnetworks.com 38 * 39 ***********************license end**************************************/ 40 /* $FreeBSD: releng/12.0/sys/mips/cavium/cvmx_config.h 326023 2017-11-20 19:43:44Z pfg $ */ 41 42 #ifndef _CVMX_CONFIG_H 43 #define _CVMX_CONFIG_H 44 45 #include "opt_cvmx.h" 46 47 #include <sys/types.h> 48 #include <sys/param.h> 49 #include <sys/systm.h> 50 #include <sys/mbuf.h> 51 52 #include <vm/vm.h> 53 #include <vm/pmap.h> 54 55 #include <machine/stdarg.h> 56 57 #define asm __asm 58 59 #define CVMX_DONT_INCLUDE_CONFIG 60 61 /* Define to enable the use of simple executive packet output functions. 62 ** For packet I/O setup enable the helper functions below. 63 */ 64 #define CVMX_ENABLE_PKO_FUNCTIONS 65 66 /* Define to enable the use of simple executive helper functions. These 67 ** include many hardware setup functions. See cvmx-helper.[ch] for 68 ** details. 69 */ 70 #define CVMX_ENABLE_HELPER_FUNCTIONS 71 72 /* CVMX_HELPER_FIRST_MBUFF_SKIP is the number of bytes to reserve before 73 ** the beginning of the packet. If necessary, override the default 74 ** here. See the IPD section of the hardware manual for MBUFF SKIP 75 ** details.*/ 76 #define CVMX_HELPER_FIRST_MBUFF_SKIP 184 77 78 /* CVMX_HELPER_NOT_FIRST_MBUFF_SKIP is the number of bytes to reserve in each 79 ** chained packet element. If necessary, override the default here */ 80 #define CVMX_HELPER_NOT_FIRST_MBUFF_SKIP 0 81 82 /* CVMX_HELPER_ENABLE_BACK_PRESSURE controls whether back pressure is enabled 83 ** for all input ports. This controls if IPD sends backpressure to all ports if 84 ** Octeon's FPA pools don't have enough packet or work queue entries. Even when 85 ** this is off, it is still possible to get backpressure from individual 86 ** hardware ports. When configuring backpressure, also check 87 ** CVMX_HELPER_DISABLE_*_BACKPRESSURE below. If necessary, override the default 88 ** here */ 89 #define CVMX_HELPER_ENABLE_BACK_PRESSURE 1 90 91 /* CVMX_HELPER_ENABLE_IPD controls if the IPD is enabled in the helper 92 ** function. Once it is enabled the hardware starts accepting packets. You 93 ** might want to skip the IPD enable if configuration changes are need 94 ** from the default helper setup. If necessary, override the default here */ 95 #define CVMX_HELPER_ENABLE_IPD 1 96 97 /* CVMX_HELPER_INPUT_TAG_TYPE selects the type of tag that the IPD assigns 98 ** to incoming packets. */ 99 #define CVMX_HELPER_INPUT_TAG_TYPE CVMX_POW_TAG_TYPE_ORDERED 100 101 /* The following select which fields are used by the PIP to generate 102 ** the tag on INPUT 103 ** 0: don't include 104 ** 1: include */ 105 #define CVMX_HELPER_INPUT_TAG_IPV6_SRC_IP 0 106 #define CVMX_HELPER_INPUT_TAG_IPV6_DST_IP 0 107 #define CVMX_HELPER_INPUT_TAG_IPV6_SRC_PORT 0 108 #define CVMX_HELPER_INPUT_TAG_IPV6_DST_PORT 0 109 #define CVMX_HELPER_INPUT_TAG_IPV6_NEXT_HEADER 0 110 #define CVMX_HELPER_INPUT_TAG_IPV4_SRC_IP 0 111 #define CVMX_HELPER_INPUT_TAG_IPV4_DST_IP 0 112 #define CVMX_HELPER_INPUT_TAG_IPV4_SRC_PORT 0 113 #define CVMX_HELPER_INPUT_TAG_IPV4_DST_PORT 0 114 #define CVMX_HELPER_INPUT_TAG_IPV4_PROTOCOL 0 115 #define CVMX_HELPER_INPUT_TAG_INPUT_PORT 1 116 117 /* Select skip mode for input ports */ 118 #define CVMX_HELPER_INPUT_PORT_SKIP_MODE CVMX_PIP_PORT_CFG_MODE_SKIPL2 119 120 /* Define the number of queues per output port */ 121 #define CVMX_HELPER_PKO_QUEUES_PER_PORT_INTERFACE0 1 122 #define CVMX_HELPER_PKO_QUEUES_PER_PORT_INTERFACE1 1 123 124 /* Configure PKO to use per-core queues (PKO lockless operation). 125 ** Please see the related SDK documentation for PKO that illustrates 126 ** how to enable and configure this option. */ 127 //#define CVMX_ENABLE_PKO_LOCKLESS_OPERATION 1 128 //#define CVMX_HELPER_PKO_MAX_PORTS_INTERFACE0 8 129 //#define CVMX_HELPER_PKO_MAX_PORTS_INTERFACE1 8 130 131 /* Force backpressure to be disabled. This overrides all other 132 ** backpressure configuration */ 133 #define CVMX_HELPER_DISABLE_RGMII_BACKPRESSURE 1 134 135 /* Disable the SPI4000's processing of backpressure packets and backpressure 136 ** generation. When this is 1, the SPI4000 will not stop sending packets when 137 ** receiving backpressure. It will also not generate backpressure packets when 138 ** its internal FIFOs are full. */ 139 #define CVMX_HELPER_DISABLE_SPI4000_BACKPRESSURE 1 140 141 /* CVMX_HELPER_SPI_TIMEOUT is used to determine how long the SPI initialization 142 ** routines wait for SPI training. You can override the value using 143 ** executive-config.h if necessary */ 144 #define CVMX_HELPER_SPI_TIMEOUT 10 145 146 /* Select the number of low latency memory ports (interfaces) that 147 ** will be configured. Valid values are 1 and 2. 148 */ 149 #define CVMX_LLM_CONFIG_NUM_PORTS 2 150 151 /* Enable the fix for PKI-100 errata ("Size field is 8 too large in WQE and next 152 ** pointers"). If CVMX_ENABLE_LEN_M8_FIX is set to 0, the fix for this errata will 153 ** not be enabled. 154 ** 0: Fix is not enabled 155 ** 1: Fix is enabled, if supported by hardware 156 */ 157 #define CVMX_ENABLE_LEN_M8_FIX 1 158 159 #if defined(CVMX_ENABLE_HELPER_FUNCTIONS) && !defined(CVMX_ENABLE_PKO_FUNCTIONS) 160 #define CVMX_ENABLE_PKO_FUNCTIONS 161 #endif 162 163 /* Enable debug and informational printfs */ 164 #define CVMX_CONFIG_ENABLE_DEBUG_PRINTS 1 165 166 /************************* Config Specific Defines ************************/ 167 #define CVMX_LLM_NUM_PORTS 1 168 #define CVMX_PKO_QUEUES_PER_PORT_INTERFACE0 1 /**< PKO queues per port for interface 0 (ports 0-15) */ 169 #define CVMX_PKO_QUEUES_PER_PORT_INTERFACE1 1 /**< PKO queues per port for interface 1 (ports 16-31) */ 170 #define CVMX_PKO_MAX_PORTS_INTERFACE0 CVMX_HELPER_PKO_MAX_PORTS_INTERFACE0 /**< Limit on the number of PKO ports enabled for interface 0 */ 171 #define CVMX_PKO_MAX_PORTS_INTERFACE1 CVMX_HELPER_PKO_MAX_PORTS_INTERFACE1 /**< Limit on the number of PKO ports enabled for interface 1 */ 172 #define CVMX_PKO_QUEUES_PER_PORT_PCI 1 /**< PKO queues per port for PCI (ports 32-35) */ 173 #define CVMX_PKO_QUEUES_PER_PORT_LOOP 1 /**< PKO queues per port for Loop devices (ports 36-39) */ 174 175 /************************* FPA allocation *********************************/ 176 /* Pool sizes in bytes, must be multiple of a cache line */ 177 #define CVMX_FPA_POOL_0_SIZE (15 * CVMX_CACHE_LINE_SIZE) 178 #define CVMX_FPA_POOL_1_SIZE (1 * CVMX_CACHE_LINE_SIZE) 179 #define CVMX_FPA_POOL_2_SIZE (8 * CVMX_CACHE_LINE_SIZE) 180 #define CVMX_FPA_POOL_3_SIZE (0 * CVMX_CACHE_LINE_SIZE) 181 #define CVMX_FPA_POOL_4_SIZE (0 * CVMX_CACHE_LINE_SIZE) 182 #define CVMX_FPA_POOL_5_SIZE (0 * CVMX_CACHE_LINE_SIZE) 183 #define CVMX_FPA_POOL_6_SIZE (0 * CVMX_CACHE_LINE_SIZE) 184 #define CVMX_FPA_POOL_7_SIZE (0 * CVMX_CACHE_LINE_SIZE) 185 186 /* Pools in use */ 187 #define CVMX_FPA_PACKET_POOL (0) /**< Packet buffers */ 188 #define CVMX_FPA_PACKET_POOL_SIZE CVMX_FPA_POOL_0_SIZE 189 #define CVMX_FPA_WQE_POOL (1) /**< Work queue entrys */ 190 #define CVMX_FPA_WQE_POOL_SIZE CVMX_FPA_POOL_1_SIZE 191 #define CVMX_FPA_OUTPUT_BUFFER_POOL (2) /**< PKO queue command buffers */ 192 #define CVMX_FPA_OUTPUT_BUFFER_POOL_SIZE CVMX_FPA_POOL_2_SIZE 193 194 /************************* FAU allocation ********************************/ 195 #define CVMX_FAU_REG_END 2048 196 197 #define CVMX_SCR_SCRATCH 0 198 199 #endif /* !_CVMX_CONFIG_H */
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