The Design and Implementation of the FreeBSD Operating System, Second Edition
Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)


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FreeBSD/Linux Kernel Cross Reference
sys/mips/cavium/octe/ethernet-mdio.c

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    1 /*************************************************************************
    2 Copyright (c) 2003-2007  Cavium Networks (support@cavium.com). All rights
    3 reserved.
    4 
    5 
    6 Redistribution and use in source and binary forms, with or without
    7 modification, are permitted provided that the following conditions are
    8 met:
    9 
   10     * Redistributions of source code must retain the above copyright
   11       notice, this list of conditions and the following disclaimer.
   12 
   13     * Redistributions in binary form must reproduce the above
   14       copyright notice, this list of conditions and the following
   15       disclaimer in the documentation and/or other materials provided
   16       with the distribution.
   17 
   18     * Neither the name of Cavium Networks nor the names of
   19       its contributors may be used to endorse or promote products
   20       derived from this software without specific prior written
   21       permission.
   22 
   23 This Software, including technical data, may be subject to U.S. export  control laws, including the U.S. Export Administration Act and its  associated regulations, and may be subject to export or import  regulations in other countries.
   24 
   25 TO THE MAXIMUM EXTENT PERMITTED BY LAW, THE SOFTWARE IS PROVIDED "AS IS"
   26 AND WITH ALL FAULTS AND CAVIUM  NETWORKS MAKES NO PROMISES, REPRESENTATIONS OR WARRANTIES, EITHER EXPRESS, IMPLIED, STATUTORY, OR OTHERWISE, WITH RESPECT TO THE SOFTWARE, INCLUDING ITS CONDITION, ITS CONFORMITY TO ANY REPRESENTATION OR DESCRIPTION, OR THE EXISTENCE OF ANY LATENT OR PATENT DEFECTS, AND CAVIUM SPECIFICALLY DISCLAIMS ALL IMPLIED (IF ANY) WARRANTIES OF TITLE, MERCHANTABILITY, NONINFRINGEMENT, FITNESS FOR A PARTICULAR PURPOSE, LACK OF VIRUSES, ACCURACY OR COMPLETENESS, QUIET ENJOYMENT, QUIET POSSESSION OR CORRESPONDENCE TO DESCRIPTION. THE ENTIRE  RISK ARISING OUT OF USE OR PERFORMANCE OF THE SOFTWARE LIES WITH YOU.
   27 
   28 *************************************************************************/
   29 
   30 #include <sys/cdefs.h>
   31 __FBSDID("$FreeBSD$");
   32 
   33 #include <sys/param.h>
   34 #include <sys/systm.h>
   35 #include <sys/bus.h>
   36 #include <sys/endian.h>
   37 #include <sys/kernel.h>
   38 #include <sys/mbuf.h>
   39 #include <sys/socket.h>
   40 #include <sys/lock.h>
   41 #include <sys/mutex.h>
   42 
   43 #include <net/ethernet.h>
   44 #include <net/if.h>
   45 #include <net/if_var.h>
   46 
   47 #include "wrapper-cvmx-includes.h"
   48 #include "ethernet-headers.h"
   49 
   50 struct mtx cvm_oct_mdio_mtx;
   51 MTX_SYSINIT(cvm_oct_mdio, &cvm_oct_mdio_mtx, "MDIO", MTX_DEF);
   52 
   53 /**
   54  * Perform an MII read. Called by the generic MII routines
   55  *
   56  * @param dev      Device to perform read for
   57  * @param phy_id   The MII phy id
   58  * @param location Register location to read
   59  * @return Result from the read or zero on failure
   60  */
   61 int cvm_oct_mdio_read(struct ifnet *ifp, int phy_id, int location)
   62 {
   63         cvmx_smi_cmd_t          smi_cmd;
   64         cvmx_smi_rd_dat_t       smi_rd;
   65 
   66         MDIO_LOCK();
   67         smi_cmd.u64 = 0;
   68         smi_cmd.s.phy_op = 1;
   69         smi_cmd.s.phy_adr = phy_id;
   70         smi_cmd.s.reg_adr = location;
   71         cvmx_write_csr(CVMX_SMI_CMD, smi_cmd.u64);
   72 
   73         do {
   74                 cvmx_wait(1000);
   75                 smi_rd.u64 = cvmx_read_csr(CVMX_SMI_RD_DAT);
   76         } while (smi_rd.s.pending);
   77 
   78         MDIO_UNLOCK();
   79 
   80         if (smi_rd.s.val)
   81                 return smi_rd.s.dat;
   82         else
   83                 return 0;
   84 }
   85 
   86 
   87 /**
   88  * Perform an MII write. Called by the generic MII routines
   89  *
   90  * @param dev      Device to perform write for
   91  * @param phy_id   The MII phy id
   92  * @param location Register location to write
   93  * @param val      Value to write
   94  */
   95 void cvm_oct_mdio_write(struct ifnet *ifp, int phy_id, int location, int val)
   96 {
   97         cvmx_smi_cmd_t          smi_cmd;
   98         cvmx_smi_wr_dat_t       smi_wr;
   99 
  100         MDIO_LOCK();
  101         smi_wr.u64 = 0;
  102         smi_wr.s.dat = val;
  103         cvmx_write_csr(CVMX_SMI_WR_DAT, smi_wr.u64);
  104 
  105         smi_cmd.u64 = 0;
  106         smi_cmd.s.phy_op = 0;
  107         smi_cmd.s.phy_adr = phy_id;
  108         smi_cmd.s.reg_adr = location;
  109         cvmx_write_csr(CVMX_SMI_CMD, smi_cmd.u64);
  110 
  111         do {
  112                 cvmx_wait(1000);
  113                 smi_wr.u64 = cvmx_read_csr(CVMX_SMI_WR_DAT);
  114         } while (smi_wr.s.pending);
  115         MDIO_UNLOCK();
  116 }
  117 
  118 /**
  119  * Setup the MDIO device structures
  120  *
  121  * @param dev    Device to setup
  122  *
  123  * @return Zero on success, negative on failure
  124  */
  125 int cvm_oct_mdio_setup_device(struct ifnet *ifp)
  126 {
  127         cvm_oct_private_t *priv = (cvm_oct_private_t *)ifp->if_softc;
  128 
  129         priv->phy_id = cvmx_helper_board_get_mii_address(priv->port);
  130         priv->phy_device = NULL;
  131         priv->mdio_read = NULL;
  132         priv->mdio_write = NULL;
  133 
  134         return 0;
  135 }
  136 

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