The Design and Implementation of the FreeBSD Operating System, Second Edition
Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)


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FreeBSD/Linux Kernel Cross Reference
sys/mips/cavium/octeon_gpiovar.h

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    1 /*-
    2  * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
    3  *
    4  * Copyright (c) 2011, Oleksandr Tymoshenko <gonzo@FreeBSD.org>
    5  * All rights reserved.
    6  *
    7  * Redistribution and use in source and binary forms, with or without
    8  * modification, are permitted provided that the following conditions
    9  * are met:
   10  * 1. Redistributions of source code must retain the above copyright
   11  *    notice unmodified, this list of conditions, and the following
   12  *    disclaimer.
   13  * 2. Redistributions in binary form must reproduce the above copyright
   14  *    notice, this list of conditions and the following disclaimer in the
   15  *    documentation and/or other materials provided with the distribution.
   16  *
   17  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
   18  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
   19  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
   20  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
   21  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
   22  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
   23  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
   24  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
   25  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
   26  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
   27  * SUCH DAMAGE.
   28  *
   29  * $FreeBSD: stable/12/sys/mips/cavium/octeon_gpiovar.h 326259 2017-11-27 15:07:26Z pfg $
   30  *
   31  */
   32 
   33 #ifndef __OCTEON_GPIOVAR_H__
   34 #define __OCTEON_GPIOVAR_H__
   35 
   36 #define GPIO_LOCK(_sc)          mtx_lock(&(_sc)->gpio_mtx)
   37 #define GPIO_UNLOCK(_sc)        mtx_unlock(&(_sc)->gpio_mtx)
   38 #define GPIO_LOCK_ASSERT(_sc)   mtx_assert(&(_sc)->gpio_mtx, MA_OWNED)
   39 
   40 #define OCTEON_GPIO_IRQ_LEVEL           0
   41 #define OCTEON_GPIO_IRQ_EDGE            1       
   42 
   43 #define OCTEON_GPIO_PINS        24
   44 #define OCTEON_GPIO_IRQS        16
   45 
   46 struct octeon_gpio_softc {
   47         device_t                dev;
   48         device_t                busdev;
   49         struct mtx              gpio_mtx;
   50         struct resource         *gpio_irq_res[OCTEON_GPIO_IRQS];
   51         int                     gpio_irq_rid[OCTEON_GPIO_IRQS];
   52         void                    *gpio_ih[OCTEON_GPIO_IRQS];
   53         void                    *gpio_intr_cookies[OCTEON_GPIO_IRQS];
   54         int                     gpio_npins;
   55         struct gpio_pin         gpio_pins[OCTEON_GPIO_PINS];
   56 };
   57 
   58 #endif  /* __OCTEON_GPIOVAR_H__ */

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