1 /***********************license start***************
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38 ***********************license end**************************************/
39
40 #ifndef __OCTEON_IRQ_H__
41 #define __OCTEON_IRQ_H__
42
43 /*
44 * $FreeBSD: releng/10.0/sys/mips/cavium/octeon_irq.h 233417 2012-03-24 06:28:15Z gonzo $
45 */
46
47 /**
48 * Enumeration of Interrupt numbers
49 */
50 typedef enum
51 {
52 /* 0 - 7 represent the 8 MIPS standard interrupt sources */
53 OCTEON_IRQ_SW0 = 0,
54 OCTEON_IRQ_SW1 = 1,
55 OCTEON_IRQ_CIU0 = 2,
56 OCTEON_IRQ_CIU1 = 3,
57 OCTEON_IRQ_4 = 4,
58 OCTEON_IRQ_5 = 5,
59 OCTEON_IRQ_6 = 6,
60 OCTEON_IRQ_7 = 7,
61
62 /* 8 - 71 represent the sources in CIU_INTX_EN0 */
63 OCTEON_IRQ_WORKQ0 = 8,
64 OCTEON_IRQ_WORKQ1 = 9,
65 OCTEON_IRQ_WORKQ2 = 10,
66 OCTEON_IRQ_WORKQ3 = 11,
67 OCTEON_IRQ_WORKQ4 = 12,
68 OCTEON_IRQ_WORKQ5 = 13,
69 OCTEON_IRQ_WORKQ6 = 14,
70 OCTEON_IRQ_WORKQ7 = 15,
71 OCTEON_IRQ_WORKQ8 = 16,
72 OCTEON_IRQ_WORKQ9 = 17,
73 OCTEON_IRQ_WORKQ10 = 18,
74 OCTEON_IRQ_WORKQ11 = 19,
75 OCTEON_IRQ_WORKQ12 = 20,
76 OCTEON_IRQ_WORKQ13 = 21,
77 OCTEON_IRQ_WORKQ14 = 22,
78 OCTEON_IRQ_WORKQ15 = 23,
79 OCTEON_IRQ_GPIO0 = 24,
80 OCTEON_IRQ_GPIO1 = 25,
81 OCTEON_IRQ_GPIO2 = 26,
82 OCTEON_IRQ_GPIO3 = 27,
83 OCTEON_IRQ_GPIO4 = 28,
84 OCTEON_IRQ_GPIO5 = 29,
85 OCTEON_IRQ_GPIO6 = 30,
86 OCTEON_IRQ_GPIO7 = 31,
87 OCTEON_IRQ_GPIO8 = 32,
88 OCTEON_IRQ_GPIO9 = 33,
89 OCTEON_IRQ_GPIO10 = 34,
90 OCTEON_IRQ_GPIO11 = 35,
91 OCTEON_IRQ_GPIO12 = 36,
92 OCTEON_IRQ_GPIO13 = 37,
93 OCTEON_IRQ_GPIO14 = 38,
94 OCTEON_IRQ_GPIO15 = 39,
95 OCTEON_IRQ_MBOX0 = 40,
96 OCTEON_IRQ_MBOX1 = 41,
97 OCTEON_IRQ_UART0 = 42,
98 OCTEON_IRQ_UART1 = 43,
99 OCTEON_IRQ_PCI_INT0 = 44,
100 OCTEON_IRQ_PCI_INT1 = 45,
101 OCTEON_IRQ_PCI_INT2 = 46,
102 OCTEON_IRQ_PCI_INT3 = 47,
103 OCTEON_IRQ_PCI_MSI0 = 48,
104 OCTEON_IRQ_PCI_MSI1 = 49,
105 OCTEON_IRQ_PCI_MSI2 = 50,
106 OCTEON_IRQ_PCI_MSI3 = 51,
107 OCTEON_IRQ_RESERVED44 = 52,
108 OCTEON_IRQ_TWSI = 53,
109 OCTEON_IRQ_RML = 54,
110 OCTEON_IRQ_TRACE = 55,
111 OCTEON_IRQ_GMX_DRP0 = 56,
112 OCTEON_IRQ_GMX_DRP1 = 57, /* Doesn't apply on CN52XX or CN63XX */
113 OCTEON_IRQ_IPD_DRP = 58,
114 OCTEON_IRQ_KEY_ZERO = 59, /* Doesn't apply on CN52XX or CN63XX */
115 OCTEON_IRQ_TIMER0 = 60,
116 OCTEON_IRQ_TIMER1 = 61,
117 OCTEON_IRQ_TIMER2 = 62,
118 OCTEON_IRQ_TIMER3 = 63,
119 OCTEON_IRQ_USB0 = 64, /* Doesn't apply on CN38XX or CN58XX */
120 OCTEON_IRQ_PCM = 65, /* Doesn't apply on CN52XX or CN63XX */
121 OCTEON_IRQ_MPI = 66, /* Doesn't apply on CN52XX or CN63XX */
122 OCTEON_IRQ_TWSI2 = 67, /* Added in CN56XX */
123 OCTEON_IRQ_POWIQ = 68, /* Added in CN56XX */
124 OCTEON_IRQ_IPDPPTHR = 69, /* Added in CN56XX */
125 OCTEON_IRQ_MII = 70, /* Added in CN56XX */
126 OCTEON_IRQ_BOOTDMA = 71, /* Added in CN56XX */
127
128 /* 72 - 135 represent the sources in CIU_INTX_EN1 */
129 OCTEON_IRQ_WDOG0 = 72,
130 OCTEON_IRQ_WDOG1 = 73,
131 OCTEON_IRQ_WDOG2 = 74,
132 OCTEON_IRQ_WDOG3 = 75,
133 OCTEON_IRQ_WDOG4 = 76,
134 OCTEON_IRQ_WDOG5 = 77,
135 OCTEON_IRQ_WDOG6 = 78,
136 OCTEON_IRQ_WDOG7 = 79,
137 OCTEON_IRQ_WDOG8 = 80,
138 OCTEON_IRQ_WDOG9 = 81,
139 OCTEON_IRQ_WDOG10= 82,
140 OCTEON_IRQ_WDOG11= 83,
141 OCTEON_IRQ_WDOG12= 84,
142 OCTEON_IRQ_WDOG13= 85,
143 OCTEON_IRQ_WDOG14= 86,
144 OCTEON_IRQ_WDOG15= 87,
145 OCTEON_IRQ_UART2 = 88, /* Added in CN52XX */
146 OCTEON_IRQ_USB1 = 89, /* Added in CN52XX */
147 OCTEON_IRQ_MII1 = 90, /* Added in CN52XX */
148 OCTEON_IRQ_NAND = 91, /* Added in CN52XX */
149 OCTEON_IRQ_MIO = 92, /* Added in CN63XX */
150 OCTEON_IRQ_IOB = 93, /* Added in CN63XX */
151 OCTEON_IRQ_FPA = 94, /* Added in CN63XX */
152 OCTEON_IRQ_POW = 95, /* Added in CN63XX */
153 OCTEON_IRQ_L2C = 96, /* Added in CN63XX */
154 OCTEON_IRQ_IPD = 97, /* Added in CN63XX */
155 OCTEON_IRQ_PIP = 98, /* Added in CN63XX */
156 OCTEON_IRQ_PKO = 99, /* Added in CN63XX */
157 OCTEON_IRQ_ZIP = 100, /* Added in CN63XX */
158 OCTEON_IRQ_TIM = 101, /* Added in CN63XX */
159 OCTEON_IRQ_RAD = 102, /* Added in CN63XX */
160 OCTEON_IRQ_KEY = 103, /* Added in CN63XX */
161 OCTEON_IRQ_DFA = 104, /* Added in CN63XX */
162 OCTEON_IRQ_USB = 105, /* Added in CN63XX */
163 OCTEON_IRQ_SLI = 106, /* Added in CN63XX */
164 OCTEON_IRQ_DPI = 107, /* Added in CN63XX */
165 OCTEON_IRQ_AGX0 = 108, /* Added in CN63XX */
166 /* 109 - 117 are reserved */
167 OCTEON_IRQ_AGL = 118, /* Added in CN63XX */
168 OCTEON_IRQ_PTP = 119, /* Added in CN63XX */
169 OCTEON_IRQ_PEM0 = 120, /* Added in CN63XX */
170 OCTEON_IRQ_PEM1 = 121, /* Added in CN63XX */
171 OCTEON_IRQ_SRIO0 = 122, /* Added in CN63XX */
172 OCTEON_IRQ_SRIO1 = 123, /* Added in CN63XX */
173 OCTEON_IRQ_LMC0 = 124, /* Added in CN63XX */
174 /* Interrupts 125 - 127 are reserved */
175 OCTEON_IRQ_DFM = 128, /* Added in CN63XX */
176 /* Interrupts 129 - 135 are reserved */
177 } octeon_irq_t;
178
179 #define OCTEON_PMC_IRQ OCTEON_IRQ_4
180
181 #endif
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