The Design and Implementation of the FreeBSD Operating System, Second Edition
Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)


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FreeBSD/Linux Kernel Cross Reference
sys/mips/cavium/octeon_wdog.c

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    1 /*-
    2  * Copyright (c) 2009, Oleksandr Tymoshenko <gonzo@FreeBSD.org>
    3  * Copyright (c) 2010-2011, Juli Mallett <jmallett@FreeBSD.org>
    4  * All rights reserved.
    5  *
    6  * Redistribution and use in source and binary forms, with or without
    7  * modification, are permitted provided that the following conditions
    8  * are met:
    9  * 1. Redistributions of source code must retain the above copyright
   10  *    notice unmodified, this list of conditions, and the following
   11  *    disclaimer.
   12  * 2. Redistributions in binary form must reproduce the above copyright
   13  *    notice, this list of conditions and the following disclaimer in the
   14  *    documentation and/or other materials provided with the distribution.
   15  *
   16  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
   17  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
   18  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
   19  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
   20  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
   21  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
   22  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
   23  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
   24  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
   25  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
   26  * SUCH DAMAGE.
   27  */
   28 
   29 /*
   30  * Watchdog driver for Cavium Octeon
   31  */
   32 
   33 #include <sys/cdefs.h>
   34 __FBSDID("$FreeBSD: releng/10.3/sys/mips/cavium/octeon_wdog.c 232812 2012-03-11 06:17:49Z jmallett $");
   35 
   36 #include <sys/param.h>
   37 #include <sys/systm.h>
   38 #include <sys/watchdog.h>
   39 #include <sys/bus.h>
   40 #include <sys/kernel.h>
   41 #include <sys/module.h>
   42 #include <sys/sysctl.h>
   43 #include <sys/rman.h>
   44 #include <sys/smp.h>
   45 
   46 #include <contrib/octeon-sdk/cvmx.h>
   47 #include <mips/cavium/octeon_irq.h>
   48 
   49 #define DEFAULT_TIMER_VAL       65535
   50 
   51 struct octeon_wdog_softc {
   52         device_t sc_dev;
   53         struct octeon_wdog_core_softc {
   54                 int csc_core;
   55                 struct resource *csc_intr;
   56                 void *csc_intr_cookie;
   57         } sc_cores[MAXCPU];
   58         int sc_armed;
   59         int sc_debug;
   60 };
   61 
   62 extern void octeon_wdog_nmi_handler(void);
   63 void octeon_wdog_nmi(void);
   64 
   65 static void octeon_watchdog_arm_core(int);
   66 static void octeon_watchdog_disarm_core(int);
   67 static int octeon_wdog_attach(device_t);
   68 static void octeon_wdog_identify(driver_t *, device_t);
   69 static int octeon_wdog_intr(void *);
   70 static int octeon_wdog_probe(device_t);
   71 static void octeon_wdog_setup(struct octeon_wdog_softc *, int);
   72 static void octeon_wdog_sysctl(device_t);
   73 static void octeon_wdog_watchdog_fn(void *, u_int, int *);
   74 
   75 void
   76 octeon_wdog_nmi(void)
   77 {
   78         int core;
   79 
   80         core = cvmx_get_core_num();
   81 
   82         printf("cpu%u: NMI detected\n", core);
   83         printf("cpu%u: Exception PC: %p\n", core, (void *)mips_rd_excpc());
   84         printf("cpu%u: status %#x cause %#x\n", core, mips_rd_status(), mips_rd_cause());
   85 
   86         /*
   87          * This is the end
   88          * Beautiful friend
   89          *
   90          * Just wait for Soft Reset to come and take us
   91          */
   92         for (;;)
   93                 continue;
   94 }
   95 
   96 static void
   97 octeon_watchdog_arm_core(int core)
   98 {
   99         cvmx_ciu_wdogx_t ciu_wdog;
  100 
  101         /* Poke it! */
  102         cvmx_write_csr(CVMX_CIU_PP_POKEX(core), 1);
  103 
  104         /*
  105          * XXX
  106          * Perhaps if KDB is enabled, we should use mode=2 and drop into the
  107          * debugger on NMI?
  108          *
  109          * XXX
  110          * Timer should be calculated based on CPU frquency
  111          */
  112         ciu_wdog.u64 = 0;
  113         ciu_wdog.s.len = DEFAULT_TIMER_VAL;
  114         ciu_wdog.s.mode = 3;
  115         cvmx_write_csr(CVMX_CIU_WDOGX(core), ciu_wdog.u64);
  116 }
  117 
  118 static void
  119 octeon_watchdog_disarm_core(int core)
  120 {
  121 
  122         cvmx_write_csr(CVMX_CIU_WDOGX(core), 0);
  123 }
  124 
  125 static void
  126 octeon_wdog_watchdog_fn(void *private, u_int cmd, int *error)
  127 {
  128         struct octeon_wdog_softc *sc = private;
  129         int core;
  130 
  131         cmd &= WD_INTERVAL;
  132         if (sc->sc_debug)
  133                 device_printf(sc->sc_dev, "%s: cmd: %x\n", __func__, cmd);
  134         if (cmd > 0) {
  135                 CPU_FOREACH(core)
  136                         octeon_watchdog_arm_core(core);
  137                 sc->sc_armed = 1;
  138                 *error = 0;
  139         } else {
  140                 if (sc->sc_armed) {
  141                         CPU_FOREACH(core)
  142                                 octeon_watchdog_disarm_core(core);
  143                         sc->sc_armed = 0;
  144                 }
  145         }
  146 }
  147 
  148 static void
  149 octeon_wdog_sysctl(device_t dev)
  150 {
  151         struct octeon_wdog_softc *sc = device_get_softc(dev);
  152 
  153         struct sysctl_ctx_list *ctx = device_get_sysctl_ctx(sc->sc_dev);
  154         struct sysctl_oid *tree = device_get_sysctl_tree(sc->sc_dev);
  155 
  156         SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
  157                 "debug", CTLFLAG_RW, &sc->sc_debug, 0,
  158                 "enable watchdog debugging");
  159         SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
  160                 "armed", CTLFLAG_RD, &sc->sc_armed, 0,
  161                 "whether the watchdog is armed");
  162 }
  163 
  164 static void
  165 octeon_wdog_setup(struct octeon_wdog_softc *sc, int core)
  166 {
  167         struct octeon_wdog_core_softc *csc;
  168         int rid, error;
  169 
  170         csc = &sc->sc_cores[core];
  171 
  172         csc->csc_core = core;
  173 
  174         /* Interrupt part */
  175         rid = 0;
  176         csc->csc_intr = bus_alloc_resource(sc->sc_dev, SYS_RES_IRQ, &rid,
  177             OCTEON_IRQ_WDOG0 + core, OCTEON_IRQ_WDOG0 + core, 1, RF_ACTIVE);
  178         if (csc->csc_intr == NULL)
  179                 panic("%s: bus_alloc_resource for core %u failed",
  180                     __func__, core);
  181 
  182         error = bus_setup_intr(sc->sc_dev, csc->csc_intr, INTR_TYPE_MISC,
  183             octeon_wdog_intr, NULL, csc, &csc->csc_intr_cookie);
  184         if (error != 0)
  185                 panic("%s: bus_setup_intr for core %u: %d", __func__, core,
  186                     error);
  187 
  188         bus_bind_intr(sc->sc_dev, csc->csc_intr, core);
  189         bus_describe_intr(sc->sc_dev, csc->csc_intr, csc->csc_intr_cookie,
  190             "cpu%u", core);
  191 
  192         if (sc->sc_armed) {
  193                 /* Armed by default.  */
  194                 octeon_watchdog_arm_core(core);
  195         } else {
  196                 /* Disarmed by default.  */
  197                 octeon_watchdog_disarm_core(core);
  198         }
  199 }
  200 
  201 static int
  202 octeon_wdog_intr(void *arg)
  203 {
  204         struct octeon_wdog_core_softc *csc = arg;
  205 
  206         KASSERT(csc->csc_core == cvmx_get_core_num(),
  207             ("got watchdog interrupt for core %u on core %u.",
  208              csc->csc_core, cvmx_get_core_num()));
  209 
  210         (void)csc;
  211 
  212         /* Poke it! */
  213         cvmx_write_csr(CVMX_CIU_PP_POKEX(cvmx_get_core_num()), 1);
  214 
  215         return (FILTER_HANDLED);
  216 }
  217 
  218 static int
  219 octeon_wdog_probe(device_t dev)
  220 {
  221 
  222         device_set_desc(dev, "Cavium Octeon watchdog timer");
  223         return (0);
  224 }
  225 
  226 static int
  227 octeon_wdog_attach(device_t dev)
  228 {
  229         struct octeon_wdog_softc *sc = device_get_softc(dev);
  230         uint64_t *nmi_handler = (uint64_t*)octeon_wdog_nmi_handler;
  231         int core, i;
  232 
  233         /* Initialise */
  234         sc->sc_armed = 0; /* XXX Ought to be a tunable / config option.  */
  235         sc->sc_debug = 0;
  236 
  237         sc->sc_dev = dev;
  238         EVENTHANDLER_REGISTER(watchdog_list, octeon_wdog_watchdog_fn, sc, 0);
  239         octeon_wdog_sysctl(dev);
  240 
  241         for (i = 0; i < 16; i++) {
  242                 cvmx_write_csr(CVMX_MIO_BOOT_LOC_ADR, i * 8);
  243                 cvmx_write_csr(CVMX_MIO_BOOT_LOC_DAT, nmi_handler[i]);
  244         }
  245 
  246         cvmx_write_csr(CVMX_MIO_BOOT_LOC_CFGX(0), 0x81fc0000);
  247 
  248         CPU_FOREACH(core)
  249                 octeon_wdog_setup(sc, core);
  250         return (0);
  251 }
  252 
  253 static void
  254 octeon_wdog_identify(driver_t *drv, device_t parent)
  255 {
  256 
  257         BUS_ADD_CHILD(parent, 0, "owdog", 0);
  258 }
  259 
  260 static device_method_t octeon_wdog_methods[] = {
  261         DEVMETHOD(device_identify, octeon_wdog_identify),
  262 
  263         DEVMETHOD(device_probe, octeon_wdog_probe),
  264         DEVMETHOD(device_attach, octeon_wdog_attach),
  265         {0, 0},
  266 };
  267 
  268 static driver_t octeon_wdog_driver = {
  269         "owdog",
  270         octeon_wdog_methods,
  271         sizeof(struct octeon_wdog_softc),
  272 };
  273 static devclass_t octeon_wdog_devclass;
  274 
  275 DRIVER_MODULE(owdog, ciu, octeon_wdog_driver, octeon_wdog_devclass, 0, 0);

Cache object: 988f181839dd5339065b6787053f09bc


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