The Design and Implementation of the FreeBSD Operating System, Second Edition
Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)


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FreeBSD/Linux Kernel Cross Reference
sys/mips/cavium/uart_bus_octeonusart.c

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    1 /*-
    2  * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
    3  *
    4  * Copyright (c) 2006 Wojciech A. Koszek <wkoszek@FreeBSD.org>
    5  * All rights reserved.
    6  *
    7  * Redistribution and use in source and binary forms, with or without
    8  * modification, are permitted provided that the following conditions
    9  * are met:
   10  * 1. Redistributions of source code must retain the above copyright
   11  *    notice, this list of conditions and the following disclaimer.
   12  * 2. Redistributions in binary form must reproduce the above copyright
   13  *    notice, this list of conditions and the following disclaimer in the
   14  *    documentation and/or other materials provided with the distribution.
   15  *
   16  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
   17  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
   18  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
   19  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
   20  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
   21  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
   22  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
   23  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
   24  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
   25  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
   26  * $Id$
   27  */
   28 /*
   29  * Skeleton of this file was based on respective code for ARM
   30  * code written by Olivier Houchard.
   31  */
   32 
   33 /*
   34  * XXXMIPS: This file is hacked from arm/... . XXXMIPS here means this file is
   35  * experimental and was written for MIPS32 port.
   36  */
   37 #include "opt_uart.h"
   38 
   39 #include <sys/cdefs.h>
   40 __FBSDID("$FreeBSD: stable/12/sys/mips/cavium/uart_bus_octeonusart.c 338074 2018-08-19 21:10:21Z mmacy $");
   41 
   42 #include <sys/param.h>
   43 #include <sys/systm.h>
   44 #include <sys/bus.h>
   45 #include <sys/conf.h>
   46 #include <sys/kernel.h>
   47 #include <sys/module.h>
   48 #include <machine/bus.h>
   49 #include <sys/rman.h>
   50 #include <machine/resource.h>
   51 
   52 #include <dev/pci/pcivar.h>
   53 
   54 #include <dev/uart/uart.h>
   55 #include <dev/uart/uart_bus.h>
   56 #include <dev/uart/uart_cpu.h>
   57 
   58 #include <mips/cavium/octeon_pcmap_regs.h>
   59 
   60 #include <contrib/octeon-sdk/cvmx.h>
   61 
   62 #include "uart_if.h"
   63 
   64 extern struct uart_class uart_oct16550_class;
   65 
   66 static int uart_octeon_probe(device_t dev);
   67 
   68 static device_method_t uart_octeon_methods[] = {
   69         /* Device interface */
   70         DEVMETHOD(device_probe, uart_octeon_probe),
   71         DEVMETHOD(device_attach, uart_bus_attach),
   72         DEVMETHOD(device_detach, uart_bus_detach),
   73         {0, 0}
   74 };
   75 
   76 static driver_t uart_octeon_driver = {
   77         uart_driver_name,
   78         uart_octeon_methods,
   79         sizeof(struct uart_softc),
   80 };
   81 
   82 extern 
   83 SLIST_HEAD(uart_devinfo_list, uart_devinfo) uart_sysdevs;
   84 
   85 static int
   86 uart_octeon_probe(device_t dev)
   87 {
   88         struct uart_softc *sc;
   89         int unit;
   90 
   91         unit = device_get_unit(dev);
   92         sc = device_get_softc(dev);
   93         sc->sc_class = &uart_oct16550_class;
   94 
   95         /*
   96          * We inherit the settings from the systme console.  Note, the bst
   97          * bad bus_space_map are bogus here, but obio doesn't yet support
   98          * them, it seems.
   99          */
  100         sc->sc_sysdev = SLIST_FIRST(&uart_sysdevs);
  101         bcopy(&sc->sc_sysdev->bas, &sc->sc_bas, sizeof(sc->sc_bas));
  102         sc->sc_bas.bst = uart_bus_space_mem;
  103         /*
  104          * XXX
  105          * RBR isn't really a great base address.
  106          */
  107         if (bus_space_map(sc->sc_bas.bst, CVMX_MIO_UARTX_RBR(0),
  108             uart_getrange(sc->sc_class), 0, &sc->sc_bas.bsh) != 0)
  109                 return (ENXIO);
  110         return (uart_bus_probe(dev, sc->sc_bas.regshft, 0, 0, 0, unit, 0));
  111 }
  112 
  113 DRIVER_MODULE(uart, obio, uart_octeon_driver, uart_devclass, 0, 0);

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