The Design and Implementation of the FreeBSD Operating System, Second Edition
Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)


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FreeBSD/Linux Kernel Cross Reference
sys/mips/conf/AP143.hints

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    1 #
    2 # This file adds to the values in QCA953X_BASE.hints.
    3 #
    4 # $FreeBSD: head/sys/mips/conf/AP143.hints 328756 2018-02-01 22:00:38Z adrian $
    5 
    6 # Embedded Atheros Switch
    7 hint.arswitch.0.at="mdio1"
    8 hint.arswitch.0.is_7240=0
    9 hint.arswitch.0.is_9340=1
   10 hint.arswitch.0.numphys=4
   11 hint.arswitch.0.phy4cpu=1       # phy 4 is a "CPU" separate PHY
   12 hint.arswitch.0.is_rgmii=0
   13 hint.arswitch.0.is_gmii=1       # arge1 <-> switch PHY is GMII
   14 
   15 # arge0 - MII, autoneg, phy(4)
   16 # MAC for arge0 is the first 6 bytes of the ART
   17 hint.arge.0.eeprommac=0x1fff0000
   18 hint.arge.0.phymask=0x10        # PHY4
   19 hint.arge.0.mdio=mdioproxy2     # .. off of the switch mdiobus
   20 
   21 # arge1 - GMII, 1000/full
   22 hint.arge.1.eeprommac=0x1fff0006
   23 hint.arge.1.phymask=0x0         # No directly mapped PHYs
   24 hint.arge.1.media=1000
   25 hint.arge.1.fduplex=1
   26 
   27 # Where the ART is - last 64k in the first 8MB of flash
   28 hint.ar71xx_caldata.0.map.0.ath_fixup_addr=0x1fff0000
   29 hint.ar71xx_caldata.0.map.0.ath_fixup_size=16384
   30 
   31 # And now tell the ath(4) driver where to look!
   32 hint.ath.0.eeprom_firmware="ar71xx_caldata.0.map.0.eeprom_firmware"
   33 
   34 # The AP121 4MB flash layout:
   35 #
   36 # bootargs=console=ttyS0,115200 root=31:02 rootfstype=squashfs
   37 #    init=/sbin/init mtdparts=ar7240-nor0:256k(u-boot),64k(u-boot-env),
   38 #    2752k(rootfs),896k(uImage),64k(NVRAM),64k(ART)
   39 #
   40 # So:
   41 # 256k: uboot
   42 # 64: uboot-env
   43 # 2752k: rootfs
   44 # 896k: kernel
   45 # 64k: config
   46 # 64k: ART
   47 
   48 hint.map.0.at="flash/spi0"
   49 hint.map.0.start=0x00000000
   50 hint.map.0.end=0x000040000
   51 hint.map.0.name="uboot"
   52 hint.map.0.readonly=1
   53 
   54 hint.map.1.at="flash/spi0"
   55 hint.map.1.start=0x00040000
   56 hint.map.1.end=0x00050000
   57 hint.map.1.name="uboot-env"
   58 hint.map.1.readonly=0
   59 
   60 hint.map.2.at="flash/spi0"
   61 hint.map.2.start=0x00050000
   62 hint.map.2.end=0x00300000
   63 hint.map.2.name="rootfs"
   64 hint.map.2.readonly=0
   65 
   66 hint.map.3.at="flash/spi0"
   67 hint.map.3.start=0x00300000
   68 hint.map.3.end=0x003e0000
   69 hint.map.3.name="kernel"
   70 hint.map.3.readonly=0
   71 
   72 hint.map.4.at="flash/spi0"
   73 hint.map.4.start=0x003e0000
   74 hint.map.4.end=0x003f0000
   75 hint.map.4.name="cfg"
   76 hint.map.4.readonly=0
   77 
   78 # This is radio calibration section.  It is (or should be!) unique
   79 # for each board, to take into account thermal and electrical differences
   80 # as well as the regulatory compliance data.
   81 #
   82 hint.map.5.at="flash/spi0"
   83 hint.map.5.start=0x003f0000
   84 hint.map.5.end=0x00400000
   85 hint.map.5.name="art"
   86 hint.map.5.readonly=1
   87 
   88 # GPIO specific configuration block
   89 
   90 # Don't flip on anything that isn't already enabled.
   91 # This includes leaving the SPI CS1/CS2 pins as GPIO pins as they're
   92 # not used here.
   93 hint.gpio.0.function_set=0x00000000
   94 hint.gpio.0.function_clear=0x00000000
   95 
   96 # These are the GPIO LEDs and buttons which can be software controlled.
   97 #hint.gpio.0.pinmask=0x001c02ae
   98 # hint.gpio.0.pinmask=0x00001803
   99 
  100 # gpio0 - WLAN LED
  101 # gpio1 - USB LED
  102 # gpio11 - Jumpstart button
  103 # gpio12 - Reset button
  104 
  105 # LEDs are configured separately and driven by the LED device
  106 #hint.gpioled.0.at="gpiobus0"
  107 #hint.gpioled.0.name="wlan"
  108 #hint.gpioled.0.pins=0x0001
  109 
  110 #hint.gpioled.1.at="gpiobus0"
  111 #hint.gpioled.1.name="usb"
  112 #hint.gpioled.1.pins=0x0002

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