The Design and Implementation of the FreeBSD Operating System, Second Edition
Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)


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FreeBSD/Linux Kernel Cross Reference
sys/mips/conf/AP143.hints

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    1 #
    2 # This file adds to the values in QCA953X_BASE.hints.
    3 #
    4 # $FreeBSD: releng/11.1/sys/mips/conf/AP143.hints 291438 2015-11-29 05:49:49Z adrian $
    5 
    6 # Embedded Atheros Switch
    7 hint.arswitch.0.at="mdio1"
    8 hint.arswitch.0.is_7240=0
    9 hint.arswitch.0.is_9340=1
   10 hint.arswitch.0.numphys=4
   11 hint.arswitch.0.phy4cpu=1       # phy 4 is a "CPU" separate PHY
   12 hint.arswitch.0.is_rgmii=0
   13 hint.arswitch.0.is_gmii=1       # arge1 <-> switch PHY is GMII
   14 
   15 # arge0 - MII, autoneg, phy(4)
   16 # MAC for arge0 is the first 6 bytes of the ART
   17 hint.arge.0.eeprommac=0x1fff0000
   18 hint.arge.0.phymask=0x10        # PHY4
   19 hint.arge.0.mdio=mdioproxy2     # .. off of the switch mdiobus
   20 
   21 # arge1 - GMII, 1000/full
   22 hint.arge.1.eeprommac=0x1fff0006
   23 hint.arge.1.phymask=0x0         # No directly mapped PHYs
   24 hint.arge.1.media=1000
   25 hint.arge.1.fduplex=1
   26 
   27 # ath0: Where the ART is - last 64k in the flash
   28 hint.ath.0.eepromaddr=0x1fff0000
   29 hint.ath.0.eepromsize=16384
   30 
   31 # The AP121 4MB flash layout:
   32 #
   33 # bootargs=console=ttyS0,115200 root=31:02 rootfstype=squashfs
   34 #    init=/sbin/init mtdparts=ar7240-nor0:256k(u-boot),64k(u-boot-env),
   35 #    2752k(rootfs),896k(uImage),64k(NVRAM),64k(ART)
   36 #
   37 # So:
   38 # 256k: uboot
   39 # 64: uboot-env
   40 # 2752k: rootfs
   41 # 896k: kernel
   42 # 64k: config
   43 # 64k: ART
   44 
   45 hint.map.0.at="flash/spi0"
   46 hint.map.0.start=0x00000000
   47 hint.map.0.end=0x000040000
   48 hint.map.0.name="uboot"
   49 hint.map.0.readonly=1
   50 
   51 hint.map.1.at="flash/spi0"
   52 hint.map.1.start=0x00040000
   53 hint.map.1.end=0x00050000
   54 hint.map.1.name="uboot-env"
   55 hint.map.1.readonly=0
   56 
   57 hint.map.2.at="flash/spi0"
   58 hint.map.2.start=0x00050000
   59 hint.map.2.end=0x00300000
   60 hint.map.2.name="rootfs"
   61 hint.map.2.readonly=0
   62 
   63 hint.map.3.at="flash/spi0"
   64 hint.map.3.start=0x00300000
   65 hint.map.3.end=0x003e0000
   66 hint.map.3.name="kernel"
   67 hint.map.3.readonly=0
   68 
   69 hint.map.4.at="flash/spi0"
   70 hint.map.4.start=0x003e0000
   71 hint.map.4.end=0x003f0000
   72 hint.map.4.name="cfg"
   73 hint.map.4.readonly=0
   74 
   75 # This is radio calibration section.  It is (or should be!) unique
   76 # for each board, to take into account thermal and electrical differences
   77 # as well as the regulatory compliance data.
   78 #
   79 hint.map.5.at="flash/spi0"
   80 hint.map.5.start=0x003f0000
   81 hint.map.5.end=0x00400000
   82 hint.map.5.name="art"
   83 hint.map.5.readonly=1
   84 
   85 # GPIO specific configuration block
   86 
   87 # Don't flip on anything that isn't already enabled.
   88 # This includes leaving the SPI CS1/CS2 pins as GPIO pins as they're
   89 # not used here.
   90 hint.gpio.0.function_set=0x00000000
   91 hint.gpio.0.function_clear=0x00000000
   92 
   93 # These are the GPIO LEDs and buttons which can be software controlled.
   94 #hint.gpio.0.pinmask=0x001c02ae
   95 # hint.gpio.0.pinmask=0x00001803
   96 
   97 # gpio0 - WLAN LED
   98 # gpio1 - USB LED
   99 # gpio11 - Jumpstart button
  100 # gpio12 - Reset button
  101 
  102 # LEDs are configured separately and driven by the LED device
  103 #hint.gpioled.0.at="gpiobus0"
  104 #hint.gpioled.0.name="wlan"
  105 #hint.gpioled.0.pins=0x0001
  106 
  107 #hint.gpioled.1.at="gpiobus0"
  108 #hint.gpioled.1.name="usb"
  109 #hint.gpioled.1.pins=0x0002

Cache object: 9ef7858218ad1d743d7a616dd6024c30


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