The Design and Implementation of the FreeBSD Operating System, Second Edition
Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)


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FreeBSD/Linux Kernel Cross Reference
sys/mips/conf/WZR-HPAG300H.hints

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    1 # $FreeBSD: head/sys/mips/conf/WZR-HPAG300H.hints 275470 2014-12-03 23:37:23Z sbruno $
    2 
    3 # arge0 is connected to the LAN side of the switch PHY.
    4 # arge1 is connected to the single port WAN side of the switch PHY.
    5 
    6 hint.argemdio.0.at="nexus0"
    7 hint.argemdio.0.maddr=0x19000000
    8 hint.argemdio.0.msize=0x1000
    9 hint.argemdio.0.order=0
   10 
   11 hint.arge.0.phymask=0x0
   12 hint.arge.0.media=1000
   13 hint.arge.0.fduplex=1
   14 hint.arge.0.eeprommac=0x1f05120c
   15 hint.arge.0.mdio=mdioproxy0     # .. off of the switch mdiobus
   16 hint.arge.0.miimode=3 
   17 
   18 hint.arge.1.phymask=0x10
   19 hint.arge.1.media=1000
   20 hint.arge.1.fduplex=1
   21 hint.arge.1.eeprommac=0x1f05520c
   22 hint.arge.1.mdio=mdioproxy1     # .. off of the switch mdiobus
   23 hint.arge.1.miimode=3 
   24 
   25 #
   26 # AR8316 switch config
   27 #
   28 hint.arswitch.0.at="mdio0"
   29 hint.arswitch.0.is_7240=0       # We need to be explicitly told this
   30 hint.arswitch.0.numphys=4       # 5 active switch PHYs (PHY 0 -> 4)
   31 hint.arswitch.0.phy4cpu=1       # No, PHY 4 == dedicated PHY
   32 hint.arswitch.0.is_rgmii=1      # Yes, is RGMII
   33 hint.arswitch.0.is_gmii=0       # No, not GMII
   34 
   35 # ath0 - slot 17
   36 hint.pcib.0.bus.0.17.0.ath_fixup_addr=0x1f051000
   37 hint.pcib.0.bus.0.17.0.ath_fixup_size=4096
   38 
   39 # ath1 - slot 18
   40 hint.pcib.0.bus.0.18.0.ath_fixup_addr=0x1f055000
   41 hint.pcib.0.bus.0.18.0.ath_fixup_size=4096
   42 # .. and now, telling each ath(4) NIC where to find the firmware
   43 # image.
   44 hint.ath.0.eeprom_firmware="pcib.0.bus.0.17.0.eeprom_firmware"
   45 hint.ath.1.eeprom_firmware="pcib.0.bus.0.18.0.eeprom_firmware"
   46 
   47 # Inherited from AR71XX_BASE.hints
   48 #hint.mx25l.0.at="spibus0"
   49 #hint.mx25l.0.cs=0
   50 # This board has two 16 MB flash devices on difference Chip Select pins
   51 hint.mx25l.1.at="spibus0"
   52 hint.mx25l.1.cs=1
   53 
   54 
   55 # Geom MAP
   56 
   57 hint.map.0.at="flash/spi0"
   58 hint.map.0.start=0x00000000
   59 hint.map.0.end=0x00040000
   60 hint.map.0.name="uboot"
   61 hint.map.0.readonly=1
   62 
   63 hint.map.1.at="flash/spi0"
   64 hint.map.1.start=0x00040000
   65 hint.map.1.end=0x00050000
   66 hint.map.1.name="u-boot-env"
   67 hint.map.1.readonly=1
   68 
   69 hint.map.2.at="flash/spi0"
   70 hint.map.2.start=0x00050000
   71 hint.map.2.end=0x00060000
   72 hint.map.2.name="ART"
   73 hint.map.2.readonly=1
   74 
   75 # requires a 1M alignment and padding in the image.
   76 # make sure you are using conv=sync and bs=1M in your dd
   77 hint.map.3.at="flash/spi0"
   78 hint.map.3.start=0x00060000
   79 hint.map.3.end="search:0x00160000:0x100000:.!/bin/sh"
   80 hint.map.3.name="kernel"
   81 hint.map.3.readonly=1
   82 
   83 hint.map.4.at="flash/spi0"
   84 hint.map.4.start="search:0x00160000:0x100000:.!/bin/sh"
   85 hint.map.4.end=0x01000000
   86 hint.map.4.name="rootfs"
   87 hint.map.4.readonly=1
   88 
   89 hint.map.5.at="flash/spi1"
   90 hint.map.5.start=0x00FF0000
   91 hint.map.5.end=0x01000000
   92 hint.map.5.name="cfg"
   93 hint.map.5.readonly=0
   94 
   95 # Pin 1  - SCK
   96 # Pin 2  - SDA
   97 # Pin 3  - usb 
   98 # Pin 4  - 
   99 # Pin 5  - aoss
  100 # Pin 6  - router auto
  101 # Pin 7  - router off
  102 # Pin 8  - movie engine
  103 # Pin 9  - 
  104 # Pin 10 - 
  105 # Pin 11 - reset button
  106 # Pin 12 - CS0
  107 # Pin 13 - CS1
  108 # Pin 14 - 
  109 # Pin 15 - 
  110 # Pin 16 - 
  111 # Pin 17 - 
  112 
  113 # Don't flip on anything that isn't already enabled.
  114 # Force on CS lines for flash devices, apparently this isn't done
  115 # by uboot in normal booting.  No idea why. 
  116 hint.gpio.0.function_set=0x00003004
  117 hint.gpio.0.function_clear=0x00000000
  118 
  119 # These are the GPIO LEDs and buttons which can be software controlled.
  120 hint.gpio.0.pinmask=0x0001
  121 
  122 hint.gpio.0.pinon=0x00000004
  123 
  124 hint.gpioiic.0.at="gpiobus0"
  125 #hint.gpioiic.0.pins=0x0003
  126 hint.gpioiic.0.sda=0
  127 hint.gpioiic.0.scl=1
  128 
  129 # LEDs are configured separately and driven by the LED device
  130 hint.gpioled.0.at="gpiobus0"
  131 hint.gpioled.0.name="red-diag"
  132 hint.gpioled.0.pins=0x0001

Cache object: 56ce1b6e9f346aed1277c5f001ac0783


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