The Design and Implementation of the FreeBSD Operating System, Second Edition
Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)


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FreeBSD/Linux Kernel Cross Reference
sys/mips/gxemul/mpreg.h

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    1 /*-
    2  * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
    3  *
    4  * Copyright (c) 2004-2012 Juli Mallett <jmallett@FreeBSD.org>
    5  * All rights reserved.
    6  *
    7  * Redistribution and use in source and binary forms, with or without
    8  * modification, are permitted provided that the following conditions
    9  * are met:
   10  * 1. Redistributions of source code must retain the above copyright
   11  *    notice, this list of conditions and the following disclaimer.
   12  * 2. Redistributions in binary form must reproduce the above copyright
   13  *    notice, this list of conditions and the following disclaimer in the
   14  *    documentation and/or other materials provided with the distribution.
   15  *
   16  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
   17  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
   18  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
   19  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
   20  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
   21  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
   22  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
   23  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
   24  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
   25  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
   26  * SUCH DAMAGE.
   27  *
   28  * $FreeBSD: stable/12/sys/mips/gxemul/mpreg.h 326259 2017-11-27 15:07:26Z pfg $
   29  */
   30 
   31 #ifndef _MIPS_GXEMUL_MPREG_H_
   32 #define _MIPS_GXEMUL_MPREG_H_
   33 
   34 #define GXEMUL_MP_DEV_BASE      0x11000000
   35 
   36 #define GXEMUL_MP_DEV_WHOAMI    0x0000
   37 #define GXEMUL_MP_DEV_NCPUS     0x0010
   38 #define GXEMUL_MP_DEV_START     0x0020
   39 #define GXEMUL_MP_DEV_STARTADDR 0x0030
   40 #define GXEMUL_MP_DEV_STACK     0x0070
   41 #define GXEMUL_MP_DEV_RANDOM    0x0080
   42 #define GXEMUL_MP_DEV_MEMORY    0x0090
   43 #define GXEMUL_MP_DEV_IPI_ONE   0x00a0
   44 #define GXEMUL_MP_DEV_IPI_MANY  0x00b0
   45 #define GXEMUL_MP_DEV_IPI_READ  0x00c0
   46 #define GXEMUL_MP_DEV_CYCLES    0x00d0
   47 
   48 #ifdef _LP64
   49 #define GXEMUL_MP_DEV_FUNCTION(f)                                       \
   50         (volatile uint64_t *)MIPS_PHYS_TO_DIRECT_UNCACHED(GXEMUL_MP_DEV_BASE + (f))
   51 #define GXEMUL_MP_DEV_READ(f)                                           \
   52         (volatile uint64_t)*GXEMUL_MP_DEV_FUNCTION(f)
   53 #else
   54 #define GXEMUL_MP_DEV_FUNCTION(f)                                       \
   55         (volatile uint32_t *)MIPS_PHYS_TO_DIRECT_UNCACHED(GXEMUL_MP_DEV_BASE + (f))
   56 #define GXEMUL_MP_DEV_READ(f)                                           \
   57         (volatile uint32_t)*GXEMUL_MP_DEV_FUNCTION(f)
   58 #endif
   59 #define GXEMUL_MP_DEV_WRITE(f, v)                                       \
   60         *GXEMUL_MP_DEV_FUNCTION(f) = (v)
   61 
   62 #define GXEMUL_MP_DEV_IPI_INTERRUPT     (6)
   63 
   64 #endif /* !_MIPS_GXEMUL_MPREG_H */

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