FreeBSD/Linux Kernel Cross Reference
sys/mips/include/asm.h
1 /* $NetBSD: asm.h,v 1.29 2000/12/14 21:29:51 jeffs Exp $ */
2
3 /*
4 * Copyright (c) 1992, 1993
5 * The Regents of the University of California. All rights reserved.
6 *
7 * This code is derived from software contributed to Berkeley by
8 * Ralph Campbell.
9 *
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
12 * are met:
13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 * notice, this list of conditions and the following disclaimer in the
17 * documentation and/or other materials provided with the distribution.
18 * 4. Neither the name of the University nor the names of its contributors
19 * may be used to endorse or promote products derived from this software
20 * without specific prior written permission.
21 *
22 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
23 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
25 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
26 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
28 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
29 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
30 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
31 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
32 * SUCH DAMAGE.
33 *
34 * @(#)machAsmDefs.h 8.1 (Berkeley) 6/10/93
35 * JNPR: asm.h,v 1.10 2007/08/09 11:23:32 katta
36 * $FreeBSD$
37 */
38
39 /*
40 * machAsmDefs.h --
41 *
42 * Macros used when writing assembler programs.
43 *
44 * Copyright (C) 1989 Digital Equipment Corporation.
45 * Permission to use, copy, modify, and distribute this software and
46 * its documentation for any purpose and without fee is hereby granted,
47 * provided that the above copyright notice appears in all copies.
48 * Digital Equipment Corporation makes no representations about the
49 * suitability of this software for any purpose. It is provided "as is"
50 * without express or implied warranty.
51 *
52 * from: Header: /sprite/src/kernel/mach/ds3100.md/RCS/machAsmDefs.h,
53 * v 1.2 89/08/15 18:28:24 rab Exp SPRITE (DECWRL)
54 */
55
56 #ifndef _MACHINE_ASM_H_
57 #define _MACHINE_ASM_H_
58
59 #include <machine/regdef.h>
60 #include <machine/endian.h>
61 #include <machine/cdefs.h>
62
63 #undef __FBSDID
64 #if !defined(lint) && !defined(STRIP_FBSDID)
65 #define __FBSDID(s) .ident s
66 #else
67 #define __FBSDID(s) /* nothing */
68 #endif
69
70 /*
71 * Define -pg profile entry code.
72 * Must always be noreorder, must never use a macro instruction
73 * Final addiu to t9 must always equal the size of this _KERN_MCOUNT
74 */
75 #define _KERN_MCOUNT \
76 .set push; \
77 .set noreorder; \
78 .set noat; \
79 subu sp,sp,16; \
80 sw t9,12(sp); \
81 move AT,ra; \
82 lui t9,%hi(_mcount); \
83 addiu t9,t9,%lo(_mcount); \
84 jalr t9; \
85 nop; \
86 lw t9,4(sp); \
87 addiu sp,sp,8; \
88 addiu t9,t9,40; \
89 .set pop;
90
91 #ifdef GPROF
92 #define MCOUNT _KERN_MCOUNT
93 #else
94 #define MCOUNT
95 #endif
96
97 #define _C_LABEL(x) x
98
99 #ifdef USE_AENT
100 #define AENT(x) \
101 .aent x, 0
102 #else
103 #define AENT(x)
104 #endif
105
106 /*
107 * WARN_REFERENCES: create a warning if the specified symbol is referenced
108 */
109 #define WARN_REFERENCES(_sym,_msg) \
110 .section .gnu.warning. ## _sym ; .ascii _msg ; .text
111
112 #ifdef __ELF__
113 # define _C_LABEL(x) x
114 #else
115 # define _C_LABEL(x) _ ## x
116 #endif
117
118 /*
119 * WEAK_ALIAS: create a weak alias.
120 */
121 #define WEAK_ALIAS(alias,sym) \
122 .weak alias; \
123 alias = sym
124
125 /*
126 * STRONG_ALIAS: create a strong alias.
127 */
128 #define STRONG_ALIAS(alias,sym) \
129 .globl alias; \
130 alias = sym
131
132 #define GLOBAL(sym) \
133 .globl sym; sym:
134
135 #define ENTRY(sym) \
136 .text; .globl sym; .ent sym; sym:
137
138 #define ASM_ENTRY(sym) \
139 .text; .globl sym; .type sym,@function; sym:
140
141 /*
142 * LEAF
143 * A leaf routine does
144 * - call no other function,
145 * - never use any register that callee-saved (S0-S8), and
146 * - not use any local stack storage.
147 */
148 #define LEAF(x) \
149 .globl _C_LABEL(x); \
150 .ent _C_LABEL(x), 0; \
151 _C_LABEL(x): ; \
152 .frame sp, 0, ra; \
153 MCOUNT
154
155 /*
156 * LEAF_NOPROFILE
157 * No profilable leaf routine.
158 */
159 #define LEAF_NOPROFILE(x) \
160 .globl _C_LABEL(x); \
161 .ent _C_LABEL(x), 0; \
162 _C_LABEL(x): ; \
163 .frame sp, 0, ra
164
165 /*
166 * XLEAF
167 * declare alternate entry to leaf routine
168 */
169 #define XLEAF(x) \
170 .globl _C_LABEL(x); \
171 AENT (_C_LABEL(x)); \
172 _C_LABEL(x):
173
174 /*
175 * NESTED
176 * A function calls other functions and needs
177 * therefore stack space to save/restore registers.
178 */
179 #define NESTED(x, fsize, retpc) \
180 .globl _C_LABEL(x); \
181 .ent _C_LABEL(x), 0; \
182 _C_LABEL(x): ; \
183 .frame sp, fsize, retpc; \
184 MCOUNT
185
186 /*
187 * NESTED_NOPROFILE(x)
188 * No profilable nested routine.
189 */
190 #define NESTED_NOPROFILE(x, fsize, retpc) \
191 .globl _C_LABEL(x); \
192 .ent _C_LABEL(x), 0; \
193 _C_LABEL(x): ; \
194 .frame sp, fsize, retpc
195
196 /*
197 * XNESTED
198 * declare alternate entry point to nested routine.
199 */
200 #define XNESTED(x) \
201 .globl _C_LABEL(x); \
202 AENT (_C_LABEL(x)); \
203 _C_LABEL(x):
204
205 /*
206 * END
207 * Mark end of a procedure.
208 */
209 #define END(x) \
210 .end _C_LABEL(x)
211
212 /*
213 * IMPORT -- import external symbol
214 */
215 #define IMPORT(sym, size) \
216 .extern _C_LABEL(sym),size
217
218 /*
219 * EXPORT -- export definition of symbol
220 */
221 #define EXPORT(x) \
222 .globl _C_LABEL(x); \
223 _C_LABEL(x):
224
225 /*
226 * VECTOR
227 * exception vector entrypoint
228 * XXX: regmask should be used to generate .mask
229 */
230 #define VECTOR(x, regmask) \
231 .ent _C_LABEL(x),0; \
232 EXPORT(x); \
233
234 #define VECTOR_END(x) \
235 EXPORT(x ## End); \
236 END(x)
237
238 /*
239 * Macros to panic and printf from assembly language.
240 */
241 #define PANIC(msg) \
242 PTR_LA a0, 9f; \
243 jal _C_LABEL(panic); \
244 nop; \
245 MSG(msg)
246
247 #define PANIC_KSEG0(msg, reg) PANIC(msg)
248
249 #define PRINTF(msg) \
250 PTR_LA a0, 9f; \
251 jal _C_LABEL(printf); \
252 nop; \
253 MSG(msg)
254
255 #define MSG(msg) \
256 .rdata; \
257 9: .asciiz msg; \
258 .text
259
260 #define ASMSTR(str) \
261 .asciiz str; \
262 .align 3
263
264 #if defined(__mips_o32)
265 #define SZREG 4
266 #else
267 #define SZREG 8
268 #endif
269
270 #if defined(__mips_o32) || defined(__mips_o64)
271 #define ALSK 7 /* stack alignment */
272 #define ALMASK -7 /* stack alignment */
273 #define SZFPREG 4
274 #define FP_L lwc1
275 #define FP_S swc1
276 #else
277 #define ALSK 15 /* stack alignment */
278 #define ALMASK -15 /* stack alignment */
279 #define SZFPREG 8
280 #define FP_L ldc1
281 #define FP_S sdc1
282 #endif
283
284 /*
285 * standard callframe {
286 * register_t cf_pad[N]; o32/64 (N=0), n32 (N=1) n64 (N=1)
287 * register_t cf_args[4]; arg0 - arg3 (only on o32 and o64)
288 * register_t cf_gp; global pointer (only on n32 and n64)
289 * register_t cf_sp; frame pointer
290 * register_t cf_ra; return address
291 * };
292 */
293 #if defined(__mips_o32) || defined(__mips_o64)
294 #define CALLFRAME_SIZ (SZREG * (4 + 2))
295 #define CALLFRAME_S0 0
296 #elif defined(__mips_n32) || defined(__mips_n64)
297 #define CALLFRAME_SIZ (SZREG * 4)
298 #define CALLFRAME_S0 (CALLFRAME_SIZ - 4 * SZREG)
299 #endif
300 #ifndef _KERNEL
301 #define CALLFRAME_GP (CALLFRAME_SIZ - 3 * SZREG)
302 #endif
303 #define CALLFRAME_SP (CALLFRAME_SIZ - 2 * SZREG)
304 #define CALLFRAME_RA (CALLFRAME_SIZ - 1 * SZREG)
305
306 /*
307 * Endian-independent assembly-code aliases for unaligned memory accesses.
308 */
309 #if _BYTE_ORDER == _LITTLE_ENDIAN
310 # define LWHI lwr
311 # define LWLO lwl
312 # define SWHI swr
313 # define SWLO swl
314 # if SZREG == 4
315 # define REG_LHI lwr
316 # define REG_LLO lwl
317 # define REG_SHI swr
318 # define REG_SLO swl
319 # else
320 # define REG_LHI ldr
321 # define REG_LLO ldl
322 # define REG_SHI sdr
323 # define REG_SLO sdl
324 # endif
325 #endif
326
327 #if _BYTE_ORDER == _BIG_ENDIAN
328 # define LWHI lwl
329 # define LWLO lwr
330 # define SWHI swl
331 # define SWLO swr
332 # if SZREG == 4
333 # define REG_LHI lwl
334 # define REG_LLO lwr
335 # define REG_SHI swl
336 # define REG_SLO swr
337 # else
338 # define REG_LHI ldl
339 # define REG_LLO ldr
340 # define REG_SHI sdl
341 # define REG_SLO sdr
342 # endif
343 #endif
344
345 /*
346 * While it would be nice to be compatible with the SGI
347 * REG_L and REG_S macros, because they do not take parameters, it
348 * is impossible to use them with the _MIPS_SIM_ABIX32 model.
349 *
350 * These macros hide the use of mips3 instructions from the
351 * assembler to prevent the assembler from generating 64-bit style
352 * ABI calls.
353 */
354 #if _MIPS_SZPTR == 32
355 #define PTR_ADD add
356 #define PTR_ADDI addi
357 #define PTR_ADDU addu
358 #define PTR_ADDIU addiu
359 #define PTR_SUB add
360 #define PTR_SUBI subi
361 #define PTR_SUBU subu
362 #define PTR_SUBIU subu
363 #define PTR_L lw
364 #define PTR_LA la
365 #define PTR_LI li
366 #define PTR_S sw
367 #define PTR_SLL sll
368 #define PTR_SLLV sllv
369 #define PTR_SRL srl
370 #define PTR_SRLV srlv
371 #define PTR_SRA sra
372 #define PTR_SRAV srav
373 #define PTR_LL ll
374 #define PTR_SC sc
375 #define PTR_WORD .word
376 #define PTR_SCALESHIFT 2
377 #else /* _MIPS_SZPTR == 64 */
378 #define PTR_ADD dadd
379 #define PTR_ADDI daddi
380 #define PTR_ADDU daddu
381 #define PTR_ADDIU daddiu
382 #define PTR_SUB dadd
383 #define PTR_SUBI dsubi
384 #define PTR_SUBU dsubu
385 #define PTR_SUBIU dsubu
386 #define PTR_L ld
387 #define PTR_LA dla
388 #define PTR_LI dli
389 #define PTR_S sd
390 #define PTR_SLL dsll
391 #define PTR_SLLV dsllv
392 #define PTR_SRL dsrl
393 #define PTR_SRLV dsrlv
394 #define PTR_SRA dsra
395 #define PTR_SRAV dsrav
396 #define PTR_LL lld
397 #define PTR_SC scd
398 #define PTR_WORD .dword
399 #define PTR_SCALESHIFT 3
400 #endif /* _MIPS_SZPTR == 64 */
401
402 #if _MIPS_SZINT == 32
403 #define INT_ADD add
404 #define INT_ADDI addi
405 #define INT_ADDU addu
406 #define INT_ADDIU addiu
407 #define INT_SUB add
408 #define INT_SUBI subi
409 #define INT_SUBU subu
410 #define INT_SUBIU subu
411 #define INT_L lw
412 #define INT_LA la
413 #define INT_S sw
414 #define INT_SLL sll
415 #define INT_SLLV sllv
416 #define INT_SRL srl
417 #define INT_SRLV srlv
418 #define INT_SRA sra
419 #define INT_SRAV srav
420 #define INT_LL ll
421 #define INT_SC sc
422 #define INT_WORD .word
423 #define INT_SCALESHIFT 2
424 #else
425 #define INT_ADD dadd
426 #define INT_ADDI daddi
427 #define INT_ADDU daddu
428 #define INT_ADDIU daddiu
429 #define INT_SUB dadd
430 #define INT_SUBI dsubi
431 #define INT_SUBU dsubu
432 #define INT_SUBIU dsubu
433 #define INT_L ld
434 #define INT_LA dla
435 #define INT_S sd
436 #define INT_SLL dsll
437 #define INT_SLLV dsllv
438 #define INT_SRL dsrl
439 #define INT_SRLV dsrlv
440 #define INT_SRA dsra
441 #define INT_SRAV dsrav
442 #define INT_LL lld
443 #define INT_SC scd
444 #define INT_WORD .dword
445 #define INT_SCALESHIFT 3
446 #endif
447
448 #if _MIPS_SZLONG == 32
449 #define LONG_ADD add
450 #define LONG_ADDI addi
451 #define LONG_ADDU addu
452 #define LONG_ADDIU addiu
453 #define LONG_SUB add
454 #define LONG_SUBI subi
455 #define LONG_SUBU subu
456 #define LONG_SUBIU subu
457 #define LONG_L lw
458 #define LONG_LA la
459 #define LONG_S sw
460 #define LONG_SLL sll
461 #define LONG_SLLV sllv
462 #define LONG_SRL srl
463 #define LONG_SRLV srlv
464 #define LONG_SRA sra
465 #define LONG_SRAV srav
466 #define LONG_LL ll
467 #define LONG_SC sc
468 #define LONG_WORD .word
469 #define LONG_SCALESHIFT 2
470 #else
471 #define LONG_ADD dadd
472 #define LONG_ADDI daddi
473 #define LONG_ADDU daddu
474 #define LONG_ADDIU daddiu
475 #define LONG_SUB dadd
476 #define LONG_SUBI dsubi
477 #define LONG_SUBU dsubu
478 #define LONG_SUBIU dsubu
479 #define LONG_L ld
480 #define LONG_LA dla
481 #define LONG_S sd
482 #define LONG_SLL dsll
483 #define LONG_SLLV dsllv
484 #define LONG_SRL dsrl
485 #define LONG_SRLV dsrlv
486 #define LONG_SRA dsra
487 #define LONG_SRAV dsrav
488 #define LONG_LL lld
489 #define LONG_SC scd
490 #define LONG_WORD .dword
491 #define LONG_SCALESHIFT 3
492 #endif
493
494 #if SZREG == 4
495 #define REG_L lw
496 #define REG_S sw
497 #define REG_LI li
498 #define REG_ADDU addu
499 #define REG_SLL sll
500 #define REG_SLLV sllv
501 #define REG_SRL srl
502 #define REG_SRLV srlv
503 #define REG_SRA sra
504 #define REG_SRAV srav
505 #define REG_LL ll
506 #define REG_SC sc
507 #define REG_SCALESHIFT 2
508 #else
509 #define REG_L ld
510 #define REG_S sd
511 #define REG_LI dli
512 #define REG_ADDU daddu
513 #define REG_SLL dsll
514 #define REG_SLLV dsllv
515 #define REG_SRL dsrl
516 #define REG_SRLV dsrlv
517 #define REG_SRA dsra
518 #define REG_SRAV dsrav
519 #define REG_LL lld
520 #define REG_SC scd
521 #define REG_SCALESHIFT 3
522 #endif
523
524 #if _MIPS_ISA == _MIPS_ISA_MIPS1 || _MIPS_ISA == _MIPS_ISA_MIPS2 || \
525 _MIPS_ISA == _MIPS_ISA_MIPS32
526 #define MFC0 mfc0
527 #define MTC0 mtc0
528 #endif
529 #if _MIPS_ISA == _MIPS_ISA_MIPS3 || _MIPS_ISA == _MIPS_ISA_MIPS4 || \
530 _MIPS_ISA == _MIPS_ISA_MIPS64
531 #define MFC0 dmfc0
532 #define MTC0 dmtc0
533 #endif
534
535 #if defined(__mips_o32) || defined(__mips_o64)
536
537 #ifdef __ABICALLS__
538 #define CPRESTORE(r) .cprestore r
539 #define CPLOAD(r) .cpload r
540 #else
541 #define CPRESTORE(r) /* not needed */
542 #define CPLOAD(r) /* not needed */
543 #endif
544
545 #define SETUP_GP \
546 .set push; \
547 .set noreorder; \
548 .cpload t9; \
549 .set pop
550 #define SETUP_GPX(r) \
551 .set push; \
552 .set noreorder; \
553 move r,ra; /* save old ra */ \
554 bal 7f; \
555 nop; \
556 7: .cpload ra; \
557 move ra,r; \
558 .set pop
559 #define SETUP_GPX_L(r,lbl) \
560 .set push; \
561 .set noreorder; \
562 move r,ra; /* save old ra */ \
563 bal lbl; \
564 nop; \
565 lbl: .cpload ra; \
566 move ra,r; \
567 .set pop
568 #define SAVE_GP(x) .cprestore x
569
570 #define SETUP_GP64(a,b) /* n32/n64 specific */
571 #define SETUP_GP64_R(a,b) /* n32/n64 specific */
572 #define SETUP_GPX64(a,b) /* n32/n64 specific */
573 #define SETUP_GPX64_L(a,b,c) /* n32/n64 specific */
574 #define RESTORE_GP64 /* n32/n64 specific */
575 #define USE_ALT_CP(a) /* n32/n64 specific */
576 #endif /* __mips_o32 || __mips_o64 */
577
578 #if defined(__mips_o32) || defined(__mips_o64)
579 #define REG_PROLOGUE .set push
580 #define REG_EPILOGUE .set pop
581 #endif
582 #if defined(__mips_n32) || defined(__mips_n64)
583 #define REG_PROLOGUE .set push ; .set mips3
584 #define REG_EPILOGUE .set pop
585 #endif
586
587 #if defined(__mips_n32) || defined(__mips_n64)
588 #define SETUP_GP /* o32 specific */
589 #define SETUP_GPX(r) /* o32 specific */
590 #define SETUP_GPX_L(r,lbl) /* o32 specific */
591 #define SAVE_GP(x) /* o32 specific */
592 #define SETUP_GP64(a,b) .cpsetup $25, a, b
593 #define SETUP_GPX64(a,b) \
594 .set push; \
595 move b,ra; \
596 .set noreorder; \
597 bal 7f; \
598 nop; \
599 7: .set pop; \
600 .cpsetup ra, a, 7b; \
601 move ra,b
602 #define SETUP_GPX64_L(a,b,c) \
603 .set push; \
604 move b,ra; \
605 .set noreorder; \
606 bal c; \
607 nop; \
608 c: .set pop; \
609 .cpsetup ra, a, c; \
610 move ra,b
611 #define RESTORE_GP64 .cpreturn
612 #define USE_ALT_CP(a) .cplocal a
613 #endif /* __mips_n32 || __mips_n64 */
614
615 #define GET_CPU_PCPU(reg) \
616 PTR_L reg, _C_LABEL(pcpup);
617
618 /*
619 * Description of the setjmp buffer
620 *
621 * word 0 magic number (dependant on creator)
622 * 1 RA
623 * 2 S0
624 * 3 S1
625 * 4 S2
626 * 5 S3
627 * 6 S4
628 * 7 S5
629 * 8 S6
630 * 9 S7
631 * 10 SP
632 * 11 S8
633 * 12 GP (dependent on ABI)
634 * 13 signal mask (dependant on magic)
635 * 14 (con't)
636 * 15 (con't)
637 * 16 (con't)
638 *
639 * The magic number number identifies the jmp_buf and
640 * how the buffer was created as well as providing
641 * a sanity check
642 *
643 */
644
645 #define _JB_MAGIC__SETJMP 0xBADFACED
646 #define _JB_MAGIC_SETJMP 0xFACEDBAD
647
648 /* Valid for all jmp_buf's */
649
650 #define _JB_MAGIC 0
651 #define _JB_REG_RA 1
652 #define _JB_REG_S0 2
653 #define _JB_REG_S1 3
654 #define _JB_REG_S2 4
655 #define _JB_REG_S3 5
656 #define _JB_REG_S4 6
657 #define _JB_REG_S5 7
658 #define _JB_REG_S6 8
659 #define _JB_REG_S7 9
660 #define _JB_REG_SP 10
661 #define _JB_REG_S8 11
662 #if defined(__mips_n32) || defined(__mips_n64)
663 #define _JB_REG_GP 12
664 #endif
665
666 /* Only valid with the _JB_MAGIC_SETJMP magic */
667
668 #define _JB_SIGMASK 13
669 #define __JB_SIGMASK_REMAINDER 14 /* sigmask_t is 128-bits */
670
671 #define _JB_FPREG_F20 15
672 #define _JB_FPREG_F21 16
673 #define _JB_FPREG_F22 17
674 #define _JB_FPREG_F23 18
675 #define _JB_FPREG_F24 19
676 #define _JB_FPREG_F25 20
677 #define _JB_FPREG_F26 21
678 #define _JB_FPREG_F27 22
679 #define _JB_FPREG_F28 23
680 #define _JB_FPREG_F29 24
681 #define _JB_FPREG_F30 25
682 #define _JB_FPREG_F31 26
683 #define _JB_FPREG_FCSR 27
684
685 /*
686 * Various macros for dealing with TLB hazards
687 * (a) why so many?
688 * (b) when to use?
689 * (c) why not used everywhere?
690 */
691 /*
692 * Assume that w alaways need nops to escape CP0 hazard
693 * TODO: Make hazard delays configurable. Stuck with 5 cycles on the moment
694 * For more info on CP0 hazards see Chapter 7 (p.99) of "MIPS32 Architecture
695 * For Programmers Volume III: The MIPS32 Privileged Resource Architecture"
696 */
697 #if defined(CPU_NLM)
698 #define HAZARD_DELAY sll $0,3
699 #define ITLBNOPFIX sll $0,3
700 #elif defined(CPU_RMI)
701 #define HAZARD_DELAY
702 #define ITLBNOPFIX
703 #elif defined(CPU_MIPS74K)
704 #define HAZARD_DELAY sll $0,$0,3
705 #define ITLBNOPFIX sll $0,$0,3
706 #else
707 #define ITLBNOPFIX nop;nop;nop;nop;nop;nop;nop;nop;nop;sll $0,$0,3;
708 #define HAZARD_DELAY nop;nop;nop;nop;sll $0,$0,3;
709 #endif
710
711 #endif /* !_MACHINE_ASM_H_ */
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