The Design and Implementation of the FreeBSD Operating System, Second Edition
Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)


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FreeBSD/Linux Kernel Cross Reference
sys/mips/include/cache_mipsNN.h

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    1 /*      $NetBSD: cache_mipsNN.h,v 1.4 2003/02/17 11:35:02 simonb Exp $  */
    2 
    3 /*
    4  * Copyright 2002 Wasabi Systems, Inc.
    5  * All rights reserved.
    6  *
    7  * Written by Simon Burge for Wasabi Systems, Inc.
    8  *
    9  * Redistribution and use in source and binary forms, with or without
   10  * modification, are permitted provided that the following conditions
   11  * are met:
   12  * 1. Redistributions of source code must retain the above copyright
   13  *    notice, this list of conditions and the following disclaimer.
   14  * 2. Redistributions in binary form must reproduce the above copyright
   15  *    notice, this list of conditions and the following disclaimer in the
   16  *    documentation and/or other materials provided with the distribution.
   17  * 3. All advertising materials mentioning features or use of this software
   18  *    must display the following acknowledgement:
   19  *      This product includes software developed for the NetBSD Project by
   20  *      Wasabi Systems, Inc.
   21  * 4. The name of Wasabi Systems, Inc. may not be used to endorse
   22  *    or promote products derived from this software without specific prior
   23  *    written permission.
   24  *
   25  * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
   26  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
   27  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
   28  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL WASABI SYSTEMS, INC
   29  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
   30  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
   31  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
   32  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
   33  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
   34  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
   35  * POSSIBILITY OF SUCH DAMAGE.
   36  *
   37  * $FreeBSD: stable/8/sys/mips/include/cache_mipsNN.h 215938 2010-11-27 12:26:40Z jchandra $
   38  */
   39 #ifndef _MACHINE_CACHE_MIPSNN_H_
   40 #define _MACHINE_CACHE_MIPSNN_H_
   41 
   42 void    mipsNN_cache_init(struct mips_cpuinfo *);
   43 
   44 void    mipsNN_icache_sync_all_16(void);
   45 void    mipsNN_icache_sync_all_32(void);
   46 void    mipsNN_icache_sync_range_16(vm_offset_t, vm_size_t);
   47 void    mipsNN_icache_sync_range_32(vm_offset_t, vm_size_t);
   48 void    mipsNN_icache_sync_range_index_16(vm_offset_t, vm_size_t);
   49 void    mipsNN_icache_sync_range_index_32(vm_offset_t, vm_size_t);
   50 void    mipsNN_pdcache_wbinv_all_16(void);
   51 void    mipsNN_pdcache_wbinv_all_32(void);
   52 void    mipsNN_pdcache_wbinv_range_16(vm_offset_t, vm_size_t);
   53 void    mipsNN_pdcache_wbinv_range_32(vm_offset_t, vm_size_t);
   54 void    mipsNN_pdcache_wbinv_range_index_16(vm_offset_t, vm_size_t);
   55 void    mipsNN_pdcache_wbinv_range_index_32(vm_offset_t, vm_size_t);
   56 void    mipsNN_pdcache_inv_range_16(vm_offset_t, vm_size_t);
   57 void    mipsNN_pdcache_inv_range_32(vm_offset_t, vm_size_t);
   58 void    mipsNN_pdcache_wb_range_16(vm_offset_t, vm_size_t);
   59 void    mipsNN_pdcache_wb_range_32(vm_offset_t, vm_size_t);
   60 #ifdef CPU_CNMIPS
   61 void    mipsNN_icache_sync_all_128(void);
   62 void    mipsNN_icache_sync_range_128(vm_offset_t, vm_size_t);
   63 void    mipsNN_icache_sync_range_index_128(vm_offset_t, vm_size_t);
   64 void    mipsNN_pdcache_wbinv_all_128(void);
   65 void    mipsNN_pdcache_wbinv_range_128(vm_offset_t, vm_size_t);
   66 void    mipsNN_pdcache_wbinv_range_index_128(vm_offset_t, vm_size_t);
   67 void    mipsNN_pdcache_inv_range_128(vm_offset_t, vm_size_t);
   68 void    mipsNN_pdcache_wb_range_128(vm_offset_t, vm_size_t);
   69 #endif
   70 
   71 #endif  /* _MACHINE_CACHE_MIPSNN_H_ */

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