1 /* $NetBSD: intr.h,v 1.5 1996/05/13 06:11:28 mycroft Exp $ */
2
3 /*-
4 * Copyright (c) 1996 Charles M. Hannum. All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * 3. All advertising materials mentioning features or use of this software
15 * must display the following acknowledgement:
16 * This product includes software developed by Charles M. Hannum.
17 * 4. The name of the author may not be used to endorse or promote products
18 * derived from this software without specific prior written permission.
19 *
20 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
21 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
22 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
23 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
24 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
25 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
26 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
27 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
28 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
29 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
30 *
31 * JNPR: intr.h,v 1.4 2007/08/09 11:23:32 katta
32 * $FreeBSD: releng/8.0/sys/mips/include/intr.h 178172 2008-04-13 07:27:37Z imp $
33 */
34
35 #ifndef _MACHINE_INTR_H_
36 #define _MACHINE_INTR_H_
37
38 /* Interrupt sharing types. */
39 #define IST_NONE 0 /* none */
40 #define IST_PULSE 1 /* pulsed */
41 #define IST_EDGE 2 /* edge-triggered */
42 #define IST_LEVEL 3 /* level-triggered */
43
44 #ifndef _LOCORE
45
46 /*
47 * Index into intrcnt[], which is defined in exceptions.S
48 * Index # = irq # - 1
49 */
50 #define INTRCNT_HARDCLOCK 0
51 #define INTRCNT_RTC 1
52 #define INTRCNT_SIO 2 /* irq 3 */
53 #define INTRCNT_PE 3 /* irq 4 */
54 #define INTRCNT_PICNIC 4 /* irq 5 */
55
56 extern uint32_t idle_mask;
57 extern void (*mips_ack_interrupt)(int, uint32_t);
58
59 typedef int ih_func_t(void *);
60
61 struct intr_event;
62
63 struct mips_intr_handler {
64 int (*ih_func) (void *);
65 void *ih_arg;
66 struct intr_event *ih_event;
67 u_int ih_flags;
68 volatile long *ih_count;
69 int ih_level;
70 int ih_irq;
71 void *frame;
72 };
73
74 extern struct mips_intr_handler intr_handlers[];
75
76 typedef void (*mask_fn)(void *);
77
78 void mips_mask_irq(void);
79 void mips_unmask_irq(void);
80
81 struct trapframe;
82 void mips_set_intr(int pri, uint32_t mask,
83 uint32_t (*int_hand)(uint32_t, struct trapframe *));
84 uint32_t mips_handle_interrupts(uint32_t pending, struct trapframe *cf);
85 void intr_enable_source(uintptr_t irq);
86 struct trapframe * mips_get_trapframe(void *ih_arg);
87 int inthand_add(const char *name, u_int irq, void (*handler)(void *),
88 void *arg, int flags, void **cookiep);
89 int inthand_remove(u_int irq, void *cookie);
90 void bvif_attach(void);
91
92 #endif /* _LOCORE */
93
94 #endif /* !_MACHINE_INTR_H_ */
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