The Design and Implementation of the FreeBSD Operating System, Second Edition
Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)


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FreeBSD/Linux Kernel Cross Reference
sys/mips/include/locore.h

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    1 /* $NetBSD: locore.h,v 1.78 2007/10/17 19:55:36 garbled Exp $ */
    2 
    3 /*
    4  * Copyright 1996 The Board of Trustees of The Leland Stanford
    5  * Junior University. All Rights Reserved.
    6  *
    7  * Permission to use, copy, modify, and distribute this
    8  * software and its documentation for any purpose and without
    9  * fee is hereby granted, provided that the above copyright
   10  * notice appear in all copies.  Stanford University
   11  * makes no representations about the suitability of this
   12  * software for any purpose.  It is provided "as is" without
   13  * express or implied warranty.
   14  *
   15  * $FreeBSD: stable/8/sys/mips/include/locore.h 215938 2010-11-27 12:26:40Z jchandra $
   16  */
   17 
   18 /*
   19  * Jump table for MIPS cpu locore functions that are implemented
   20  * differently on different generations, or instruction-level
   21  * archtecture (ISA) level, the Mips family.
   22  *
   23  * We currently provide support for MIPS I and MIPS III.
   24  */
   25 
   26 #ifndef _MIPS_LOCORE_H
   27 #define _MIPS_LOCORE_H
   28 
   29 #include <machine/cpufunc.h>
   30 #include <machine/cpuregs.h>
   31 #include <machine/frame.h>
   32 #include <machine/md_var.h>
   33 
   34 /*
   35  * CPU identification, from PRID register.
   36  */
   37 typedef int mips_prid_t;
   38 
   39 #define MIPS_PRID_REV(x)        (((x) >>  0) & 0x00ff)
   40 #define MIPS_PRID_IMPL(x)       (((x) >>  8) & 0x00ff)
   41 
   42 /* pre-MIPS32/64 */
   43 #define MIPS_PRID_RSVD(x)       (((x) >> 16) & 0xffff)
   44 #define MIPS_PRID_REV_MIN(x)    ((MIPS_PRID_REV(x) >> 0) & 0x0f)
   45 #define MIPS_PRID_REV_MAJ(x)    ((MIPS_PRID_REV(x) >> 4) & 0x0f)
   46 
   47 /* MIPS32/64 */
   48 #define MIPS_PRID_CID(x)        (((x) >> 16) & 0x00ff)  /* Company ID */
   49 #define MIPS_PRID_CID_PREHISTORIC       0x00    /* Not MIPS32/64 */
   50 #define MIPS_PRID_CID_MTI               0x01    /* MIPS Technologies, Inc. */
   51 #define MIPS_PRID_CID_BROADCOM          0x02    /* Broadcom */
   52 #define MIPS_PRID_CID_ALCHEMY           0x03    /* Alchemy Semiconductor */
   53 #define MIPS_PRID_CID_SIBYTE            0x04    /* SiByte */
   54 #define MIPS_PRID_CID_SANDCRAFT         0x05    /* SandCraft */
   55 #define MIPS_PRID_CID_PHILIPS           0x06    /* Philips */
   56 #define MIPS_PRID_CID_TOSHIBA           0x07    /* Toshiba */
   57 #define MIPS_PRID_CID_LSI               0x08    /* LSI */
   58                                 /*      0x09    unannounced */
   59                                 /*      0x0a    unannounced */
   60 #define MIPS_PRID_CID_LEXRA             0x0b    /* Lexra */
   61 #define MIPS_PRID_CID_RMI               0x0c    /* RMI */
   62 #define MIPS_PRID_CID_CAVIUM            0x0d    /* Cavium */
   63 #define MIPS_PRID_COPTS(x)      (((x) >> 24) & 0x00ff)  /* Company Options */
   64 
   65 #ifdef _KERNEL
   66 #ifdef __HAVE_MIPS_MACHDEP_CACHE_CONFIG
   67 void mips_machdep_cache_config(void);
   68 #endif
   69 #endif  /* _KERNEL */
   70 #endif  /* _MIPS_LOCORE_H */

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