1 /* $OpenBSD: regnum.h,v 1.3 1999/01/27 04:46:06 imp Exp $ */
2
3 /*-
4 * Copyright (c) 1988 University of Utah.
5 * Copyright (c) 1992, 1993
6 * The Regents of the University of California. All rights reserved.
7 *
8 * This code is derived from software contributed to Berkeley by
9 * the Systems Programming Group of the University of Utah Computer
10 * Science Department and Ralph Campbell.
11 *
12 * Redistribution and use in source and binary forms, with or without
13 * modification, are permitted provided that the following conditions
14 * are met:
15 * 1. Redistributions of source code must retain the above copyright
16 * notice, this list of conditions and the following disclaimer.
17 * 2. Redistributions in binary form must reproduce the above copyright
18 * notice, this list of conditions and the following disclaimer in the
19 * documentation and/or other materials provided with the distribution.
20 * 4. Neither the name of the University nor the names of its contributors
21 * may be used to endorse or promote products derived from this software
22 * without specific prior written permission.
23 *
24 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
25 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
27 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
30 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
31 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
32 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
33 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
34 * SUCH DAMAGE.
35 *
36 * from: Utah Hdr: reg.h 1.1 90/07/09
37 * @(#)reg.h 8.2 (Berkeley) 1/11/94
38 * JNPR: regnum.h,v 1.6 2007/08/09 11:23:32 katta
39 * $FreeBSD: releng/10.0/sys/mips/include/regnum.h 249901 2013-04-25 17:23:54Z imp $
40 */
41
42 #ifndef _MACHINE_REGNUM_H_
43 #define _MACHINE_REGNUM_H_
44
45 /*
46 * Location of the saved registers relative to ZERO.
47 * This must match struct trapframe defined in frame.h exactly.
48 * This must also match regdef.h.
49 */
50 #define ZERO 0
51 #define AST 1
52 #define V0 2
53 #define V1 3
54 #define A0 4
55 #define A1 5
56 #define A2 6
57 #define A3 7
58 #if defined(__mips_n32) || defined(__mips_n64)
59 #define A4 8
60 #define A5 9
61 #define A6 10
62 #define A7 11
63 #define T0 12
64 #define T1 13
65 #define T2 14
66 #define T3 15
67 #else
68 #define T0 8
69 #define T1 9
70 #define T2 10
71 #define T3 11
72 #define T4 12
73 #define T5 13
74 #define T6 14
75 #define T7 15
76 #endif
77 #define S0 16
78 #define S1 17
79 #define S2 18
80 #define S3 19
81 #define S4 20
82 #define S5 21
83 #define S6 22
84 #define S7 23
85 #define T8 24
86 #define T9 25
87 #define K0 26
88 #define K1 27
89 #define GP 28
90 #define SP 29
91 #define S8 30
92 #define RA 31
93 #define SR 32
94 #define PS SR /* alias for SR */
95 #define MULLO 33
96 #define MULHI 34
97 #define BADVADDR 35
98 #define CAUSE 36
99 #define PC 37
100 /*
101 * IC is valid only on RM7K and RM9K processors. Access to this is
102 * controlled by IC_INT_REG which defined in kernel config
103 */
104 #define IC 38
105 #define DUMMY 39 /* for 8 byte alignment */
106 #define NUMSAVEREGS 40
107
108 /*
109 * Pseudo registers so we save a complete set of registers regardless of
110 * the ABI. See regdef.h for a more complete explanation.
111 */
112 #if defined(__mips_n32) || defined(__mips_n64)
113 #define TA0 8
114 #define TA1 9
115 #define TA2 10
116 #define TA3 11
117 #else
118 #define TA0 12
119 #define TA1 13
120 #define TA2 14
121 #define TA3 15
122 #endif
123
124
125 /*
126 * Index of FP registers in 'struct frame', counting from the beginning
127 * of the frame (i.e., including the general registers).
128 */
129 #define FPBASE NUMSAVEREGS
130 #define F0 (FPBASE+0)
131 #define F1 (FPBASE+1)
132 #define F2 (FPBASE+2)
133 #define F3 (FPBASE+3)
134 #define F4 (FPBASE+4)
135 #define F5 (FPBASE+5)
136 #define F6 (FPBASE+6)
137 #define F7 (FPBASE+7)
138 #define F8 (FPBASE+8)
139 #define F9 (FPBASE+9)
140 #define F10 (FPBASE+10)
141 #define F11 (FPBASE+11)
142 #define F12 (FPBASE+12)
143 #define F13 (FPBASE+13)
144 #define F14 (FPBASE+14)
145 #define F15 (FPBASE+15)
146 #define F16 (FPBASE+16)
147 #define F17 (FPBASE+17)
148 #define F18 (FPBASE+18)
149 #define F19 (FPBASE+19)
150 #define F20 (FPBASE+20)
151 #define F21 (FPBASE+21)
152 #define F22 (FPBASE+22)
153 #define F23 (FPBASE+23)
154 #define F24 (FPBASE+24)
155 #define F25 (FPBASE+25)
156 #define F26 (FPBASE+26)
157 #define F27 (FPBASE+27)
158 #define F28 (FPBASE+28)
159 #define F29 (FPBASE+29)
160 #define F30 (FPBASE+30)
161 #define F31 (FPBASE+31)
162 #define FSR (FPBASE+32)
163 #define FSR_DUMMY (FPBASE+33) /* For 8 byte alignment */
164
165 #define NUMFPREGS 34
166
167 #define NREGS (NUMSAVEREGS + NUMFPREGS)
168
169 /*
170 * Index of FP registers in 'struct frame', relative to the base
171 * of the FP registers in frame (i.e., *not* including the general
172 * registers).
173 */
174 #define F0_NUM (0)
175 #define F1_NUM (1)
176 #define F2_NUM (2)
177 #define F3_NUM (3)
178 #define F4_NUM (4)
179 #define F5_NUM (5)
180 #define F6_NUM (6)
181 #define F7_NUM (7)
182 #define F8_NUM (8)
183 #define F9_NUM (9)
184 #define F10_NUM (10)
185 #define F11_NUM (11)
186 #define F12_NUM (12)
187 #define F13_NUM (13)
188 #define F14_NUM (14)
189 #define F15_NUM (15)
190 #define F16_NUM (16)
191 #define F17_NUM (17)
192 #define F18_NUM (18)
193 #define F19_NUM (19)
194 #define F20_NUM (20)
195 #define F21_NUM (21)
196 #define F22_NUM (22)
197 #define F23_NUM (23)
198 #define F24_NUM (24)
199 #define F25_NUM (25)
200 #define F26_NUM (26)
201 #define F27_NUM (27)
202 #define F28_NUM (28)
203 #define F29_NUM (29)
204 #define F30_NUM (30)
205 #define F31_NUM (31)
206 #define FSR_NUM (32)
207
208 #endif /* !_MACHINE_REGNUM_H_ */
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