The Design and Implementation of the FreeBSD Operating System, Second Edition
Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)


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FreeBSD/Linux Kernel Cross Reference
sys/mips/ingenic/jz4780_pinctrl.c

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    1 /*-
    2  * Copyright 2015 Alexander Kabaev <kan@FreeBSD.org>
    3  * All rights reserved.
    4  *
    5  * Redistribution and use in source and binary forms, with or without
    6  * modification, are permitted provided that the following conditions
    7  * are met:
    8  * 1. Redistributions of source code must retain the above copyright
    9  *    notice, this list of conditions and the following disclaimer.
   10  * 2. Redistributions in binary form must reproduce the above copyright
   11  *    notice, this list of conditions and the following disclaimer in the
   12  *    documentation and/or other materials provided with the distribution.
   13  *
   14  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
   15  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
   16  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
   17  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
   18  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
   19  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
   20  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
   21  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
   22  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
   23  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
   24  * SUCH DAMAGE.
   25  */
   26 
   27 /*
   28  * Ingenic JZ4780 pinctrl driver.
   29  */
   30 
   31 #include <sys/cdefs.h>
   32 __FBSDID("$FreeBSD: stable/12/sys/mips/ingenic/jz4780_pinctrl.c 332341 2018-04-09 22:06:16Z gonzo $");
   33 
   34 #include <sys/param.h>
   35 #include <sys/systm.h>
   36 #include <sys/conf.h>
   37 #include <sys/bus.h>
   38 #include <sys/gpio.h>
   39 #include <sys/kernel.h>
   40 #include <sys/module.h>
   41 #include <sys/lock.h>
   42 #include <sys/mutex.h>
   43 #include <sys/queue.h>
   44 #include <sys/resource.h>
   45 #include <sys/rman.h>
   46 
   47 #include <machine/bus.h>
   48 
   49 #include <dev/ofw/ofw_bus.h>
   50 #include <dev/ofw/ofw_bus_subr.h>
   51 
   52 #include <dev/fdt/fdt_common.h>
   53 #include <dev/fdt/fdt_pinctrl.h>
   54 #include <dev/fdt/simplebus.h>
   55 
   56 #include <mips/ingenic/jz4780_regs.h>
   57 
   58 #include "jz4780_gpio_if.h"
   59 
   60 struct jz4780_pinctrl_softc {
   61         struct simplebus_softc          ssc;
   62         device_t                        dev;
   63 };
   64 
   65 #define CHIP_REG_STRIDE                 256
   66 #define CHIP_REG_OFFSET(base, chip)     ((base) + (chip) * CHIP_REG_STRIDE)
   67 
   68 static int
   69 jz4780_pinctrl_probe(device_t dev)
   70 {
   71 
   72         if (!ofw_bus_status_okay(dev))
   73                 return (ENXIO);
   74 
   75         if (!ofw_bus_is_compatible(dev, "ingenic,jz4780-pinctrl"))
   76                 return (ENXIO);
   77 
   78         device_set_desc(dev, "Ingenic JZ4780 GPIO");
   79 
   80         return (BUS_PROBE_DEFAULT);
   81 }
   82 
   83 static int
   84 jz4780_pinctrl_attach(device_t dev)
   85 {
   86         struct jz4780_pinctrl_softc *sc;
   87         struct resource_list *rs;
   88         struct resource_list_entry *re;
   89         phandle_t dt_parent, dt_child;
   90         int i, ret;
   91 
   92         sc = device_get_softc(dev);
   93         sc->dev = dev;
   94 
   95         /*
   96          * Fetch our own resource list to dole memory between children
   97          */
   98         rs = BUS_GET_RESOURCE_LIST(device_get_parent(dev), dev);
   99         if (rs == NULL)
  100                 return (ENXIO);
  101         re = resource_list_find(rs, SYS_RES_MEMORY, 0);
  102         if (re == NULL)
  103                 return (ENXIO);
  104 
  105         simplebus_init(dev, 0);
  106 
  107         /* Iterate over this node children, looking for pin controllers */
  108         dt_parent = ofw_bus_get_node(dev);
  109         i = 0;
  110         for (dt_child = OF_child(dt_parent); dt_child != 0;
  111             dt_child = OF_peer(dt_child)) {
  112                 struct simplebus_devinfo *ndi;
  113                 device_t child;
  114                 bus_addr_t phys;
  115                 bus_size_t size;
  116 
  117                 /* Add gpio controller child */
  118                 if (!OF_hasprop(dt_child, "gpio-controller"))
  119                         continue;
  120                 child = simplebus_add_device(dev, dt_child, 0,  NULL, -1, NULL);
  121                 if (child == NULL)
  122                         break;
  123                 /* Setup child resources */
  124                 phys = CHIP_REG_OFFSET(re->start, i);
  125                 size = CHIP_REG_STRIDE;
  126                 if (phys + size - 1 <= re->end) {
  127                         ndi = device_get_ivars(child);
  128                         resource_list_add(&ndi->rl, SYS_RES_MEMORY, 0,
  129                             phys, phys + size - 1, size);
  130                 }
  131                 i++;
  132         }
  133 
  134         ret = bus_generic_attach(dev);
  135         if (ret == 0) {
  136             fdt_pinctrl_register(dev, "ingenic,pins");
  137             fdt_pinctrl_configure_tree(dev);
  138         }
  139         return (ret);
  140 }
  141 
  142 static int
  143 jz4780_pinctrl_detach(device_t dev)
  144 {
  145 
  146         bus_generic_detach(dev);
  147         return (0);
  148 }
  149 
  150 struct jx4780_bias_prop {
  151         const char *name;
  152         uint32_t    bias;
  153 };
  154 
  155 static struct jx4780_bias_prop jx4780_bias_table[] = {
  156         { "bias-disable", 0 },
  157         { "bias-pull-up", GPIO_PIN_PULLUP },
  158         { "bias-pull-down", GPIO_PIN_PULLDOWN },
  159 };
  160 
  161 static int
  162 jz4780_pinctrl_parse_pincfg(phandle_t pincfgxref, uint32_t *bias_value)
  163 {
  164         phandle_t pincfg_node;
  165         int i;
  166 
  167         pincfg_node = OF_node_from_xref(pincfgxref);
  168         for (i = 0; i < nitems(jx4780_bias_table); i++) {
  169                 if (OF_hasprop(pincfg_node, jx4780_bias_table[i].name)) {
  170                         *bias_value = jx4780_bias_table[i].bias;
  171                         return 0;
  172                 }
  173         }
  174 
  175         return -1;
  176 }
  177 
  178 static device_t
  179 jz4780_pinctrl_chip_lookup(struct jz4780_pinctrl_softc *sc, phandle_t chipxref)
  180 {
  181         device_t chipdev;
  182 
  183         chipdev = OF_device_from_xref(chipxref);
  184         return chipdev;
  185 }
  186 
  187 static int
  188 jz4780_pinctrl_configure_pins(device_t dev, phandle_t cfgxref)
  189 {
  190         struct jz4780_pinctrl_softc *sc = device_get_softc(dev);
  191         device_t  chip;
  192         phandle_t node;
  193         ssize_t i, len;
  194         uint32_t *value, *pconf;
  195         int result;
  196 
  197         node = OF_node_from_xref(cfgxref);
  198 
  199         len = OF_getencprop_alloc_multi(node, "ingenic,pins",
  200             sizeof(uint32_t) * 4, (void **)&value);
  201         if (len < 0) {
  202                 device_printf(dev,
  203                     "missing ingenic,pins attribute in FDT\n");
  204                 return (ENXIO);
  205         }
  206 
  207         pconf = value;
  208         result = EINVAL;
  209         for (i = 0; i < len; i++, pconf += 4) {
  210                 uint32_t bias;
  211 
  212                 /* Lookup the chip that handles this configuration */
  213                 chip = jz4780_pinctrl_chip_lookup(sc, pconf[0]);
  214                 if (chip == NULL) {
  215                         device_printf(dev,
  216                             "invalid gpio controller reference in FDT\n");
  217                         goto done;
  218                 }
  219 
  220                 if (jz4780_pinctrl_parse_pincfg(pconf[3], &bias) != 0) {
  221                         device_printf(dev,
  222                             "invalid pin bias for pin %u on %s in FDT\n",
  223                             pconf[1], ofw_bus_get_name(chip));
  224                         goto done;
  225                 }
  226 
  227                 result = JZ4780_GPIO_CONFIGURE_PIN(chip, pconf[1], pconf[2],
  228                     bias);
  229                 if (result != 0) {
  230                         device_printf(dev,
  231                             "failed to configure pin %u on %s\n", pconf[1],
  232                             ofw_bus_get_name(chip));
  233                         goto done;
  234                 }
  235         }
  236 
  237         result = 0;
  238 done:
  239         free(value, M_OFWPROP);
  240         return (result);
  241 }
  242 
  243 
  244 static device_method_t jz4780_pinctrl_methods[] = {
  245         /* Device interface */
  246         DEVMETHOD(device_probe,         jz4780_pinctrl_probe),
  247         DEVMETHOD(device_attach,        jz4780_pinctrl_attach),
  248         DEVMETHOD(device_detach,        jz4780_pinctrl_detach),
  249 
  250         /* fdt_pinctrl interface */
  251         DEVMETHOD(fdt_pinctrl_configure, jz4780_pinctrl_configure_pins),
  252 
  253         DEVMETHOD_END
  254 };
  255 
  256 static devclass_t jz4780_pinctrl_devclass;
  257 DEFINE_CLASS_1(pinctrl, jz4780_pinctrl_driver, jz4780_pinctrl_methods,
  258             sizeof(struct jz4780_pinctrl_softc), simplebus_driver);
  259 EARLY_DRIVER_MODULE(pinctrl, simplebus, jz4780_pinctrl_driver,
  260     jz4780_pinctrl_devclass, 0, 0, BUS_PASS_INTERRUPT + BUS_PASS_ORDER_LATE);

Cache object: 71cae2c043b2086220cf9d8258eac86b


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